CD4585BMS. CMOS 4-Bit Magnitude Comparator. Features. Pinout. Functional Diagram. Applications. Description. December 1992

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1 CD55BMS December 199 Features High Voltage Type (V Rating) Expansion to, 1, 1...N Bits by Cascading Units Medium Speed Operation - Compares Two -Bit Words in 1ns (Typ.) at 1% Tested for Quiescent Current at V Standardized Symmetrical Output Characteristics 5V, and 15V Parametric Ratings Maximum Input Current of 1µA at 1V Over Full Package Temperature Range; 1nA at 1V and +5 o C Noise Margin (Over Full Package/Temperature Range) - 1V at VDD = 5V - V at VDD = -.5V at VDD = 15V Meets All Requirements of JEDEC Tentative Standard No. 13B, Standard Specifications for Description of B Series CMOS Devices Applications Servo Motor Controls Process Controllers Description CD55BMS is a -bit magnitude comparator designed for use in computer and logic applications that require the comparison of two -bit words. This logic circuit determines whether one -bit word (Binary or BCD) is less than, equal to or greater than a second -bit word. The CD55BMS has eight comparing inputs (A3, B3, through A, B), three outputs (A < B, = B, A > B) and three cascading inputs (A < B, A = B, A > B) that permit system designers to expand the comparator function to, 1, 1...N bits. When a single CD55BMS is used, the cascading inputs are connected as follows: (A < B) = low, (A = B) = high, (A > B) = high. Cascading thses units for comparision of more than bits is accomplished as shown in Figure 9. The CD55BMS is supplied in these 1-lead outline packages: Braze Seal DIP Frit Seal DIP Ceramic Flatpack HT H1E HW CMOS -Bit Magnitude Comparator Pinout B A (A = B)OUT (A > B)IN (A < B)IN (A = B)IN A1 VSS Functional Diagram WORD A CASCADING INPUTS WORD B A A1 A A3 A > B A = B A < B B B1 B B3 CD55BMS TOP VIEW VDD A3 B3 (A > B)OUT (A < B)OUT B A B1 VDD = 1 VSS = A > B A = B A < B CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1--INTERSIL or Copyright Intersil Corporation File Number 337

2 Specifications CD55BMS Absolute Maximum Ratings DC Supply Voltage Range, (VDD) V to +V (Voltage Referenced to VSS Terminals) Input Voltage Range, All Inputs V to VDD +.5V DC Input Current, Any One Input ±1mA Operating Temperature Range to +15 o C Package Types D, F, K, H Storage Temperature Range (TSTG) o C to +15 o C Lead Temperature (During Soldering) o C At Distance 1/1 ± 1/3 Inch (1.59mm ±.79mm) from case for 1s Maximum Reliability Information Thermal Resistance θ ja θ jc Ceramic DIP and FRIT Package..... o C/W o C/W Flatpack Package o C/W o C/W Maximum Package Power Dissipation (PD) at +15 o C For T A = to +1 o C (Package Type D, F, K) mW For T A = +1 o C to +15 o C (Package Type D, F, K)......Derate Linearity at 1mW/ o C to mw Device Dissipation per Output Transistor mW For T A = Full Package Temperature Range (All Package Types) Junction Temperature o C TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A PARAMETER SYMBOL CONDITIONS (NOTE 1) SUBGROUPS TEMPERATURE MIN MAX UNITS Supply Current IDD VDD = V, VIN = VDD or GND 1 +5 o C - 1 µa +15 o C - 1 µa VDD = 1V, VIN = VDD or GND 3-1 µa Input Leakage Current IIL VIN = VDD or GND VDD = 1 +5 o C -1 - na +15 o C -1 - na VDD = 1V na Input Leakage Current IIH VIN = VDD or GND VDD = 1 +5 o C - 1 na +15 o C - 1 na VDD = 1V 3-1 na Output Voltage VOL15 VDD = 15V, No Load 1,, 3 +5 o C, +15 o C, - 5 mv Output Voltage VOH15 VDD = 15V, No Load (Note 3) 1,, 3 +5 o C, +15 o C, V Output Current (Sink) IOL5 VDD = 5V, VOUT =.V 1 +5 o C.53 - ma Output Current (Sink) IOL1 VDD =, VOUT =.5V 1 +5 o C 1. - ma Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1 +5 o C ma Output Current (Source) IOH5A VDD = 5V, VOUT =.V 1 +5 o C ma Output Current (Source) IOH5B VDD = 5V, VOUT =.5V 1 +5 o C ma Output Current (Source) IOH1 VDD =, VOUT = 9.5V 1 +5 o C ma Output Current (Source) IOH15 VDD = 15V, VOUT = 13.5V 1 +5 o C ma N Threshold Voltage VNTH VDD =, ISS = -1µA 1 +5 o C V P Threshold Voltage VPTH VSS = V, IDD = 1µA 1 +5 o C.7. V Functional F VDD =.V, VIN = VDD or GND 7 +5 o C VOH > VOL < V VDD = V, VIN = VDD or GND 7 +5 o C VDD/ VDD/ VDD = 1V, VIN = VDD or GND A +15 o C VDD = 3V, VIN = VDD or GND B Input Voltage Low (Note ) VIL VDD = 5V, VOH >.5V, VOL <.5V 1,, 3 +5 o C, +15 o C, V Input Voltage High (Note ) Input Voltage Low (Note ) Input Voltage High (Note ) NOTES: VIH VDD = 5V, VOH >.5V, VOL <.5V 1,, 3 +5 o C, +15 o C, V VIL VIH VDD = 15V, VOH > 13.5V, VOL < 1.5V VDD = 15V, VOH > 13.5V, VOL < 1.5V 1. All voltages referenced to device GND, 1% testing being implemented.. Go/No Go test with limits applied to inputs. 1,, 3 +5 o C, +15 o C, - V 1,, 3 +5 o C, +15 o C, 11 - V 3. For accuracy, voltage is measured differentially to VDD. Limit is.5v max. 7-1

3 Specifications CD55BMS TABLE. AC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER SYMBOL CONDITIONS (NOTE 1, ) Propagation Delay Comparing Inputs to Outputs Propagation Delay Cascading Inputs to Outputs Transition Time TPHL1 TPLH1 TPHL TPLH GROUP A SUBGROUPS TEMPERATURE MIN MAX UNITS VDD = 5V, VIN = VDD or GND 9 +5 o C - ns 1, o C, - 1 ns VDD = 5V, VIN = VDD or GND 9 +5 o C - ns 1, o C, - 5 ns TTHL VDD = 5V, VIN = VDD or GND 9 +5 o C - ns TTLH 1, o C, - 7 ns NOTES: 1. CL = 5pF, RL = K, Input TR, TF < ns.. and +15 o C limits guaranteed, 1% testing being implemented. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE MIN MAX UNITS Supply Current IDD VDD = 5V, VIN = VDD or GND 1,, +5 o C - 5 µa +15 o C - 15 µa VDD =, VIN = VDD or GND 1,, +5 o C - 1 µa +15 o C - 3 µa VDD = 15V, VIN = VDD or GND 1,, +5 o C - 1 µa +15 o C - µa Output Voltage VOL VDD = 5V, No Load 1, +5 o C, +15 o C, - 5 mv Output Voltage VOL VDD =, No Load 1, +5 o C, +15 o C, Output Voltage VOH VDD = 5V, No Load 1, +5 o C, +15 o C, Output Voltage VOH VDD =, No Load 1, +5 o C, +15 o C, - 5 mv.95 - V V Output Current (Sink) IOL5 VDD = 5V, VOUT =.V 1, +15 o C.3 - ma. - ma Output Current (Sink) IOL1 VDD =, VOUT =.5V 1, +15 o C.9 - ma 1. - ma Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1, +15 o C. - ma. - ma Output Current (Source) IOH5A VDD = 5V, VOUT =.V 1, +15 o C ma - -. ma Output Current (Source) IOH5B VDD = 5V, VOUT =.5V 1, +15 o C ma - -. ma Output Current (Source) IOH1 VDD =, VOUT = 9.5V 1, +15 o C ma ma Output Current (Source) IOH15 VDD =15V, VOUT = 13.5V 1, +15 o C - -. ma - -. ma Input Voltage Low VIL VDD =, VOH > 9V, VOL < 1V 1, +5 o C, +15 o C, - 3 V Input Voltage High VIH VDD =, VOH > 9V, VOL < 1V 1, +5 o C, +15 o C, +7 - V 7-11

4 Specifications CD55BMS Propagation Delay Comparing Inputs to Outputs Propagation Delay Cascading Inputs to Outputs Transition Time TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE TPHL1 TPLH1 TPHL TPLH VDD = 1,, 3 +5 o C - 5 ns VDD = 15V 1,, 3 +5 o C - 1 ns VDD = 1,, 3 +5 o C - 1 ns VDD = 15V 1,, 3 +5 o C - 1 ns TTHL VDD = 1,, 3 +5 o C - 1 ns TTLH VDD = 15V 1,, 3 +5 o C - ns Input Capacitance CIN Any Inputs 1, +5 o C pf NOTES: 1. All voltages referenced to device GND.. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics. 3. CL = 5pF, RL = K, Input TR, TF < ns. MIN MAX UNITS TABLE. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE MIN MAX UNITS Supply Current IDD VDD = V, VIN = VDD or GND 1, +5 o C - 5 µa N Threshold Voltage VNTH VDD =, ISS = -1µA 1, +5 o C V N Threshold Voltage VTN VDD =, ISS = -1µA 1, +5 o C - ±1 V Delta P Threshold Voltage VTP VSS = V, IDD = 1µA 1, +5 o C.. V P Threshold Voltage VTP VSS = V, IDD = 1µA 1, +5 o C - ±1 V Delta Functional F VDD = 1V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND 1 +5 o C VOH > VDD/ Propagation Delay Time TPHL TPLH NOTES: 1. All voltages referenced to device GND.. CL = 5pF, RL = K, Input TR, TF < ns. VOL < VDD/ VDD = 5V 1,, 3, +5 o C x +5 o C Limit 3. See Table for +5 o C limit.. Read and Record V ns TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +5 o C PARAMETER SYMBOL DELTA LIMIT Supply Current - MSI- IDD ± 1.µA Output Current (Sink) IOL5 ± % x Pre-Test Reading Output Current (Source) IOH5A ± % x Pre-Test Reading TABLE. APPLICABLE SUBGROUPS CONFORMANCE GROUP MIL-STD-3 METHOD GROUP A SUBGROUPS READ AND RECORD Initial Test (Pre Burn-In) 1% 5 1, 7, 9 IDD, IOL5, IOH5A Interim Test 1 (Post Burn-In) 1% 5 1, 7, 9 IDD, IOL5, IOH5A Interim Test (Post Burn-In) 1% 5 1, 7, 9 IDD, IOL5, IOH5A PDA (Note 1) 1% 5 1, 7, 9, Deltas Interim Test 3 (Post Burn-In) 1% 5 1, 7, 9 IDD, IOL5, IOH5A 7-1

5 Specifications CD55BMS TABLE. APPLICABLE SUBGROUPS (Continued) CONFORMANCE GROUP MIL-STD-3 METHOD GROUP A SUBGROUPS READ AND RECORD PDA (Note 1) 1% 5 1, 7, 9, Deltas Final Test 1% 5, 3, A, B, 1, 11 Group A Sample 55 1,, 3, 7, A, B, 9, 1, 11 Group B Subgroup B-5 Sample 55 1,, 3, 7, A, B, 9, 1, 11, Deltas Subgroups 1,, 3, 9, 1, 11 Subgroup B- Sample 55 1, 7, 9 Group D Sample 55 1,, 3, A, B, 9 Subgroups 1, 3 NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and. TABLE 7. TOTAL DOSE IRRADIATION CONFORMANCE GROUPS MIL-STD-3 METHOD TEST READ AND RECORD PRE-IRRAD POST-IRRAD PRE-IRRAD POST-IRRAD Group E Subgroup 55 1, 7, 9 Table 1, 9 Table TABLE. BURN-IN AND IRRADIATION TEST CONNECTIONS OSCILLATOR FUNCTION OPEN GROUND VDD 9V ± -.5V 5kHz 5kHz Static Burn-In 1 Note 1 Static Burn-In Note 1 Dynamic Burn- In Note 1 Irradiation Note 3, 1, 13 1,, - 11, 1, , 1, 13 1,, - 7, 9-11, , 11, 1, 15 1,, 1 3, 1, , 1, 13 1,, - 7, 9-11, 1-1 NOTE: 1. Each pin except VDD and GND will have a series resistor of 1K ± 5%, VDD = 1V ±.5V. Each pin except VDD and GND will have a series resistor of 7K ± 5%; Group E, Subgroup, sample size is dice/wafer, failures, VDD = ±.5V All Intersil semiconductor products are manufactured, assembled and tested under ISO9 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 3, Mail Stop 53- Melbourne, FL 39 TEL: (31) 7-7 FAX: (31) 7-7 EUROPE Intersil SA Mercure Center 1, Rue de la Fusee 113 Brussels, Belgium TEL: (3) FAX: (3).7..5 ASIA Intersil (Taiwan) Ltd. Taiwan Limited 7F-, No. 11 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: () FAX: ()

6 CD55BMS Logic Diagram A3 15 VDD B3 A B A VSS INPUTS PROTECTED BY CMOS PROTECTION NETWORK (A < B)OUT 1 B1 A B (A < B)IN (A = B)IN (A > B)IN (A = B)OUT 3 (A > B)OUT 13 FIGURE 1. LOGIC DIAGRAM TRUTH TABLE INPUTS COMPARING CASCADING OUTPUTS A3, B3 A, B A1, B1 A, B A < B A = B A > B A < B A = B A > B A3 > B3 X X X X X 1 1 A3 = B3 A > B X X X X 1 1 A3 = B3 A = B A1 > B1 X X X 1 1 A3 = B3 A = B A1 = B1 A > B X X 1 1 A3 = B3 A = B A1 = B1 A = B 1 1 A3 = B3 A = B A1 = B1 A = B 1 X 1 A3 = B3 A = B A1 = B1 A = B 1 X 1 A3 = B3 A = B A1 = B1 A < B X X X 1 A3 = B3 A = B A1 < B1 X X X X 1 A3 = B3 A < B X X X X X 1 A3 < B3 X X X X X X 1 X = Don t Care Logic 1 = High Level Logic = Low Level 7-1

7 CD55BMS Typical Performance Characteristics OUTPUT LOW (SINK) CURRENT (IOL) (ma) AMBIENT TEMPERATURE (T A ) = +5 o C GATE-TO-SOURCE VOLTAGE (VGS) = 15V 5V OUTPUT LOW (SINK) CURRENT (IOL) (ma) AMBIENT TEMPERATURE (T A ) = +5 o C GATE-TO-SOURCE VOLTAGE (VGS) = 15V 5V DRAIN-TO-SOURCE VOLTAGE (VDS) (V) FIGURE. TYPICAL OUTPUT LOW (SINK) CURRENT CHARACTERISTICS DRAIN-TO-SOURCE VOLTAGE (VDS) (V) AMBIENT TEMPERATURE (T A ) = +5 o C GATE-TO-SOURCE VOLTAGE (VGS) = -5V -15V OUTPUT HIGH (SOURCE) CURRENT (IOH) (ma) DRAIN-TO-SOURCE VOLTAGE (VDS) (V) FIGURE 3. MINIMUM OUTPUT LOW (SINK) CURRENT CHARACTERISTICS DRAIN-TO-SOURCE VOLTAGE (VDS) (V) AMBIENT TEMPERATURE (T A ) = +5 o C GATE-TO-SOURCE VOLTAGE (VGS) = -5V -15V OUTPUT HIGH (SOURCE) CURRENT (IOH) (ma) FIGURE. TYPICAL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS FIGURE 5. MINIMUM OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS TRANSITION TIME (tthl, ttlh) (ns) AMBIENT TEMPERATURE (T A ) = +5 o C 15 SUPPLY VOLTAGE (VDD) = 5V 1 15V 5 1 LOAD CAPACITANCE (CL) (pf) PROPAGATION DELAY TIME (tphl, tplh) (ns) AMBIENT TEMPERATURE (T A ) = +5 o C 3 SUPPLY VOLTAGE (VDD) = 5V 1 15V 1 LOAD CAPACITANCE (CL) (pf) FIGURE. TYPICAL TRANSITION TIME AS A FUNCTION OF LOAD CAPACITANCE FIGURE 7. TYPICAL PROPAGATION DELAY TIME ( COMPAR- ING INPUTS TO OUTPUTS) AS A FUNCTION OF LOAD CAPACITANCE 7-15

CD55BMS Typical Performance Characteristics (Continued) DYNAMIC POWER DISSIPATION (PD) (µw) 1 1 3 1 1 AMBIENT TEMPERATURE (T A ) = +5 o C SUPPLY VOLTAGE (VDD) = 15V 5V CL = 5pF CL = 15pF.

8 CD55BMS Typical Performance Characteristics (Continued) DYNAMIC POWER DISSIPATION (PD) (µw) AMBIENT TEMPERATURE (T A ) = +5 o C SUPPLY VOLTAGE (VDD) = 15V 5V CL = 5pF CL = 15pF CLOCK INPUT FREQUENCY (fin) (khz) FIGURE. TYPICAL DYNAMIC POWER DISSIPATION AS A FUNCTION OF CLOCK INPUT FREQUENCY A A1 A A3 A A5 A A7 VDD VDD VDD A A9 A1 A11 CD55BMS (A > B)IN (A = B)IN (A < B)IN (A > B)OUT (A = B)OUT (A < B)OUT CD55BMS CD55BMS B B1 B B3 B B5 B B7 B B9 B1 B11 tp TOTAL = tp (COMPARE) INPUTS + x tp (CASCADE), AT VDD = INPUTS FIGURE 9. TYPICAL SPEED CHARACTERISTICS OF A 1-BIT COMPARATOR Chip Dimensions and Pad Layout Dimensions in parenthese are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (1-3 inch). METALLIZATION: Thickness: 11kÅ 1kÅ, AL. PASSIVATION: 1.kÅ - 15.kÅ, Silane BOND PADS:. inches X. inches MIN DIE THICKNESS:.19 inches -.1 inches 7-1

CD4063BMS. CMOS 4-Bit Magnitude Comparator. Pinout. Features. Functional Diagram. Applications. Description. December 1992

CD4063BMS. CMOS 4-Bit Magnitude Comparator. Pinout. Features. Functional Diagram. Applications. Description. December 1992 CD3BMS December 99 Features CMOS -Bit Magnitude Comparator Pinout High Voltage Type (V Rating) Expansion to 8,,... N Bits by Cascading Units CD3BMS TOP VIEW Medium Speed Operation - Compares Two -Bit Words