DATASHEET CD4069UBMS. Features. Pinout. Applications. Functional Diagram. Description. Schematic Diagram. CMOS Hex Inverter

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1 DATASHEET CD9UBMS CMOS Hex Inverter FN331 Rev. December 199 Features Pinout High Voltage Types (V Rating) Standardized Symmetrical Output Characteristics CD9UBMS TOP VIEW Medium Speed Operation: tphl, tplh = 3ns (typ) at A 1 1 1% Tested for Quiescent Current at V Maximum Input Current of 1 A at 1V Over Full Package Temperature Range; 1nA at 1V and + o C Meets All Requirements of JEDEC Tentative Standard No. 13B, Standard Specifications for Description of B Series CMOS Devices Applications G = A B H = B C I = C VSS F L = F E K = E D J = D Logic Inversion Pulse Shaping Oscillators High-Input-Impedance Amplifiers Description CD9UBMS types consist of six CMOS inverter circuits. These devices are intended for all general-purpose inverter applications where the medium-power TTL-drive and logiclevel conversion capabilities of circuits such as the CD9 and CD9 Hex Inverter/Buffers are not required. The CD9UBMS is supplied in these 1 lead outline packages: Functional Diagram 1 A 3 B C 9 D G = A H = B I = C J = D Braze Seal DIP Frit Seal DIP Ceramic Flatpack HH H1B H3W VSS = 7 = 1 E F K = E L = F Schematic Diagram A 1(3,, 9, 11, 13) G = A G (,,, 1, 1) VSS FIGURE 1. SCHEMATIC DIAGRAM OF 1 OF IDENTICAL INVERTERS FN331 Rev. Page 1 of December 199

2 CD9UBMS Absolute Maximum Ratings DC Supply Voltage Range, () to +V (Voltage Referenced to VSS Terminals) Input Voltage Range, All Inputs to +. DC Input Current, Any One Input 1mA Operating Temperature Range to +1 o C Package Types D, F, K, H Storage Temperature Range (TSTG) o C to +1 o C Lead Temperature (During Soldering) o C At Distance 1/1 1/3 Inch (1.9mm.79mm) from case for 1s Maximum Reliability Information Thermal Resistance ja jc Ceramic DIP and FRIT Package..... o C/W o C/W Flatpack Package o C/W o C/W Maximum Package Power Dissipation (PD) at +1 o C For TA = to +1 o C (Package Type D, F, K) mw For TA = +1 o C to +1 o C (Package Type D, F, K)..... Derate Linearity at 1mW/ o C to mw Device Dissipation per Output Transistor mW For TA = Full Package Temperature Range (All Package Types) Junction Temperature o C TABLE 1. DC ELECTRICAL PERFORMANCE GROUP A PARAMETER SYMBOL CONDITIONS (NOTE 1) SUBGROUPS TEMPERATURE MIN MAX UNITS Supply Current IDD = V, VIN = or GND 1 + o C -. A +1 o C - A = 1V, VIN = or GND 3 -. A Input Leakage Current IIL VIN = or GND = 1 + o C -1 - na +1 o C -1 - na = 1V na Input Leakage Current IIH VIN = or GND = 1 + o C - 1 na +1 o C - 1 na = 1V 3-1 na Output Voltage VOL1 = 1, No Load 1,, 3 + o C, +1 o C, - mv Output Voltage VOH1 = 1, No Load (Note 3) 1,, 3 + o C, +1 o C, V Output Current (Sink) IOL =, VOUT =.V 1 + o C.3 - ma Output Current (Sink) IOL1 =, VOUT =. 1 + o C 1. - ma Output Current (Sink) IOL1 = 1, VOUT = o C 3. - ma Output Current (Source) IOHA =, VOUT =.V 1 + o C ma Output Current (Source) IOHB =, VOUT =. 1 + o C ma Output Current (Source) IOH1 =, VOUT = o C ma Output Current (Source) IOH1 = 1, VOUT = o C ma N Threshold Voltage VNTH =, ISS = -1 A 1 + o C V P Threshold Voltage VPTH VSS = V, IDD = 1 A 1 + o C.7. V Functional F =.V, VIN = or GND 7 + o C VOH > VOL < V = V, VIN = or GND 7 + o C / / = 1V, VIN = or GND A +1 o C = 3V, VIN = or GND B Input Voltage Low (Note ) VIL =, VOH >., VOL <. 1,, 3 + o C, +1 o C, - 1. V Input Voltage High (Note ) Input Voltage Low (Note ) Input Voltage High (Note ) VIH =, VOH >., VOL <. 1,, 3 + o C, +1 o C,. - V VIL VIH = 1, VOH > 13., VOL < 1. = 1, VOH > 13., VOL < All voltages referenced to device GND, 1% testing being implemented.. Go/No Go test with limits applied to inputs. 1,, 3 + o C, +1 o C, -. V 1,, 3 + o C, +1 o C, 1. - V 3. For accuracy, voltage is measured differentially to. Limit is. max. FN331 Rev. Page of December 199

3 CD9UBMS TABLE. AC ELECTRICAL PERFORMANCE GROUP A PARAMETER SYMBOL CONDITIONS (NOTES 1, ) SUBGROUPS TEMPERATURE MIN MAX UNITS Propagation Delay TPHL =, VIN = or GND 9 + o C - 11 ns TPLH 1, o C, - 19 ns Transition Time TTHL =, VIN = or GND 9 + o C - ns TTLH 1, o C, - 7 ns 1. CL = pf, RL = K, Input TR, TF < ns.. and +1 o C limits guaranteed, 1% testing being implemented. TABLE 3. ELECTRICAL PERFORMANCE PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE MIN MAX UNITS Supply Current IDD =, VIN = or GND 1,, + o C -. A +1 o C - 7. A =, VIN = or GND 1,, + o C -. A +1 o C - 1 A = 1, VIN = or GND 1,, + o C -. A +1 o C - 3 A Output Voltage VOL =, No Load 1, + o C, +1 o C, - mv Output Voltage VOL =, No Load 1, + o C, +1 o C, - mv Output Voltage VOH =, No Load 1, + o C, +1 o C,.9 - V Output Voltage VOH =, No Load 1, + o C, +1 o C, V Output Current (Sink) IOL =, VOUT =.V 1, +1 o C.3 - ma. - ma Output Current (Sink) IOL1 =, VOUT =. 1, +1 o C.9 - ma 1. - ma Output Current (Sink) IOL1 = 1, VOUT = 1. 1, +1 o C. - ma. - ma Output Current (Source) IOHA =, VOUT =.V 1, +1 o C ma - -. ma Output Current (Source) IOHB =, VOUT =. 1, +1 o C ma - -. ma Output Current (Source) IOH1 =, VOUT = 9. 1, +1 o C ma - -. ma Output Current (Source) IOH1 =1, VOUT = 13. 1, +1 o C - -. ma - -. ma Input Voltage Low VIL =, VOH > 9V, VOL < 1V 1, + o C, +1 o C, - V Input Voltage High VIH =, VOH > 9V, VOL < 1V 1, + o C, +1 o C, - V Propagation Delay TPHL = 1,, 3 + o C - ns TPLH = 1 1,, 3 + o C - ns Transition Time TTHL = 1,, 3 + o C - 1 ns TTLH = 1 1,, 3 + o C - ns FN331 Rev. Page 3 of December 199

4 CD9UBMS TABLE 3. ELECTRICAL PERFORMANCE (Continued) PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE MIN MAX UNITS Input Capacitance CIN Any Input 1, + o C - 1 pf 1. All voltages referenced to device GND.. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics. 3. CL = pf, RL = K, Input TR, TF < ns. TABLE. POST IRRADIATION ELECTRICAL PERFORMANCE PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE MIN MAX UNITS Supply Current IDD = V, VIN = or GND 1, + o C -. A N Threshold Voltage VNTH =, ISS = -1 A 1, + o C V N Threshold Voltage VTN =, ISS = -1 A 1, + o C - 1 V Delta P Threshold Voltage VTP VSS = V, IDD = 1 A 1, + o C.. V P Threshold Voltage VTP VSS = V, IDD = 1 A 1, + o C - 1 V Delta Functional F = 1V, VIN = or GND = 3V, VIN = or GND 1 + o C VOH > / Propagation Delay Time TPHL TPLH 1. All voltages referenced to device GND.. CL = pf, RL = K, Input TR, TF < ns. VOL < / = 1,, 3, + o C x + o C Limit 3. See Table for + o C limit.. Read and Record V ns TABLE. BURN-IN AND LIFE TEST DELTA PARAMETERS + O C PARAMETER SYMBOL DELTA LIMIT Supply Current - SSI IDD.1 A Output Current (Sink) IOL % x Pre-Test Reading Output Current (Source) IOHA % x Pre-Test Reading TABLE. APPLICABLE SUBGROUPS CONFORMANCE GROUP MIL-STD-3 METHOD GROUP A SUBGROUPS READ AND RECORD Initial Test (Pre Burn-In) 1% 1, 7, 9 IDD, IOL, IOHA Interim Test 1 (Post Burn-In) 1% 1, 7, 9 IDD, IOL, IOHA Interim Test (Post Burn-In) 1% 1, 7, 9 IDD, IOL, IOHA PDA (Note 1) 1% 1, 7, 9, Deltas Interim Test 3 (Post Burn-In) 1% 1, 7, 9 IDD, IOL, IOHA PDA (Note 1) 1% 1, 7, 9, Deltas Final Test 1%, 3, A, B, 1, 11 Group A Sample 1,, 3, 7, A, B, 9, 1, 11 Group B Subgroup B- Sample 1,, 3, 7, A, B, 9, 1, 11, Deltas Subgroups 1,, 3, 9, 1, 11 Subgroup B- Sample 1, 7, 9 Group D Sample 1,, 3, A, B, 9 Subgroups 1, 3 NOTE: 1. % Parameteric, 3% Functional; Cumulative for Static 1 and. FN331 Rev. Page of December 199

5 CD9UBMS TABLE 7. TOTAL DOSE IRRADIATION MIL-STD-3 TEST READ AND RECORD CONFORMANCE GROUPS METHOD PRE-IRRAD POST-IRRAD PRE-IRRAD POST-IRRAD Group E Subgroup 1, 7, 9 Table 1, 9 Table TABLE. BURN-IN AND IRRADIATION TEST CONNECTIONS FUNCTION OPEN GROUND 9V -. Static Burn-In 1 (Note 1) Static Burn-In (Note 1) Dynamic Burn-In (Note 1) Irradiation (Note ),,,, 1, 1 1, 3,, 7, 9, 11, 13,,,, 1, 1 7 1, 3,, 9, 11, 13, ,,,, 1, 1 1, 3,, 9, 11, 13,,,, 1, 1 7 1, 3,, 9, 11, 13, 1 OSCILLATOR khz khz 1. Each pin except and GND will have a series resistor of 1K %, = 1V.. Each pin except and GND will have a series resistor of 7K %; Group E, Subgroup, sample size is dice/wafer, failures, =. Typical Performance Characteristics 17. OUTPUT VOLTAGE (VO) (V) SUPPLY VOLTAGE () = 1 VI VO OUTPUT VOLTAGE (VO) (V) o C +1 o C SUPPLY VOLTAGE () = 1 AMBIENT TEMPERATURE (T A ) = +1 o C INPUT VOLTAGE (VI) (V) FIGURE. MINIMUM AND MAXIMUM VOLTAGE TRANSFER INPUT VOLTAGE (VI) (V) FIGURE 3. TYPICAL VOLTAGE TRANSFER CHARACTERIS- TICS AS A FUNCTION OF TEMPERATURE Copyright Intersil Americas LLC All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see Intersil products are manufactured, assembled and tested utilizing ISO91 quality systems as noted in the quality certifications found at Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see FN331 Rev. Page of December 199

6 CD9UBMS Typical Performance Characteristics (Continued) OUTPUT VOLTAGE (VO) (V) SUPPLY VOLTAGE () = INPUT VOLTAGE (VI) (V) FIGURE. TYPICAL CURRENT AND VOLTAGE TRANSFER ) ID 7... SUPPLY CURRENT (IDD) (ma) OUTPUT LOW (SINK) CURRENT (IOL) (ma) GATE-TO-SOURCE VOLTAGE (VGS) = DRAIN-TO-SOURCE VOLTAGE (VDS) (V) FIGURE. TYPICAL OUTPUT LOW (SINK) CURRENT OUTPUT LOW (SINK) CURRENT (IOL) (ma) 1. GATE-TO-SOURCE VOLTAGE (VGS) = DRAIN-TO-SOURCE VOLTAGE (VDS) (V) DRAIN-TO-SOURCE VOLTAGE (VDS) (V) GATE-TO-SOURCE VOLTAGE (VGS) = OUTPUT HIGH (SOURCE) CURRENT (IOH) (ma) FIGURE. MINIMUM OUTPUT LOW (SINK) CURRENT FIGURE 7. TYPICAL OUTPUT HIGH (SOURCE) CURRENT DRAIN-TO-SOURCE VOLTAGE (VDS) (V) GATE-TO-SOURCE VOLTAGE (VGS) = OUTPUT HIGH (SOURCE) CURRENT (IOH) (ma) PROPAGATION DELAY TIME (tplh, tphl) (ns) 1 SUPPLY VOLTAGE () = 1 1 LOAD CAPACITANCE (CL) (pf) FIGURE. MINIMUM OUTPUT HIGH (SOURCE) CURRENT FIGURE 9. TYPICAL PROPAGATION DELAY TIME vs LOAD CAPACITANCE FN331 Rev. Page of December 199

7 CD9UBMS Typical Performance Characteristics (Continued) PROPAGATION DELAY TIME (tphl, tplh) (ns) 1 1 LOAD CAPACITANCE (CL) = pf 1pF 1 1 SUPPLY VOLTAGE () (V) FIGURE 1. TYPICAL PROPAGATION DELAY TIME vs SUPPLY VOLTAGE POWER DISSIPATION PER INVERTER ( W) SUPPLY VOLTAGE () = INPUT FREQUENCY (fi) (khz) FIGURE 1. TYPICAL DYNAMIC POWER DISSIPATION vs FREQUENCY LOAD CAPACITANCE (CL) = pf (11pF FIXTURE + 39pF EXT) CL = 1pF (11pF FIXTURE +pf EXT) TRANSITION TIME (tthl, ttlh) (ns) 1 1 SUPPLY VOLTAGE () = 1 LOAD CAPACITANCE (CL) (pf) 1 FIGURE 11. TYPICAL TRANSITION TIME vs LOAD CAPACITANCE NORMALIZED PROPAGATION DELAY TIME (tphl, tplh) 3 1 AMBIENT TEMPERATURE (T A ) = - o C TO +1 o C SUPPLY VOLTAGE () VOLTS FIGURE 13. VARIATION OF NORMALIZED PROPAGATION DELAY TIME (tphl AND tplh) WITH SUPPLY VOLTAGE PULSE GEN. tr = tf = ns IN 3 7 CL = pf k OUT INPUT INVERTING OUTPUT tr tthl tf ttlh 9% % 1% 9% % 1% tphl tplh FIGURE 1. DYNAMIC ELECTRICAL TEST CIRCUIT AND WAVEFORMS FN331 Rev. Page 7 of December 199

8 CD9UBMS 1/ CD9 1/3 CD9 IN OUT RS RT CT Rf 1 MEG FIGURE 1. HIGH-INPUT IMPEDANCE AMPLIFIER FOR TYPICAL COMPONENT VALUES AND CIRCUIT PERFORMANCE, SEE APPLICATION NOTE AN- FIGURE 1. TYPICAL RC OSCILLATOR CIRCUIT 1/ CD9 IN RS 1/3 CD9 OUT CS Rf XTAL RS CT FOR TYPICAL COMPONENT VALUES AND CIRCUIT PERFORMANCE, SEE APPLICATION AN- AND AN-39 FIGURE 17. TYPICAL CRYSTAL OSCILLATOR CIRCUIT FIGURE 1. INPUT PULSE SHAPING CIRCUIT (SCHMITT TRIGGER) Rf UPPER SWITCHING POINT RS + Rf VP Rf LOWER SWITCHING POINT VN Rf - RS Rf Rf > RS Chip Dimensions and Pad Layout DIE SIZE: X ( - 3) ( ) Dimension in parenthesis are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (1-3 inch). METALLIZATION: Thickness: 11kÅ 1kÅ, AL. PASSIVATION: 1.kÅ - 1.kÅ, Silane BOND PADS:. inches X. inches MIN DIE THICKNESS:.19 inches -.1 inches FN331 Rev. Page of December 199

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