DATASHEET CA3080, CA3080A. Features. Applications. Pinouts. Part Number Information. 2MHz, Operational Transconductance Amplifier (OTA)

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1 CA8, CA8A MHz, Operational Transconductance Amplifier (OTA) OBSOLETE PRODUCT NO RECOMMENDED REPLACEMENT contact our Technical Support Center at 888INTERSIL or DATASHEET FN Rev.. Jan, The CA8 and CA8A types are GatableGain Blocks which utilize the unique operationaltransconductanceamplifier (OTA) concept described in Application Note AN8, Applications of the CA8 and CA8A High Performance Operational Transconductance Amplifiers. The CA8 and CA8A types have differential input and a singleended, pushpull, class A output. In addition, these types have an amplifier bias input which may be used either for gating or for linear gain control. These types also have a high output impedance and their transconductance (g M ) is directly proportional to the amplifier bias current (I ABC ). The CA8 and CA8A types are notable for their excellent slew rate (V/ s), which makes them especially useful for multiplexer and fast unitygain voltage followers. These types are especially applicable for multiplexer applications because power is consumed only when the devices are in the ON channel state. The CA8A s characteristics are specifically controlled for applications such as samplehold, gaincontrol, multiplexing, etc. Part Number Information PART NUMBER (BRAND) TEMP. RANGE ( o C) PACKAGE CA8AE to 8 Ld PDIP E8. CA8AM (8A) PKG. NO. to 8 Ld SOIC M8. Features Slew Rate (Unity Gain, Compensated) V/ s Adjustable Power Consumption W to W Flexible Supply Voltage Range V to V Fully Adjustable Gain to g M R L Limit Tight g M Spread: CA : CA8A : Extended g M Linearity Decades Applications Sample and Hold Multiplexer Voltage Follower Pinouts NC INV. NONINV. V CA8 (PDIP, SOIC) TOP VIEW Multiplier Comparator 8 NC V AMPLIFIER BIAS CA8AM9 (8A) to 8 Ld SOIC Tape and Reel M8. CA8E to 8 Ld PDIP E8. CA8M (8) to 8 Ld SOIC M8. CA8M9 (8) to 8 Ld SOIC Tape and Reel M8. FN Rev.. Page of Jan,

2 CA8, CA8A Absolute Maximum Ratings Supply Voltage (Between V and V Terminal) V Differential Input Voltage V Input Voltage V to V Input Signal Current ma Amplifier Bias Current (I ABC ) ma Output Short Circuit Duration (Note ) No Limitation Operating Conditions Temperature Range CA o C to o C CA8A o C to o C Thermal Information Thermal Resistance (Typical, Note ) JA ( o C/W) JC ( o C/W) PDIP Package N/A SOIC Package N/A Maximum Junction Temperature (Plastic Package) o C Maximum Storage Temperature Range o C to o C Maximum Lead Temperature (Soldering s) o C (SOIC Lead Tips Only) CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES:. Short circuit may be applied to ground or to either supply.. JA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications For Equipment Design, V SUPPLY = V, Unless Otherwise Specified CA8 CA8A PARAMETER TEST CONDITIONS TEMP MIN TYP MAX MIN TYP MAX UNITS Input Offset Voltage I ABC = A.. mv I ABC = A.. mv Full mv Input Offset Voltage Change I ABC = A to A.. mv Input Offset Voltage Temp. Drift I ABC = A Full. V/ o C Input Offset Voltage Positive I ABC = A V/V Sensitivity Negative V/V Input Offset Current I ABC = A.... Input Bias Current I ABC = A A Full A Differential Input Current I ABC =, V DIFF = V.8.8 na Amplifier Bias Voltage I ABC = A.. V Input Resistance I ABC = A k Input Capacitance I ABC = A, f = MHz.. pf InputtoOutput Capacitance I ABC = A, f = MHz.. pf CommonMode InputVoltage Range I ABC = A to. to. to. to. V Forward Transconductance I ABC = A 9 9 S (Large Signal) Full S Output Capacitance I ABC = A f = MHz.. pf Output Resistance I ABC = A M Peak Output Current I ABC = A, R L = A I ABC = A, R L = A Full A FN Rev.. Page of Jan,

3 Q D CA8, CA8A Electrical Specifications For Equipment Design, V SUPPLY = V, Unless Otherwise Specified (Continued) CA8 CA8A PARAMETER TEST CONDITIONS TEMP MIN TYP MAX MIN TYP MAX UNITS Peak Output Voltage Positive I ABC = A, R L =.8.8 V Negative.. V Positive I ABC = A, R L =.. V Negative.. V Amplifier Supply Current I ABC = A ma Device Dissipation I ABC = A mw Magnitude of Leakage Current I ABC =, V TP =.8.8 na I ABC =, V TP = V.. na Propagation Delay I ABC = A ns CommonMode Rejection Ratio I ABC = A 8 8 db OpenLoop Bandwidth I ABC = A MHz Slew Rate Uncompensated V/ s Compensated V/ s Schematic Diagram D D V Q Q Q D Q 9 INVERTING NON INVERTING AMPLIFIER BIAS Q Q D Q Q 8 Q Q V D Typical Applications V = V V S = V. F k 9pF CA8, A k LOAD (SCOPE PROBE) M pf V/DIV.. F k V = V V/DIV.. F TIME (. s/div.) FIGURE. SCHEMATIC DIAGRAM OF THE CA8 AND CA8A IN A UNITYGAIN VOLTAGE FOLLOWER CONFIGURATION AND ASSOCIATED WAVEFORM FN Rev.. Page of Jan,

4 CA8, CA8A Typical Applications (Continued) pf 8.k VOLTAGECONTROLLED SOURCE k k M.V.V k.v SYMMETRY MAX FREQ. SET.V CA8A.k.V k.k FREQ. ADJUST.9 pf C.k 8pF C EXTERNAL SWEEPING MIN FREQ. SET.V BUFFER VOLTAGE FOLLOWER.V HIGH FREQ. SHAPE pf C CA.V. F. F.V k pf k CENTERING k C.8M.V k THRESHOLD DETECTOR CA8 k k C.V.V N9 HIGHFREQ. LEVEL ADJUST FIGURE.,,/ SINGLECONTROL FUNCTION GENERATOR MHz TO Hz NOTE: A SquareWave Signal Modulates The External Sweeping Input to Produce Hz and MHz, showing the,,/ frequency range of the function generator. FIGURE A. TWOTONE SIGNAL FROM THE FUNCTION GENERATOR NOTE: The bottom trace is the sweeping signal and the top trace is the actual generator output. The center trace displays the MHz signal via delayed oscilloscope triggering of the upper swept output signal. FIGURE B. TRIPLETRACE OF THE FUNCTION GENERATOR SWEEPING TO MHz FIGURE. FUNCTION GENERATOR DYNAMIC CHARACTERISTICS WAVEFORMS FN Rev.. Page of Jan,

5 CA8, CA8A Typical Applications (Continued).k V = V. F CA8A N8.k. F pf k SAMPLE V k STORAGE AND PHASE COMPENSATION NETWORK SLEW RATE (IN SAMPLE MODE) =.V/ s ACQUISITION TIME = s (NOTE) HOLD V NOTE: Time required for output to settle within mv of a V step. V = V FIGURE. SCHEMATIC DIAGRAM OF THE CA8A IN A SAMPLEHOLD CONFIGURATION STROBE k N9 SAMPLE V HOLD N9. F k CA8A. F k V k CA k V. F. F.k k pf pf k V. F pf SIMULATED LOAD NOT REQUIRED FIGURE. SAMPLE AND HOLD CIRCUIT FN Rev.. Page of Jan,

6 CA8, CA8A Typical Applications (Continued) Top Trace: Bottom Trace: Center Trace: Output Signal V/Div., s/div. Input Signal V/Div., s/div. Difference of Input and Output Signals Through Tektronix Amplifier A mv/div., s/div. FIGURE. LARGE SIGNAL RESPONSE AND SETTLING TIME FOR CIRCUIT SHOWN IN FIGURE Top Trace: System Output; mv/div., ns/div. Bottom Trace: Sampling Signal; V/Div., ns/div. FIGURE. SAMPLING RESPONSE FOR CIRCUIT SHOWN IN FIGURE Top Trace: Bottom Trace: Output; mv/div., ns/div. Input; mv/div., ns/div. FIGURE 8. AND RESPONSE FOR CIRCUIT SHOWN IN FIGURE THERMOCOUPLE.K 8 K K CA8A K F CA9 K W LOAD MT V AC G MT Hz K K.K N9 N9 R F 8 9 NOTE: All resistors / watt, unless otherwise specified. FIGURE 9. THERMOCOUPLE TEMPERATURE CONTROL WITH CA9 ZERO VOLTAGE SWITCH AS THE AMPLIFIER FN Rev.. Page of Jan,

7 CA8, CA8A Typical Applications (Continued) R K SAMPLE.V CONTROL AMPLIFIER CA8A (OTA) R K.V R K SAMPLE READOUT AMPLIFIER CA C 8.V C. F C. F R K C L e.g. pf (TYP) SAMPLE V HOLD. STROBE C. F R K C pf R NULLING STORAGE AND PHASE COMPENSATION R K pf.v R K C. F FIGURE. SCHEMATIC DIAGRAM OF THE CA8A IN A SAMPLEHOLD CIRCUIT WITH BIMOS AMPLIFIER Top Trace: Center Trace: Bottom Trace: Output; V/Div., s/div. Differential Comparison of Input and Output mv/div., s/div. Input; V/Div., s/div. Top Trace: Bottom Trace: Output mv/div., ns/div. Input mv/div., ns/div. FIGURE. LARGESIGNAL RESPONSE FOR CIRCUIT SHOWN IN FIGURE FIGURE. SMALLSIGNAL RESPONSE FOR CIRCUIT SHOWN IN FIGURE FN Rev.. Page of Jan,

8 CA8, CA8A Typical Applications (Continued) V = V mv mv IN CA8,A k I ABC = A.M OUT N9 V = V t PLH tphl FIGURE. PROPAGATION DELAY TEST CIRCUIT AND ASSOCIATED WAVEFORMS Typical Performance Curves OFFSET VOLTAGE (mv) SUPPLY VOLTS: V S = V o C o 9 o C C o C o C 9 o C o C o C o C o C 8. OFFSET (na) SUPPLY VOLTS: V S = V o C o C. o C.. FIGURE. OFFSET VOLTAGE vs AMPLIFIER BIAS FIGURE. OFFSET vs AMPLIFIER BIAS BIAS (na) SUPPLY VOLTS: V S = V o C o C o C PEAK ( A) SUPPLY VOLTS: V S = V LOAD RESISTANCE = o C o C o C.. FIGURE. BIAS vs AMPLIFIER BIAS.. FIGURE. PEAK vs AMPLIFIER BIAS FN Rev.. Page 8 of Jan,

9 CA8, CA8A Typical Performance Curves (Continued) PEAK VOLTAGE (V) COMMON MODE VOLTAGE (V)... SUPPLY VOLTS: V S = V T A = o C LOAD RESISTANCE = V CMR V OM V OM. V CMR. AMPLIFIER SUPPLY ( A). SUPPLY VOLTS: V S = V o C o C, o C o C o C o C. FIGURE 8. PEAK VOLTAGE vs AMPLIFIER BIAS FIGURE 9. AMPLIFIER SUPPLY vs AMPLIFIER BIAS DEVICE POWER DISSIPATION ( W) T A = o C V S = V V S = V V S = V. FORWARD TRANSCONDUCTANCE ( S) SUPPLY VOLTS: V S = V o C o C o C. FIGURE. TOTAL POWER DISSIPATION vs AMPLIFIER BIAS FIGURE. TRANSCONDUCTANCE vs AMPLIFIER BIAS V V TEST POINT (V TP ) V CA8, A MAGNITUDE OF LEAKAGE (na) SUPPLY VOLTS: V S = V V = V = V = V V.. TEMPERATURE ( o C) FIGURE. LEAKAGE TEST CIRCUIT FIGURE. LEAKAGE vs TEMPERATURE FN Rev.. Page 9 of Jan,

10 CA8, CA8A Typical Performance Curves (Continued) V DIFF = V V = V CA8, A V = V DIFFERENTIAL (pa) SUPPLY VOLTS: V S = V o C o C DIFFERENTIAL VOLTAGE (V) FIGURE. DIFFERENTIAL TEST CIRCUIT FIGURE. vs DIFFERENTIAL VOLTAGE SUPPLY VOLTS: V S = V T A = o C 9 SUPPLY VOLTS: V S = V RESISTANCE (M )... AMPLIFIER BIAS VOLTAGE (mv) 8 o C o C o C. FIGURE. RESISTANCE vs AMPLIFIER BIAS FIGURE. AMPLIFIER BIAS VOLTAGE vs AMPLIFIER BIAS AND CAPACITANCE (pf) SUPPLY VOLTS: V S = V f = MHz T A = o C. C O C I RESISTANCE (M ) SUPPLY VOLTS: V S = V T A = o C. FIGURE 8. AND CAPACITANCE vs AMPLI FIER BIAS FIGURE 9. RESISTANCE vs AMPLIFIER BIAS FN Rev.. Page of Jan,

11 CA8, CA8A Typical Performance Curves (Continued) V. F CA8, A. F TO CAPACITANCE (pf) f = MHz T A = o C V 8 8 POSITIVE AND NEGATIVE SUPPLY VOLTAGE (V) FIGURE. TO CAPACITANCE TEST CIRCUIT FIGURE. TO CAPACITANCE vs SUPPLY VOLTAGE Copyright Intersil Americas LLC. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see Intersil products are manufactured, assembled and tested utilizing ISO9 quality systems as noted in the quality certifications found at Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see FN Rev.. Page of Jan,