NSTB1002DXV5T1G, NSTB1002DXV5T5G
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1 NSTB002DXV5TG, NSTB002DXV5T5G Preferred Devices Dual Common BaseCollector Bias Resistor Transistors NPN and PNP Silicon Surface Mount Transistors with Monolithic Bias Resistor Network The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a baseemitter resistor. These digital transistors are designed to replace a single device and its external resistor bias network. The BRT eliminates these individual components by integrating them into a single device. In the NSTB002DXV5TG series, two complementary devices are housed in the SOT553 package which is ideal for low power surface mount applications where board space is at a premium. Simplifies Circuit Design Reduces Board Space Reduces Component Count Available in 8 mm, 7 inch Tape and Reel These are PbFree Devices MAXIMUM RATINGS (T A = unless otherwise noted, common for Q and Q 2, minus sign for Q (PNP) omitted) Rating Symbol Q Value Q2 Unit Collector-Base Voltage V CBO Vdc Collector-Emitter Voltage V CEO Vdc Collector Current I C madc THERMAL CHARACTERISTICS Characteristic (One Junction Heated) Symbol Max Unit Total Device Dissipation T A = Derate above Thermal Resistance Junction-to-Ambient P D 357 (Note ) 2.9 (Note ) mw mw/ C R JA 350 (Note ) C/W Characteristic (Both Junctions Heated) Symbol Max Unit Total Device Dissipation T A = Derate above Thermal Resistance Junction-to-Ambient P D 500 (Note ) 4.0 (Note ) mw mw/ C R JA 250 (Note ) C/W Junction and Storage Temperature T J, T stg 55 to +50 C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.. Minimum Pad Q 3 2 R R R SOT553 CASE 463B MARKING DIAGRAM 5 U9 M Q2 U9 = Specific Device Code M = Date Code = PbFree Package (Note: Microdot may be in either location) ORDERING INFORMATION Device Package Shipping NSTB002DXV5TG SOT553 (PbFree) NSTB002DXV5T5G SOT553 (PbFree) 4 mm pitch 4000/Tape & Reel 2 mm pitch 8000/Tape & Reel Preferred devices are recommended choices for future use and best overall value. Semiconductor Components Industries, LLC, 2006 January, 2006 Rev. 0 Publication Order Number: NSTB002DXV5/D
2 NSTB002DXV5TG, NSTB002DXV5T5G ELECTRICAL CHARACTERISTICS (T A = unless otherwise noted) Characteristic Symbol Min Typ Max Unit Q TRANSISTOR: PNP OFF CHARACTERISTICS Collector Emitter Breakdown Voltage (Note 2) V (BR)CEO 40 Vdc Collector Base Breakdown Voltage V (BR)CBO 40 Vdc Emitter Base Breakdown Voltage V (BR)EBO 5.0 Vdc Base Cutoff Current I BL 50 nadc Collector Cutoff Current I CEX 50 nadc ON CHARACTERISTICS (Note 2) DC Current Gain (I C = 0. madc, V CE =.0 Vdc) (I C =.0 madc, V CE =.0 Vdc) (I C = 0 madc, V CE =.0 Vdc) (I C = 50 madc, V CE =.0 Vdc) (I C = 00 madc, V CE =.0 Vdc) h FE Collector Emitter Saturation Voltage (I C = 0 madc, I B =.0 madc) (I C = 50 madc, I B = 5.0 madc) Base Emitter Saturation Voltage (I C = 0 madc, I B =.0 madc) (I C = 50 madc, I B = 5.0 madc) V CE(sat) V BE(sat) SMALLSIGNAL CHARACTERISTICS CurrentGain Bandwidth Product f T 250 MHz Output Capacitance C obo 4.5 pf Input Capacitance C ibo 0.0 pf Input Impedance (V CE = 0 Vdc, I C =.0 madc, f =.0 khz) h ie k Voltage Feedback Ratio (V CE = 0 Vdc, I C =.0 madc, f =.0 khz) Vdc Vdc h re 0. 0 X 0 4 Small Signal Current Gain (V CE = 0 Vdc, I C =.0 madc, f =.0 khz) Output Admittance (V CE = 0 Vdc, I C =.0 madc, f =.0 khz) Noise Figure (V CE = 5.0 Vdc, I C = 00 Adc, R S =.0 k, f =.0 khz) h fe h oe mhos nf 4.0 db SWITCHING CHARACTERISTICS Delay Time (V CC = 3.0 Vdc, V BE = 0.5 Vdc) t d 35 Rise Time (I C = 0 madc, I B =.0 madc) t r 35 Storage Time (V CC = 3.0 Vdc, I C = 0 madc) t s 225 Fall Time (I B = I B2 =.0 madc) t f 75 Q2 TRANSISTOR: NPN OFF CHARACTERISTICS ns ns Collector-Base Cutoff Current (V CB = 50 V, I E = 0) Collector-Emitter Cutoff Current (V CB = 50 V, I B = 0) Emitter-Base Cutoff Current (V EB = 6.0, I C = 5.0 ma) I CBO 00 nadc I CEO 500 nadc I EBO 0. madc 2. Pulse Test: Pulse Width 300 s; Duty Cycle 2.0%. 2
3 NSTB002DXV5TG, NSTB002DXV5T5G ELECTRICAL CHARACTERISTICS (T A = unless otherwise noted) Characteristic Symbol Min Typ Max Unit ON CHARACTERISTICS Collector-Base Breakdown Voltage (I C = 0 A, I E = 0) Collector-Emitter Breakdown Voltage (I C = 2.0 ma, I B = 0) DC Current Gain (V CE = 0 V, I C = 5.0 ma) CollectorEmitter Saturation Voltage (I C = 0 ma, I B = 0.3 ma) Output Voltage (on) (V CC = 5.0 V, V B = 2.5 V, R L =.0 k ) Output Voltage (off) (V CC = 5.0 V, V B = 0.5 V, R L =.0 k ) V (BR)CBO 50 Vdc V (BR)CEO 50 Vdc h FE V CE(SAT) 0.25 Vdc V OL 0.2 Vdc V OH 4.9 Vdc Input Resistor R k Resistor Ratio R/R Pulse Test: Pulse Width 300 s; Duty Cycle 2.0%. 250 PD, POWER DISSIPATION (MILLIWATTS) R JA = 833 C/W T A, AMBIENT TEMPERATURE ( C) Figure. Derating Curve 3
4 NSTB002DXV5TG, NSTB002DXV5T5G h FE, DC CURRENT GAIN (NORMALIZED) TYPICAL ELECTRICAL CHARACTERISTICS PNP TRANSISTOR T J = C V CE =.0 V Figure 2. DC Current Gain 4
5 NSTB002DXV5TG, NSTB002DXV5T5G TYPICAL ELECTRICAL CHARACTERISTICS NPN TRANSISTOR V CE(sat), MAXIMUM COLLECTOR VOLTAGE (VOLTS) Cob, CAPACITANCE (pf) I C /I B = 0 T A = Figure 3. V CE(sat) versus I C V R, REVERSE BIAS VOLTAGE (VOLTS) 75 C f = MHz I E = 0 ma T A = 50 hfe, DC CURRENT GAIN C Figure 4. DC Current Gain T A = V O = 5 V V CE = 0 V T A = 75 C V in, INPUT VOLTAGE (VOLTS) Figure 5. Output Capacitance Figure 6. Output Current versus Input Voltage 00 V O = 0.2 V Vin, INPUT VOLTAGE (VOLTS) 0 T A = 75 C Figure 7. Input Voltage versus Output Current 5
6 NSTB002DXV5TG, NSTB002DXV5T5G PACKAGE DIMENSIONS SOT553 XV5 SUFFIX CASE 463B0 ISSUE B D X e E Y b 5 PL 0.08 (0.003) M X Y A L H E c NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION: MILLIMETERS 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. MILLIMETERS INCHES DIM MIN NOM MAX MIN NOM MAX A b c D E e 0.50 BSC BSC L HE SOLDERING FOOTPRINT* SCALE 20: mm inches *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 632, Phoenix, Arizona USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 29 Kamimeguro, Meguroku, Tokyo, Japan Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative. NSTB002DXV5/D
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