ICM7555, ICM7556. General Purpose Timers. Features. Ordering Information. Applications. Pinouts ICM7555 (PDIP, SOIC) TOP VIEW FN2867.

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1 IM, IM Data Sheet ovember F. General urpose Timers The IM and IM are MOS R timers providing significantly improved performance over the standard SE/E/ and timers, while at the same time being direct replacements for those devices in most applications. Improved parameters include low supply current, wide operating supply voltage range, low THRESHOLD, and currents, no crowbarring of the supply current during output transitions, higher frequency performance and no requirement to decouple OTROL for stable operation. Specifically, the IM and IM are stable controllers capable of producing accurate time delays or frequencies. The IM is a dual IM, with the two timers operating independently of each other, sharing only V+ and GD. In the one shot mode, the pulse width of each circuit is precisely controlled by one external resistor and capacitor. For astable operation as an oscillator, the free running frequency and the duty cycle are both accurately controlled by two external resistors and one capacitor. Unlike the regular bipolar / devices, the OTROL terminal need not be decoupled with a capacitor. The circuits are triggered and reset on falling (negative) waveforms, and the output inverter can source or sink currents large enough to drive TTL loads, or provide minimal offsets to drive MOS loads. Applications recision Timing ulse Generation Sequential Timing Time Delay Generation ulse Width Modulation ulse osition Modulation Missing ulse Detector Features Exact Equivalent in Most ases for SE/E/ or TL/ Low Supply urrent - IM µa - IM µa Extremely Low Input urrents pa High Speed Operation MHz Guaranteed Supply Voltage Range V to V Temperature Stability %/ o at o ormal Reset Function - o rowbarring of Supply During Output Transition an be Used with Higher Impedance Timing Elements than Regular / for Longer R Time onstants Timing from Microseconds through Hours Operates in Both Astable and Monostable Modes Adjustable Duty ycle High Output Source/Sink Driver can Drive TTL/MOS Outputs have Very Low Offsets, HI and LO Ordering Information ART UMBER TEM. RAGE( o ) AKAGE KG. O. IMBA (BA) to Ld SOI M. IMIBA (IBA) - to Ld SOI M. IMIA - to Ld DI E. IMID - to Ld DI E. IMMJD - to Ld ERDI F. inouts IM (DI, SOI) TO VIEW IM (DI, ERDI) TO VIEW GD THRESHOLD OTROL THRESH- OLD OTROL THRESHOLD OTROL 9 GD AUTIO: These devices are sensitive to electrostatic discharge; follow proper I Handling rocedures. --ITERSIL or -- Intersil (and design) is a registered trademark of Intersil Americas Inc. opyright Intersil Americas Inc.. All Rights Reserved All other trademarks mentioned are the property of their respective owners.

2 IM, IM Absolute Maximum Ratings Supply Voltage V Input Voltage Trigger, ontrol Voltage, Threshold, Reset (ote ) V+ +.V to GD -.V Output urrent ma Operating onditions Temperature Range IM o to o IMI, IMI o to o IMM o to o Thermal Information Thermal Resistance (Typical, ote ) θ JA ( o /W) θ J ( o /W) Lead ERDI ackage Lead DI ackage /A Lead DI ackage /A Lead SOI ackage /A Maximum Junction Temperature (Hermetic ackage) o Maximum Junction Temperature (lastic ackage) o Maximum Storage Temperature Range o to o Maximum Lead Temperature (Soldering s) o (SOI - Lead Tips Only) AUTIO: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. OTES:. Due to the SR structure inherent in the MOS process used to fabricate these devices, connecting any terminal to a voltage greater than V+ +.V or less than V- -.V may cause destructive latchup. For this reason it is recommended that no inputs from external sources not operating from the same power supply be applied to the device before its power supply is established. In multiple supply systems, the supply of the IM/ must be turned on first.. θ JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief 9 for details. Electrical Specifications Applies to IM and IM, Unless Otherwise Specified (OTE ) - o TO o ARAMETER SYMBOL TEST ODITIOS MI TY MAX MI TY MAX UITS Static Supply urrent I DD IM = V µa = V µa IM = V µa = V µa Monostable Timing Accuracy R A = K, =.µf, = V % µs Drift with Temperature (ote ) = V ppm/ o = V ppm/ o = V ppm/ o Drift with Supply (ote ) = V to V %/V Astable Timing Accuracy R A = R B = K, =.µf, = V % µs Drift with Temperature (ote ) = V ppm/ o = V ppm/ o = V ppm/ o Drift with Supply (ote ) = V to V %/V Threshold Voltage V TH = V - % Trigger Voltage V TRIG = V - % Trigger urrent I TRIG = V na Threshold urrent I TH = V na ontrol Voltage V V = V - % Reset Voltage V RST = V to V V

3 IM, IM Electrical Specifications Applies to IM and IM, Unless Otherwise Specified (OTE ) - o TO o ARAMETER SYMBOL TEST ODITIOS MI TY MAX MI TY MAX UITS Reset urrent I RST = V na Discharge Leakage I DIS = V na Output Voltage V OL = V, I SIK = ma V = V, I SIK =.ma V V OH = V, I SOURE =.ma V = V, I SOURE =.ma V Discharge Output Voltage V DIS = V, I SIK = ma V = V, I SIK = ma V Supply Voltage (ote ) Functional Operation V Output Rise Time (ote ) t R R L = M, L = pf, = V ns Output Fall Time (ote ) t F R L = M, L = pf, = V ns Oscillator Frequency (ote ) f MAX = V, R A = Ω, R B = Ω, = pf MHz OTES:. These parameters are based upon characterization data and are not tested.. Applies only to military temperature range product (M suffix). Functional Diagram THRESHOLD OTROL R OMARATOR A + R - FLI-FLO DRIVERS + - n R OMARATOR B GD OTE: This functional diagram reduces the circuitry down to its simplest equivalent components. Tie down unused inputs. TRUTH TABLE THRESHOLD SWITH Don t are Don t are Low Low On > / (V+) > / (V+) High Low On < / (V+) > / (V+) High Stable Stable Don t are < / (V+) High High Off OTE: will dominate all other inputs: will dominate over THRESHOLD.

4 IM, IM Schematic Diagram R THRESHOLD OTROL R R GD R = kω ±% (TY) Application Information General The IM/ devices are, in most instances, direct replacements for the E/SE / devices. However, it is possible to effect economies in the external component count using the IM/. Because the bipolar / devices produce large crowbar currents in the output driver, it is necessary to decouple the power supply lines with a good capacitor close to the device. The / devices produce no such transients. See Figure. SULY URRET (ma) SE/E IM/ TIME (ns) FIGURE. SULY URRET TRASIET OMARED WITH A STADARD BIOLAR DURIG A TRASITIO The IM/ produces supply current spikes of only ma - ma instead of ma - ma and supply decoupling is normally not necessary. Also, in most instances, the OTROL decoupling capacitors are not required since the input impedance of the MOS comparators on chip are very high. Thus, for many applications capacitors can be saved using an IM, and capacitors with an IM. OWER SULY OSIDERATIOS Although the supply current consumed by the IM/ devices is very low, the total system supply current can be high unless the timing components are high impedance. Therefore, use high values for R and low values for in Figures and. R GD THRESHOLD FIGURE A. ASTABLE OERATIO OTROL K ALTER- ATE OTIOAL AAITOR

5 IM, IM DRIVE AABILITY The output driver consists of a MOS inverter capable of driving most logic families including MOS and TTL. As such, if driving MOS, the output swing at all supply voltages will equal the supply voltage. At a supply voltage of.v or more the IM/ will drive at least standard TTL loads. ASTABLE OERATIO The circuit can be connected to trigger itself and free run as a multivibrator, see Figure A. The output swings from rail to rail, and is a true % duty cycle square wave. (Trip points and output swings are symmetrical). Less than a % frequency variation is observed, over a voltage range of +V to +V. The timer can also be connected as shown in Figure B. In this circuit, the frequency is: f =. ( R A + R B ) The duty cycle is controlled by the values of R A and R B, by the equation: R A R B OTIOAL AAITOR FIGURE B. ALTERATE ASTABLE OFIGURATIO f = R D = ( R A + R B ) ( R A + R B ) t = -ln (/) R A =.R A V IM OTROL The OTROL terminal permits the two trip voltages for the THRESHOLD and internal comparators to be controlled. This provides the possibility of oscillation frequency modulation in the astable mode or even inhibition of oscillation, depending on the applied voltage. In the monostable mode, delay times can be changed by varying the applied voltage to the OTROL pin. The terminal is designed to have essentially the same trip voltage as the standard bipolar /, i.e.,.v to.v. At all supply voltages it represents an extremely high input impedance. The mode of operation of the function is, however, much improved over the standard bipolar / in that it controls only the internal flip-flop, which in turn controls simultaneously the state of the and pins. This avoids the multiple threshold problems sometimes encountered with slow falling edges in the bipolar devices. OTIOAL AAITOR R A THRESHOLD OTROL FIGURE. MOOSTABLE OERATIO MOOSTABLE OERATIO In this mode of operation, the timer functions as a one-shot, see Figure. Initially the external capacitor () is held discharged by a transistor inside the timer. Upon application of a negative pulse to pin, the internal flip-flop is set which releases the short circuit across the external capacitor and drives the high. The voltage across the capacitor now increases exponentially with a time constant t = R A. When the voltage across the capacitor equals / V+, the comparator resets the flip-flop, which in turn discharges the capacitor rapidly and also drives the to its low state. must return to a high state before the can return to a low state.

6 IM, IM Typical erformance urves MIIMUM ULSE WIDTH (ns) 9 = V = V = V LOWEST LEVEL OF ULSE (% ) SULY URRET (IM) (µa) T A = - o T A = o SULY (V) SULY URRET (IM) (µa) FIGURE. MIIMUM ULSE WIDTH REQUIRED FOR IG FIGURE. SULY URRET vs SULY SOURE URRET (ma) = V = V = V SIK URRET (ma).. T A = - o = V = V = V REFEREED TO (V) LOW (V) FIGURE. SOURE URRET vs FIGURE. SIK URRET vs T A = o SIK URRET (ma).. = V = V = V SIK URRET (ma).. = V = V = V..... LOW (V) FIGURE. SIK URRET vs..... LOW (V) FIGURE 9. SIK URRET vs

7 IM, IM Typical erformance urves (ontinued) ORMALIZED FREQUEY DEVIATIO (%) R A = R B = kω =.µf R A = R B = MΩ = pf.... SULY (V) FIGURE. ORMALIZED FREQUEY STABILITY I THE ASTABLE MODE vs SULY ROAGATIO DELAY (ns) = V T A = o T A = - o LOWEST LEVEL OF ULSE (% ) FIGURE. ROAGATIO DELAY vs LEVEL OF ULSE AAITAE (F). m m m µ µ µ n n n p p (R A + R B ) kω kω kω MΩ MΩ MΩ p. K K K M M FREQUEY (Hz) FIGURE. FREE RUIG FREQUEY vs R A, R B AD SIK URRET (ma).. = V = V = V..... LOW (V) FIGURE. URRET vs ORMALIZED FREQUEY DEVIATIO (%) R A = R B = kω =.µf = V = V = V TEMERATURE ( o ) = V FIGURE. ORMALIZED FREQUEY STABILITY I THE ASTABLE MODE vs TEMERATURE AAITAE (F). m m m µ µ µ n n n p p kω kω kω MΩ MΩ MΩ p n µ µ µ m m m TIME DELAY (s) FIGURE. TIME DELAY I THE MOOSTABLE MODE vs R A AD R A

8 Small Outline lastic ackages (SOI) IM, IM IDEX AREA D e B.(.) M A M E -B- -A- -- SEATIG LAE A B S H A µ.(.) M B α.(.) L M h x o OTES:. Symbols are defined in the MO Series Symbol List in Section. of ublication umber 9.. Dimensioning and tolerancing per ASI Y.M-9.. Dimension D does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed.mm (. inch) per side.. Dimension E does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed.mm (. inch) per side.. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area.. L is the length of terminal for soldering to a substrate.. is the number of terminal positions.. Terminal numbers are shown for reference only. 9. The lead width B, as measured.mm (. inch) or greater above the seating plane, shall not exceed a maximum value of.mm (. inch).. ontrolling dimension: MILLIMETER. onverted inch dimensions are not necessarily exact. M. (JEDE MS--AA ISSUE ) LEAD ARROW BODY SMALL OUTLIE LASTI AKAGE IHES MILLIMETERS SYMBOL MI MAX MI MAX OTES A A B D E.9... e. BS. BS - H h L.... α o o o o - Rev. /9

9 Dual-In-Line lastic ackages (DI) IM, IM IDEX AREA BASE LAE SEATIG LAE D B -- -A- / B D e D E -B- A. (.) M A A L B S OTES:. ontrolling Dimensions: IH. In case of conflict between English and Metric dimensions, the inch dimensions control.. Dimensioning and tolerancing per ASI Y.M-9.. Symbols are defined in the MO Series Symbol List in Section. of ublication o. 9.. Dimensions A, A and L are measured with the package seated in JEDE seating plane gauge GS-.. D, D, and E dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed. inch (.mm).. E and e A are measured with the leads constrained to be perpendicular to datum --.. e B and e are measured at the lead tips with the leads unconstrained. e must be zero or greater.. B maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed. inch (.mm). 9. is the maximum number of terminal positions.. orner leads (,, / and / + ) for E., E., E., E., E. will have a B dimension of. -. inch (. -.mm). A e E L e A e B E. (JEDE MS--BA ISSUE D) LEAD DUAL-I-LIE LASTI AKAGE IHES MILLIMETERS SYMBOL MI MAX MI MAX OTES A A A B B...., D D E.... E.... e. BS. BS - e A. BS. BS e B L Rev. /9 9

10 Dual-In-Line lastic ackages (DI) IM, IM IDEX AREA BASE LAE SEATIG LAE D B -- -A- / B D e D E OTES:. ontrolling Dimensions: IH. In case of conflict between English and Metric dimensions, the inch dimensions control.. Dimensioning and tolerancing per ASI Y.M-9.. Symbols are defined in the MO Series Symbol List in Section. of ublication o. 9.. Dimensions A, A and L are measured with the package seated in JEDE seating plane gauge GS-.. D, D, and E dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed. inch (.mm).. E and e A are measured with the leads constrained to be perpendicular to datum --.. e B and e are measured at the lead tips with the leads unconstrained. e must be zero or greater.. B maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed. inch (.mm). 9. is the maximum number of terminal positions.. orner leads (,, / and / + ) for E., E., E., E., E. will have a B dimension of. -. inch (. -.mm). -B- A. (.) M A A L B S A e E L e A e B E. (JEDE MS--AA ISSUE D) LEAD DUAL-I-LIE LASTI AKAGE IHES MILLIMETERS SYMBOL MI MAX MI MAX OTES A A A B B D D E.... E.... e. BS. BS - e A. BS. BS e B L Rev. /9

11 IM, IM eramic Dual-In-Line Frit Seal ackages (ERDI) BASE LAE SEATIG LAE S b ccc M bbb S b A - B A - B S D A A e D S OTES:. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded area shown. The manufacturer s identification shall not be used as a pin one identification mark.. The maximum limits of lead dimensions b and c or M shall be measured at the centroid of the finished lead surfaces, when solder dip or tin plate lead finish is applied.. Dimensions b and c apply to lead base metal only. Dimension M applies to lead plating and finish thickness.. orner leads (,, /, and /+) may be configured with a partial lead paddle. For this configuration dimension b replaces dimension b.. This dimension allows for off-center lid, meniscus, and glass overrun.. Dimension Q shall be measured from the seating plane to the base plane.. Measure dimension S at all four corners.. is the maximum number of terminal positions. 9. Dimensioning and tolerancing per ASI Y.M ontrolling dimension: IH. E L M c ea/ S D S aaa M A - B LEAD FIISH BASE METAL b M (b) SETIO A-A -D- -A- Q -- A -Bα S ea c D S (c) F. MIL-STD- GDI-T (D-, OFIGURATIO A) LEAD ERAMI DUAL-I-LIE FRIT SEAL AKAGE IHES MILLIMETERS SYMBOL MI MAX MI MAX OTES A b.... b.... b b.... c.... c.... D E...9. e. BS. BS - ea. BS. BS - ea/. BS. BS - L Q.... S α 9 o o 9 o o - aaa bbb ccc M -. -., Rev. /9 All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9 quality systems. Intersil orporation s quality certifications can be viewed at Intersil products are sold by description only. Intersil orporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. o license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil orporation and its products, see

Description PART NUMBER (BRAND) ICM7555CBA (7555CBA) ICM7555IBA (7555IBA) ICM7555 (METAL CAN) TOP VIEW V DD AND CASE 8 1 DISCHARGE GND

Description PART NUMBER (BRAND) ICM7555CBA (7555CBA) ICM7555IBA (7555IBA) ICM7555 (METAL CAN) TOP VIEW V DD AND CASE 8 1 DISCHARGE GND IM, IM ovember 99 General urpose Timers Features Exact Equivalent in Most ases for SE/E/ or TL/ Low Supply urrent - IM................................ 0µA - IM............................... 0µA Extremely