MC100EP16VS. 3.3V / 5V ECL Differential Receiver/Driver with Variable Output Swing

Transcription

1 3.3V / 5V ECL ifferential Receiver/river with Variable Output Swing escription The MC00EP6VS is a differential receiver with variable output amplitude. The device is functionally equivalent to the 00EP6 with an input pin that controls the amplitude of the outputs. The V CTRL input pin controls the output amplitude of the EP6VS and is referenced to V CC. ( Figure 4.) The operational range of the V CTRL input is from V BB (max output amplitude) to V CC (min output amplitude). ( Figure 3.) A variable resistor between the V CC and V BB pins, with the wiper driving V CTRL, can control the output amplitude. Typical application circuits and a V CTRL Voltage vs. Output Amplitude graph are described in this data sheet. When left open, the V CTRL pin will be internally pulled down to V EE and operate as a standard EP6, with 00% output amplitude. The V BB pin, an internally generated voltage supply, is available to this device only. For single ended input conditions, the unused differential input is connected to V BB as a switching reference voltage. V BB may also rebias AC coupled inputs. When used, decouple V BB and V CC via a 0.0 F capacitor and limit current sourcing or sinking to ma. When not used, V BB should be left open. Features 220 ps Propagation elay Maximum Frequency > 4 GHz Typical ( Graph) The 00 Series Contains Temperature Compensation PECL Mode Operating Range: V CC = 3.0 V to 5.5 V with V EE = 0 V NECL Mode Operating Range: V CC = 0 V with V EE = 3.0 V to 5.5 V Open Input efault State Output Will efault LOW with Inputs Open or at V EE Pb Free Packages are Available SOIC SUFFIX CASE 75 TSSOP T SUFFIX CASE 94R FN MN SUFFIX CASE 506AA A L Y W M MARKING IAGRAMS* = Assembly Location = Wafer Lot = Year = Work Week = ate Code = Pb Free Package KP62 ALYW *For additional marking information, refer to Application Note AN002/. KEP62 ALYW 3H M 4 (Note: Microdot may be in either location) ORERING INFORMATION detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet. Semiconductor Components Industries, LLC, 200 August, 200 Rev. 6 Publication Order Number: MC00EP6VS/

2 Table. PIN ESCRIPTION V CTRL V CC PIN FUNCTION *, ** ECL ata Inputs 2, 3 2 7, ECL ata Outputs V CTRL * Output Swing Control 6, 7 V BB Reference Voltage Output V CC V EE Positive Supply Negative Supply 5 NC No Connect V BB 4 5 V EE Figure. Lead Pinout (Top View) and Logic iagram EP (FN only) Thermal exposed pad must be connected to a sufficient thermal conduit. Electrically connect to the most negative supply (GN) or leave unconnected, floating open. * Pins will default LOW when left open. ** Pins will default to V CC /2 when left open. Table 2. ATTRIBUTES Characteristics Internal Input Pulldown Resistor Internal Input Pullup Resistor ES Protection Human Body Model Machine Model Charged evice Model Value 75 k 37.5 k > 4 kv > 200 V > 2 kv Moisture Sensitivity, Indefinite Time Out of rypack (Note ) Pb Pkg Pb Free Pkg SOIC TSSOP FN Level Level Level Level Level 3 Level Flammability Rating Oxygen Index: 2 to 34 UL 94 V 0.25 in Transistor Count Meets or exceeds JEEC Spec EIA/JES7 IC Latchup Test. For additional information, see Application Note AN003/. 40 evices 2

3 Table 3. MAXIMUM RATINGS Symbol Parameter Condition Condition 2 Rating Unit V CC PECL Mode Power Supply V EE = 0 V 6 V V EE NECL Mode Power Supply V CC = 0 V 6 V V I PECL Mode Input Voltage NECL Mode Input Voltage V EE = 0 V V CC = 0 V I out Output Current Continuous Surge V I V CC 6 V I V EE 6 I BB V BB Sink/Source ± ma T A Operating Temperature Range 40 to +5 C T stg Storage Temperature Range 65 to +50 C JA Thermal Resistance (Junction to Ambient) 0 lfpm 500 lfpm SOIC SOIC JC Thermal Resistance (Junction to Case) Standard Board SOIC 4 to 44 C/W JA Thermal Resistance (Junction to Ambient) 0 lfpm 500 lfpm TSSOP TSSOP JC Thermal Resistance (Junction to Case) Standard Board TSSOP 4 to 44 ± 5% C/W JA Thermal Resistance (Junction to Ambient) 0 lfpm 500 lfpm FN FN V V ma ma C/W C/W C/W C/W C/W C/W T sol Wave Solder Pb Pb Free <2 to 3 24 C <2 to C C JC Thermal Resistance (Junction to Case) (Note 2) FN 35 to 40 C/W Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 2. JEEC standard multilayer board 2S2P (2 signal, 2 power) 3

4 Table 4. C CHARACTERISTICS, PECL V CC = 3.3 V, V EE = 0 V (Note 3) 40 C 25 C 5 C Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit I EE Power Supply Current ma V OH Output HIGH Voltage (Max Swing) mv (Note 4) V CC V CTRL V EE V OL Output LOW Voltage (Max Swing) (Note 4) V CTRL V BB mv VCC V CTRL > V BB V CTRL = V CC (Min Swing) V IH, Input HIGH Voltage (Single Ended) mv V IL, Input LOW Voltage (Single Ended) mv V BB Output Voltage Reference mv V CTRL Input Voltage (V CTRL ) V EE V CC V EE V CC V EE V CC mv V IHCMR Input HIGH Voltage Common Mode Range (ifferential Configuration) (Note 5) V I IH Input HIGH Current A I IL Input LOW Current A NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. evice specification limit values are applied individually under normal operating conditions and not valid simultaneously. 3. Input and output parameters vary : with V CC. V EE can vary +0.3 V to 2.2 V. 4. All loading with 50 to V CC 2.0 V. V OH does not change with V CTRL. V OL changes with V CTRL. V CTRL is referenced to V CC. 5. V IHCMR min varies : with V EE, V IHCMR max varies : with V CC. The V IHCMR range is referenced to the most positive side of the differential input signal. 4

5 Table 5. C CHARACTERISTICS, PECL V CC = 5.0 V, V EE = 0 V (Note 6) 40 C 25 C 5 C Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit I EE Power Supply Current ma V OH Output HIGH Voltage (Note 7) V CC > V CTRL > V EE mv V OL Output LOW Voltage (Max Swing) (Note 7) V CTRL V BB mv VCC V CTRL > V BB V CTRL = V CC (Min Swing) V IH, Input HIGH Voltage (Single Ended) mv V IL, Input LOW Voltage (Single Ended) mv V CTRL Input Voltage (V CTRL ) V EE V CC V EE V CC V EE V CC mv V BB Output Voltage Reference mv V IHCMR Input HIGH Voltage Common Mode Range (ifferential Configuration) (Note ) V I IH Input HIGH Current A I IL Input LOW Current A NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. evice specification limit values are applied individually under normal operating conditions and not valid simultaneously. 6. Input and output parameters vary : with V CC. V EE can vary +2.0 V to V. 7. All loading with 50 to V CC 2.0 V. V OH does not change with V CTRL. V OL changes with V CTRL. V CTRL is referenced to V CC.. V IHCMR min varies : with V EE, V IHCMR max varies : with V CC. The V IHCMR range is referenced to the most positive side of the differential input signal. 5

6 Table 6. C CHARACTERISTICS, NECL V CC = 0 V; V EE = 5.5 V to 3.0 V (Note 9) 40 C 25 C 5 C Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit I EE Power Supply Current ma V OH Output HIGH Voltage (Note 0) V CC > V CTRL > V EE mv V OL Output LOW Voltage (Max Swing) (Note 0) V CTRL V BB mv VCC V CTRL > V BB V CTRL = V CC (Min Swing) V IH, Input HIGH Voltage (Single Ended) mv V IL, Input LOW Voltage (Single Ended) mv V BB Output Voltage Reference mv V CTRL Input Voltage (V CTRL ) V EE V CC V EE V CC V EE V CC mv V IHCMR Input HIGH Voltage Common Mode Range (ifferential Configuration) (Note ) V EE V EE V EE V I IH Input HIGH Current A I IL Input LOW Current A NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. evice specification limit values are applied individually under normal operating conditions and not valid simultaneously. 9. Input and output parameters vary : with V CC. 0.All loading with 50 to V CC 2.0 V. V OH does not change with V CTRL. V OL changes with V CTRL. V CTRL is referenced to V CC.. V IHCMR min varies : with V EE, V IHCMR max varies : with V CC. The V IHCMR range is referenced to the most positive side of the differential input signal. Table 7. AC CHARACTERISTICS V CC = 0 V; V EE = 3.0 V to 5.5 V or V CC = 3.0 V to 5.5 V; V EE = 0 V (Note 2) 40 C 25 C 5 C Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit f max Maximum Toggle Frequency ( Figure 6. F max /JITTER) > 4 > 4 > 4 GHz t PLH, t PHL Propagation elay to Output ifferential Max Swing Min Swing t SKEW uty Cycle Skew (Note 3) ps t JITTER Cycle to Cycle Jitter ( Figure 6. F max /JITTER) < 0.2 < 0.2 < ps ps V PP Input Voltage Swing (ifferential Configuration) (Note 4) mv t r Output Rise/Fall Times Max Swing t f (20% 0%) Min Swing ps NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. evice specification limit values are applied individually under normal operating conditions and not valid simultaneously. 2.Measured using a 750 mv source, 50% duty cycle clock source. All loading with 50 to V CC 2.0 V. 3. Skew is measured between outputs under identical transitions. uty cycle skew is defined only for differential operation when the delays are measured from the cross point of the inputs to the cross point of the outputs. 4.V PP (min) is minimum input swing for which AC parameters are guaranteed. 6

7 VSWING (%) VOLTS (V) Figure 2. V CC V CTRL (pin #) V OH V PK PK V OL Min Swing Max Swing VOLTS (V) Figure 3. V CC V CTRL V CTRL + V CTRL V CC 2 7 V SWING (pk pk) V BB 4 5 V EE V CC 2 V Figure 4. Voltage Source Implementation 7

8 +5 V V CTRL V CC 2 7 V SWING (pk pk) V BB 4 5 V EE Figure 5. Alternative Implementation V OUTpp (mv) V Below V CC V Below V CC V Below V CC V Below V CC V Below V CC 00 ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ (JITTER) FREUENCY (MHz) Figure 6. F max /Jitter JITTER OUT ps (RMS) É river evice Z o = 50 Z o = 50 Receiver evice V TT V TT = V CC 2.0 V Figure 7. Typical Termination for Output river and evice Evaluation ( Application Note AN020/ Termination of ECL Logic evices.)

9 ORERING INFORMATION evice Package Shipping MC00EP6VS SOIC 9 Units / Rail MC00EP6VSG SOIC (Pb Free) 9 Units / Rail MC00EP6VSR2 SOIC 2500 / Tape & Reel MC00EP6VSR2G SOIC (Pb Free) 2500 / Tape & Reel MC300EP6VST TSSOP 00 Units / Rail MC300EP6VSTG TSSOP (Pb Free) 00 Units / Rail MC00EP6VSTR2 TSSOP 2500 / Tape & Reel MC00EP6VSTR2G TSSOP (Pb Free) 2500 / Tape & Reel MC00EP6VSMNR4 FN 000 / Tape & Reel MC00EP6VSMNR4G FN (Pb Free) 000 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BR0/. Resource Reference of Application Notes AN405/ ECL Clock istribution Techniques AN406/ esigning with PECL (ECL at +5.0 V) AN503/ ECLinPS I/O SPiCE Modeling Kit AN504/ Metastability and the ECLinPS Family AN56/ Interfacing Between LVS and ECL AN672/ The ECL Translator Guide AN00/ Odd Number Counters esign AN002/ Marking and ate Codes AN020/ Termination of ECL Logic evices AN066/ Interfacing with ECLinPS AN090/ AC Characteristics of ECL evices 9

10 PACKAGE IMENSIONS SOIC NB CASE ISSUE AH Y B X A 5 4 S 0.25 (0.00) M Y M K NOTES:. IMENSIONING AN TOLERANCING PER ANSI Y4.5M, CONTROLLING IMENSION: MILLIMETER. 3. IMENSION A AN B O NOT INCLUE MOL PROTRUSION. 4. MAXIMUM MOL PROTRUSION (0.006) PER SIE. 5. IMENSION OES NOT INCLUE AMBAR PROTRUSION. ALLOWABLE AMBAR PROTRUSION SHALL BE 0.27 (0.005) TOTAL IN EXCESS OF THE IMENSION AT MAXIMUM MATERIAL CONITION THRU ARE OBSOLETE. NEW STANAR IS Z H G C 0.25 (0.00) M Z Y S X S SEATING PLANE 0.0 (0.004) N X 45 M J MILLIMETERS INCHES IM MIN MAX MIN MAX A B C G.27 BSC BSC H J K M 0 0 N S SOLERING FOOTPRINT* SCALE 6: mm inches *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLERRM/. 0

11 PACKAGE IMENSIONS TSSOP T SUFFIX PLASTIC TSSOP PACKAGE CASE 94R 02 ISSUE A (0.006) T (0.006) T L U U 0.0 (0.004) T SEATING PLANE S 2X L/2 PIN IENT S C 5 x A V K REF (0.004) M T U S V S G B U ETAIL E ETAIL E F 0.25 (0.00) M W NOTES:. IMENSIONING AN TOLERANCING PER ANSI Y4.5M, CONTROLLING IMENSION: MILLIMETER. 3. IMENSION A OES NOT INCLUE MOL FLASH. PROTRUSIONS OR GATE BURRS. MOL FLASH OR GATE BURRS SHALL NOT EXCEE (0.006) PER SIE. 4. IMENSION B OES NOT INCLUE INTERLEA FLASH OR PROTRUSION. INTERLEA FLASH OR PROTRUSION SHALL NOT EXCEE 0.25 (0.00) PER SIE. 5. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 6. IMENSION A AN B ARE TO BE ETERMINE AT ATUM PLANE -W-. MILLIMETERS INCHES IM MIN MAX MIN MAX A B C F G 0.65 BSC BSC K L 4.90 BSC 0.93 BSC M

12 PACKAGE IMENSIONS FN CASE 506AA 0 ISSUE PIN ONE REFERENCE A B NOTES:. IMENSIONING AN TOLERANCING PER ASME Y4.5M, CONTROLLING IMENSION: MILLIMETERS. 3. IMENSION b APPLIES TO PLATE TERMINAL AN IS MEASURE BETWEEN 0.25 AN 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSE PA AS WELL AS THE TERMINALS. 2 X 0.0 C 2 X 0.0 C ÇÇÇ ÇÇÇ ÇÇÇ TOP VIEW E MILLIMETERS IM MIN MAX A A A REF b BSC E 2.00 BSC E e 0 BSC K 0.20 L C A X SEATING PLANE 0.0 C A SIE VIEW (A3) C 2 e/2 4 X L e E2 K 5 BOTTOM VIEW ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC). X b 0.0 C 0.05 C ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. A B NOTE 3 PUBLICATION ORERING INFORMATION LITERATURE FULFILLMENT: Literature istribution Center for ON Semiconductor P.O. Box 563, enver, Colorado 027 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative MC00EP6VS/