MC10EP142, MC100EP V / 5 VНECL 9 Bit Shift Register

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1 MCEP42, MCEP V / 5 VНECL 9 Bit Shift Register The MCEP/EP42 is a 9 bit shift register, designed with byte-parity applications in mind. The MC/EP42 is capable of performing serial/parallel data into serial/parallel out and shifting in only one direction. The nine inputs 8 accept parallel input data, while S IN accepts serial input data. The T:87 outputs do not need to be terminated for the shift operation to function. To minimize power, any output not used should be left unterminated. The SEL (Select) input pin is used to switch between the two modes of operation SHIFT and LOA. The shift direction is from Bit to Bit 8. Input data is accepted by the registers a set up time before the positive going edge of CLK or CLK; shifting is also accomplished on the positive clock edge. A HIGH on the Master Reset pin (MR) asynchronously resets all the registers to zero, overriding CLK and CLK inputs. The Series contains temperature compensation. Features Shift Frequency >2.8 GHz (Typical) 9-Bit for Byte Parity Applications Asynchronous Master Reset ual Clocks PECL Mode Operating Range: = 3. V to 5.5 V with V EE = V NECL Mode Operating Range: = V with V EE = 3. V to 5.5 V Open Input efault State Safety Clamp on Inputs Pb Free Packages are Available LFP 32 FA SUFFIX CASE 873A 32 FN32 MN SUFFIX CASE 488AM 32 MARKING IAGRAM* MCxxx EP42 AWLYYWWG xxx = or A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G or = Pb Free Package (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AN82/. MCxxx EP42 AWLYYWW ORERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page of this data sheet. Semiconductor Components Industries, LLC, 26 November, 26 Rev. 6 Publication Order Number: MCEP42/

2 MCEP42, MCEP V EE MCEP42 MCEP V EE MR S IN S IN CLK CLK CLK CLK SEL V EE Exposed Pad (EP) V EE MR S IN S IN CLK CLK CLK CLK SEL Figure. Pinout: LFP 32 (Top View) Figure 2. Pinout: FN 32 (Top View) Table. PIN ESCRIPTION Pin Name I/O efault State escription,23,24,25,26, 27,29,3,3 [:8] ECL Input Low Single Ended Parallel ata Inputs [:8]. Internal 75 k to V EE. 2 S IN ECL Input Low Noninverted ifferential Serial Input. Internal 75 k to V EE. 3 S IN ECL Input High Inverted ifferential Serial Input. Internal 75 k to V EE and 36.5 k to. 4 CLK ECL Input Low Noninverted ifferential CLK Input. Internal 75 k to V EE. 5 CLK ECL Input High Inverted ifferential CLKB Input. Internal 75 k to V EE and 36.5 k to. 6 CLK ECL Input Low Noninverted ifferential CLK Input. Internal 75 k to V EE. 7 CLK ECL Input High Inverted ifferential CLKB Input. Internal 75 k to V EE and 36.5 k to. 8 SEL ECL Input Low Single Ended Select Logic Input. Internal 75 k to V EE. 9 MR ECL Input Low Single Ended Master Reset Logic Input. Internal 75 k to V EE.,,2,4, 5,8,9,22,,2,3, 4,5,6,8 ECL Output Single Ended parallel ata outputs [,,2,3,4,5,6,8]. Typically Terminated with to V TT = 2 V. 3,7,32 Positive supply Voltage. All Pins must be Externally Connected to Power Supply to Guarantee Proper Operation. 6,28 V EE Negative supply Voltage. All V EE Pins must be Externally connected to Power Supply to Guarantee Proper Operation. 2 7 ECL Output Noninverted ifferential parallel/serial ata Output 7. Typically Terminated with to V TT = 2 V. 2 7 ECL Output Inverted ifferential parallel/serial ata Output 7. Typically Terminated with to V TT = 2 V.. All and V EE pins must be externally connected to Power Supply to guarantee proper operation. 2

3 MCEP42, MCEP42 Table 2. TRUTH TABLE Function (Note 2) SEL S IN MR CLK CLK Load L X L Z Z Shift H L L Z Z L H H L Z Z H Reset X X H Z Z L L L L L L L L L L 2. All Load and Shift functions are accomplished on the positive edge of CLK or CLK. 3

4 MCEP42, MCEP42 4 S-IN S-IN SEL MR CLK CLK CLK CLK Figure 3. Logic iagram V EE R2 R2 R2

5 MCEP42, MCEP42 Table 3. ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor () 75 k Internal Input Pullup Resistor (R2) 37.5 k ES Protection Moisture Sensitivity (Note 3) Human Body Model Machine Model Charged evice Model LFP FN > 2 kv > V > 2 kv Level 2 Level Flammability Rating Oxygen Index: 28 to 34 UL 94 in Transistor Count Meets or exceeds JEEC Spec EIA/JES78 IC Latchup Test 3. For additional information, refer to Application Note AN83/. 45 evices Table 4. MAXIMUM RATINGS Symbol Parameter Condition Condition 2 Rating Unit Positive Power Supply V EE = V 8 V V EE Negative Power Supply = V 8 V V I PECL Mode Input Voltage NECL Mode Input Voltage V EE = V = V I out Output Current Continuous Surge V I 6 V I V EE 6 T A Operating Temperature Range 4 to +85 C T stg Storage Temperature Range 65 to + C JA Thermal Resistance (Junction to Ambient) lfpm lfpm LFP 32 LFP 32 JC Thermal Resistance (Junction to Case) Standard Board LFP 32 2 to 7 C/W JA Thermal Resistance (Junction to Ambient) lfpm lfpm FN 32 FN 32 JC Thermal Resistance (Junction to Case) 2S2P FN 32 2 C/W T sol Wave Solder Pb Pb Free C 3 26 C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability V ma C/W C/W C 5

6 MCEP42, MCEP42 Table 5. EP C CHARACTERISTICS, PECL = 3.3 V, V EE = V (Note 4) Symbol Characteristic 4 C 25 C 85 C Min Typ Max Min Typ Max Min Typ Max I EE Negative Power Supply Current ma V OH Output HIGH Voltage (Note 5) mv V OL Output LOW Voltage (Note 5) mv V IH Input HIGH Voltage (Single Ended) mv V IL Input LOW Voltage (Single Ended) mv V IHCMR Input HIGH Voltage Common Mode Range (ifferential Configuration) (Note 6) V I IH Input HIGH Current (@ V IH ) A Unit I IL Input LOW Current (@ V IL ) CLK, CLK,, S IN CLK, CLK, S IN A NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. evice specification limit 4. Input and output parameters vary : with. V EE can vary +.3 V to 2.2 V. 5. All loading with to 2. V. 6. V IHCMR min varies : with V EE, V IHCMR max varies : with. The V IHCMR range is referenced to the most positive side of the differential input signal. Table 6. EP C CHARACTERISTICS, PECL = 5. V, V EE = V (Note 7) 4 C 25 C 85 C Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit I EE Negative Power Supply Current (Note 8) ma V OH Output HIGH Voltage (Note 9) mv V OL Output LOW Voltage (Note 9) mv V IH Input HIGH Voltage (Single Ended) mv V IL Input LOW Voltage (Single Ended) mv V IHCMR Input HIGH Voltage Common Mode Range (ifferential Configuration) (Note ) V I IH Input HIGH Current (@ V IH ) A I IL Input LOW Current (@ V IL ) CLK, CLK,, S IN CLK, CLK, S IN A NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. evice specification limit 7. Input and output parameters vary : with. V EE can vary +2. V to V. 8. Required lfpm air flow when using +5 V power supply. For ( V EE ) >3.3 V, 5 to in line with V EE required for maximum thermal protection at elevated temperatures. Recommend V EE operation at 3.3 V. 9. All loading with to 2. V..V IHCMR min varies : with V EE, V IHCMR max varies : with. The V IHCMR range is referenced to the most positive side of the differential input signal. 6

7 MCEP42, MCEP42 Table 7. EP C CHARACTERISTICS, NECL = V, V EE = 5.5 V to 3. V (Note ) 4 C 25 C 85 C Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit I EE Negative Power Supply Current (Note 2) ma V OH Output HIGH Voltage (Note 3) mv V OL Output LOW Voltage (Note 3) mv V IH Input HIGH Voltage (Single Ended) mv V IL Input LOW Voltage (Single Ended) mv V IHCMR Input HIGH Voltage Common Mode Range (ifferential Configuration) (Note 4) V EE +2.. V EE +2.. V EE +2.. V I IH Input HIGH Current (@ V IH ) A I IL Input LOW Current (@ V IL ) CLK, CLK,, S IN CLK, CLK, S IN NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. evice specification limit. Input and output parameters vary : with. 2.Required lfpm air flow when using 5 V power supply. For ( V EE ) >3.3 V, 5 to in line with V EE required for maximum thermal protection at elevated temperatures. Recommend V EE operation at 3.3 V. 3.All loading with to 2. V. 4.V IHCMR min varies : with V EE, V IHCMR max varies : with. The V IHCMR range is referenced to the most positive side of the differential input signal. A Table 8. EP C CHARACTERISTICS, PECL = 3.3 V, V EE = V (Note 5) 4 C 25 C 85 C Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit I EE Negative Power Supply Current ma V OH Output HIGH Voltage (Note 6) mv V OL Output LOW Voltage (Note 6) mv V IH Input HIGH Voltage (Single Ended) mv V IL Input LOW Voltage (Single Ended) mv V IHCMR Input HIGH Voltage Common Mode Range (ifferential Configuration) (Note 7) V I IH Input HIGH Current (@ V IH ) A I IL Input LOW Current (@ V IL ) CLK, CLK,, S IN CLK, CLK, S IN NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. evice specification limit 5.Input and output parameters vary : with. V EE can vary +.3 V to 2.2 V. 6.All loading with to 2. V. 7.V IHCMR min varies : with V EE, V IHCMR max varies : with. The V IHCMR range is referenced to the most positive side of the differential input signal. A 7

8 MCEP42, MCEP42 Table 9. EP C CHARACTERISTICS, PECL = 5. V, V EE = V (Note 8) 4 C 25 C 85 C Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit I EE Negative Power Supply Current (Note 9) ma V OH Output HIGH Voltage (Note 2) mv V OL Output LOW Voltage (Note 2) mv V IH Input HIGH Voltage (Single Ended) mv V IL Input LOW Voltage (Single Ended) mv V IHCMR Input HIGH Voltage Common Mode Range (ifferential Configuration) (Note 2) V I IH Input HIGH Current (@ V IH ) A I IL Input LOW Current (@ V IL ) CLK, CLK,, S IN CLK, CLK, S IN NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. evice specification limit 8.Input and output parameters vary : with. V EE can vary +2. V to V. 9.Required lfpm air flow when using +5 V power supply. For ( V EE ) >3.3 V, 5 to in line with V EE required for maximum thermal protection at elevated temperatures. Recommend V EE operation at 3.3 V. 2.All loading with to 2. V. 2.V IHCMR min varies : with V EE, V IHCMR max varies : with. The V IHCMR range is referenced to the most positive side of the differential input signal. A Table. EP C CHARACTERISTICS, NECL = V, V EE = 5.5 V to 3. V (Note 22) 4 C 25 C 85 C Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit I EE Negative Power Supply Current (Note 23) ma V OH Output HIGH Voltage (Note 24) mv V OL Output LOW Voltage (Note 24) mv V IH Input HIGH Voltage (Single Ended) mv V IL Input LOW Voltage (Single Ended) mv V IHCMR Input HIGH Voltage Common Mode Range (ifferential Configuration) (Note 25) V EE +2.. V EE +2.. V EE +2.. V I IH Input HIGH Current (@ V IH ) A I IL Input LOW Current (@ V IL ) CLK, CLK,, S IN CLK, CLK, S IN NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. evice specification limit 22.Input and output parameters vary : with. 23.Required lfpm air flow when using 5 V power supply. For ( V EE ) >3.3 V, 5 to in line with V EE required for maximum thermal protection at elevated temperatures. Recommend V EE operation at 3.3 V. 24.All loading with to 2. V. 25.V IHCMR min varies : with V EE, V IHCMR max varies : with. The V IHCMR range is referenced to the most positive side of the differential input signal. A 8

9 MCEP42, MCEP42 Table. AC CHARACTERISTICS = 3. V to 5.5 V; V EE =. V or =. V; V EE = 3. V to 5.5 V (Note 26) Symbol Characteristic 4 C 25 C 85 C Min Typ Max Min Typ Max Min Typ Max f SHIFT Maximum Shift Frequency 2.8 GHz t PLH, t PHL t s t h Propagation elay to Output Setup Time Hold Time CLKx MR SEL SEL t RR Reset Recovery Time 8 ps t pw Minimum Pulse Width 2 ps t SKEW Within-evice Skew (Note 27), uty Cycle Skew (Note 28) 5. t JITTER Random Clock Jitter (Figure 4) ps V inpp Input Voltage Swing/Sensitivity (ifferential Configuration) mv 2 Unit ps ps ps ps t r, t f Rise/Fall MHz (2-8%) ps NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. evice specification limit 26.Measured using a 7 mv source, % duty cycle clock source. All loading with to 2. V. 27. Within-device skew is defined as identical transitions on similar paths through a device. 28. Skew is measured between outputs under identical transitions. uty cycle skew is defined only for differential operation when the delays are measured from the cross point of the inputs to the cross point of the outputs. 9 9 Output Voltage Amplitude (mv) ÉÉÉÉÉÉÉÉÉ INPUT FREUENCY (MHz) JITTER OUT ps (RMS) ÉÉ ÉÉ Figure 4. Output Voltage Amplitude / RMS Jitter vs. Input Frequency at Ambient Temperature (Typical) 9

10 MCEP42, MCEP42 CLK CLK V INPP = V IH (CLK) V IL (CLK) V OUTPP = V OH () V OL () t PHL t PLH Figure 5. AC Reference Measurement river evice Z o = Z o = Receiver evice V TT V TT = 2. V Figure 6. Typical Termination for Output river and evice Evaluation (See Application Note AN82/ Termination of ECL Logic evices.)

11 MCEP42, MCEP42 ORERING INFORMATION evice Package Shipping MCEP42FA LFP 32 2 Units / Tray MCEP42FAG LFP 32 2 Units / Tray MCEP42FAR2 LFP 32 2 / Tape & Reel MCEP42FAR2G MCEP42MNG MCEP42MNR4G LFP 32 FN 32 FN 32 2 / Tape & Reel 74 Units / Rail / Tape & Reel MCEP42FA LFP 32 2 Units / Tray MCEP42FAG LFP 32 2 Units / Tray MCEP42FAR2 LFP 32 2 / Tape & Reel MCEP42FAR2G MCEP42MNG LFP 32 FN 32 2 / Tape & Reel 74 Units / Rail MCEP42MNR4G FN 32 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BR8/. Resource Reference of Application Notes AN45/ ECL Clock istribution Techniques AN46/ esigning with PECL (ECL at +5. V) AN3/ ECLinPS I/O SPiCE Modeling Kit AN4/ Metastability and the ECLinPS Family AN568/ Interfacing Between LVS and ECL AN672/ The ECL Translator Guide AN8/ Odd Number Counters esign AN82/ Marking and ate Codes AN82/ Termination of ECL Logic evices AN866/ Interfacing with ECLinPS AN89/ AC Characteristics of ECL evices

12 MCEP42, MCEP42 PACKAGE IMENSIONS 32 LEA LFP CASE 873A 2 ISSUE C A 32 A 25 4X.2 (.8) AB T U Z T, U, Z T U P AE B 9 SEATING PLANE B AB AC 8 9 S ETAIL Y Z S G. (.4) AC 7 4X V V.2 (.8) AC T U Z ETAIL A C E 8X M ETAIL Y AE R BASE METAL N ÉÉ F ÉÉ J.2 (.8) M AC T U Z SECTION AE AE H W ETAIL A X K GAUGE PLANE.2 (.) NOTES:. IMENSIONING AN TOLERANCING PER ANSI Y4.5M, CONTROLLING IMENSION: MILLIMETER. 3. ATUM PLANE AB IS LOCATE AT BOTTOM OF LEA AN IS COINCIENT WITH THE LEA WHERE THE LEA EXITS THE PLASTIC BOY AT THE BOTTOM OF THE PARTING LINE. 4. ATUMS T, U, AN Z TO BE ETERMINE AT ATUM PLANE AB. 5. IMENSIONS S AN V TO BE ETERMINE AT SEATING PLANE AC. 6. IMENSIONS A AN B O NOT INCLUE MOL PROTRUSION. ALLOWABLE PROTRUSION IS.2 (.) PER SIE. IMENSIONS A AN B O INCLUE MOL MISMATCH AN ARE ETERMINE AT ATUM PLANE AB. 7. IMENSION OES NOT INCLUE AMBAR PROTRUSION. AMBAR PROTRUSION SHALL NOT CAUSE THE IMENSION TO EXCEE 2 (.2). 8. MINIMUM SOLER PLATE THICKNESS SHALL BE.76 (.3). 9. EXACT SHAPE OF EACH CORNER MAY VARY FROM EPICTION. MILLIMETERS INCHES IM MIN MAX MIN MAX A 7. BSC.276 BSC A 3. BSC.38 BSC B 7. BSC.276 BSC B 3. BSC.38 BSC C E F G.8 BSC.3 BSC H J K M 2 REF 2 REF N P.4 BSC.6 BSC 5 5 R S 9. BSC.354 BSC S 4. BSC.77 BSC V 9. BSC.354 BSC V 4. BSC.77 BSC W.2 REF.8 REF X. REF.39 REF 2

13 MCEP42, MCEP42 PACKAGE IMENSIONS PIN ONE LOCATION E A B FN32 5*5* P CASE 488AM ISSUE O NOTES:. IMENSIONS AN TOLERANCING PER ASME Y4.5M, CONTROLLING IMENSION: MILLIMETERS. 3. IMENSION b APPLIES TO PLATE TERMINAL AN IS MEASURE BETWEEN.25 AN.3 MM TERMINAL 4. COPLANARITY APPLIES TO THE EXPOSE PA AS WELL AS THE TERMINALS. 2 X 32 X 2 X.5 C. C.8 C.5 C TOP VIEW SIE VIEW (A3) A A C SEATING PLANE MILLIMETERS IM MIN NOM MAX A.8.9. A..25. A3.2 REF b BSC E 5. BSC E e BSC K.2 L.3.4 L 32 X EXPOSE PA K 32 X SOLERING FOOTPRINT* X b. C A B.5 C e E2 32 X BOTTOM VIEW 32 X X PITCH *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLERRM/. ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC) ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORERING INFORMATION LITERATURE FULFILLMENT: Literature istribution Center for ON Semiconductor P.O. Box 563, enver, Colorado 827 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative MCEP42/

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