SFDMDA4108F. Specifications and Applications Information. orce LED Driver. Mass: 9 grams typ. 03/30/11. Package Configuration

Transcription

1 03/30/11 Specificatins and Applicatins Infrmatin Smart Fr rce LED Driver The ERG Smart Frce Series f LED Drivers are specifically designed fr applicatins which require high efficiency, small ftprt and LCD brightness stability frm a lt dc surce. The SFDMDA4108F is designed t prvide backlight pwer fr the NEC NL6448BC20-30D display. Package Cnfiguratin Designed, manufactured and supprted with the USA, the SFDMD features: Less than mm height Cnstant LED current With ternal dimmg signal, up t 2:1 dimmg rati Open and shrt circuit prtectin High efficiency Separate enable and dimmg functin Sft start One year warranty Cnnectr Mlex J1-1 (+) J1-2 (+) J1-3 GND J1-4 GND J1- J1-6 N/C J1-7 Cntrl J1-8 Fault Indicatr (utput) Cnnectrs Output Cnnectr * Mlex J2-1 Cathde 1 J2-7 (d nt use) J2-2 Ande 1 J2-8 (d nt use) J2-3 (d nt use) J2-9 Cathde 3 J2-4 (d nt use) J2-10 Ande 3 J2- Cathde 2 J2-11 (d nt use) J2-6 Ande 2 J2-12 (d nt use) * Requires harness: ERG part number H recmmended [70,66].13 [3,43] 1.68 [17,40].96 [24,4] Mass: 9 grams typ. 1 Output.12 [3,18] Dia. (2x) [30,63].942 [23,92] PCB cmpnents are shwn fr reference nly. Actual prduct may differ frm that shwn. page 1 f.

2 Abslute Maximum Ratgs Ratg alue Strage ltage Range Temperature -0.3 t dc T -40 t +8 C stg Cntrl ltage ltage PWM 0 t dc 0 t +.0 dc Fault Indicatr Operatg Characteristics 0 t dc FL Unless therwise nted =.00 lts dc and Ta = 2 C. Characteristic M Typ Max ltage dc Cmpnent Surface ( Nte 1) T C Temperature s Current I Adc LED Strg ltage ( Nte 2) ED L 8 ( Nte 3) - 2 dc Efficiency ( Nte 4) h % Output Current (per strg) I ut madc P (Nte ) Turn-n Threshld thn dc Turn-ff Threshld thff dc Impedance (Nte 6) R kohms Cntrl P (Ntes 7,8) Full-n Threshld dc thn Mimum Pulse Cntrl Width Threshld Bias Current PWm I Cbias dc ua Frequency F PWM (Operatg Characteristics and ntes are cntued n next page.) Hz page 2 f.

3 O peratg Characteristics (cntued ) Characteristic M Typ Max Fault Indicatr N Fault Level (Nte 9) dc NFL (Nte 9) Fault Level FL dc Specificatins subject t change withut ntice. Nte 1 Nte 2 Nte 3 Surface temperature must nt exceed 80 C, except U1, which cannt exceed 9 C. Exceedg maximum strg vltage specificatin will damage the LED driver. The LED driver is capable f drivg strgs less than the mimum strg vltage specificatin, althugh dg s will limit the maximum put vltage. T determe max : mimum LED strg vltage (1.3) x ( maximum) Nte 4 Nte Nte 6 Nte 7 Nte 8 Nte 9 Efficiency is calculated usg a 12 LED strg. The p is ternally pulled up abve the turn-n threshld. p put impedance is 9kΩ t 3. with a put vltage. Cntrl p is ternally pulled up abve the turn-n threshld. Cntrl p put impedance is 48kΩ. Ladg with an impedance less than 100kΩ t cc r t grund may cause the default levels t change. page 3 f.

4 Applicatin Infrmatin The ERG SFDMDA4108F has been designed t be cnfigured multiple ways: NO DIMMING OPERATION: The SFD can be cnfigured t perate withut dimmg by flatg the (J1-) and Cntrl (J1-7) ps. Ps 1 and 2 f cnnectr J1 must be cnnected t +, between 4. and. dc. Ps 3 and 4 f cnnectr J1 must be cnnected t GND. DISABLING DRIER: Pullg the p (J1-) belw the mimum turn-ff threshld f 0.8 will disable the driver. Disablg the driver will require the ability t sk 2mA belw the turn-ff threshld. This p may be driven by an pen cllectr stage r a ttem ple stage. ONBOARD PWM DIMMING OPERATION: Onbard PWM cnfiguratin as shwn Figure 1 allws the user t cntrl display brightness by cntrllg the nbard PWM generatr. The user is respnsible t prvide an analg cntrl signal. A dimmg rati up t 2:1 is pssible with this cnfiguratin. DIMMING: Dimmg is accmplished by applyg an analg vltage t the Cntrl P (J1-7). Display brightness is mdulated by cntrllg the Cntrl P vltage as shwn Graph 1. ENABLE/DISABLE: The driver may be enabled r disabled (turned n and ff) by applyg a DC vltage t the P(J1-). P n and ff levels are specified the Operatg Characteristics sectin f the data sheet. The driver can als be enabled by flatg the P. Ps 1 and 2 f cnnectr J1 must be cnnected t +, between 4. and. dc. Ps 3 and 4 f cnnectr J1 must be cnnected t GND. FAULT INDICATOR The Fault Indicatr p (J1-8) may be used as a feedback signal that will fall belw the fault level f 0.3 the case f an pen strg, a shrted strg, an utput vervltage cnditin, r an ver temperature cnditin. If used, this p shuld be laded with a high impedance stage as specified the Operatg Characteristics. D nt drive this p with a vltage, as it will damage the driver. page 4 f.

5 ONBOARD PWM DIMMING SFDMDA4108F Graph 1 J1 J2 Optinal Ptentimeter + + (1) 1,2 3,4 1,2 Analg Dimmg ltage (0 t ) 7 GND Cntrl Ande 1 Cathde 1 Ande 2 Cathde 2 +On -Off 3,4 GND Ande 3 Cathde 3 (utput) 8 Fault Figure 1 (1) Lw ESR type put by-pass capacitr (10 uf uf) may be required t reduce reflected ripple and t imprve pwer supply respnse. REG UL Endictt Research Grup, ISO 9001 IRM ISTERED F A3313 Inc. Endictt Research Grup, Inc. (ERG) reserves the right t make changes circuit design and/r specificatins at any time withut ntice. Accrdgly, the reader is cautined t verify that data sheets are current befre placg rders. Infrmatin furnished by ERG is believed t be accurate and reliable. Hwever, n respnsibility is assumed by ERG fr its use. page f.