Series D1L- Solid State Relay

Transcription

1 Electrnic Design & Research Technlgy fr peple's ideas Input Specificatins: Input DC ltage see the Features Nminal Current varies Series DL- Slid State Relay DC & AC/DC Subminiature Slid State Relays Features: Utilizes nly. sq. in. f PCB area and nly. tall Amp cntinues r up t Amp-pick in miniature size High sensitivity, even at a high switching frequency A surge current and nly mill-oh lw n-state resistance Available in DIP and a miniature SIP packages Please specify input cntrl vltage: cntrl vltage Typical Output Specificatins (DLD): Operating DC vltage range DC Maimum cntinuus current A Maimum surge current (IDM) - ms A Cntinues current (ID) A Maimum n-state resistance. Ohm Rising time µs Delay-n time 7 µs Falling time.7 µs Delay-ff time 7 µs Maimum switching frequency Hz * Test perfrmed at the input current equal t ma General Specificatins: Ambient perating temperature range Ambient strage temperature range Dialectic Strength input-t-utput Mechanical Specificatins: Weight(z). - C t C - C t C, AC Encapsulatin ResTech 7/ Dimensins fr DL package. H.7 L. W Dimensins fr DIP package.7"h.9"l."w Dimensins fr DL package. H. L.9 W Terminals/slder fr DIP package. diameter Terminals /slder fr SIPm package cntrl -., pwer. DLD/K/D EDR9/D K - DC,A + - INPUT " * replace K with a desired and ffered cntrl vltage. * Transient Prtectin: All lads are inductive, even nes that are nt s bvius r labeled. An inductive lad prduces a harmful transient vltage, which is much higher than the applied vltage, when it is turned n and ff. A SSR built with a MOSFET utput acts as an ideal switch and can prduce a seemingly nn-inductive lad, which can cause damage if nt suppressed. A transient vltage suppressr, which is bi-directinal fr an AC applied vltage and unidirectinal fr a DC applied vltage, shuld be used t clamp ecessive spikes. Electrnic Design & Research Inc. ** 7 Intermdal Dr. ** Luisville ** KY Tel: -9-; Fa: -9-; Sales: --7; vshlding@vshlding.cm -

2 Input Electrical Characteristics (Ta = C) fr \. mdel, DIP & SIP Characteristic Test Cnditin Min Typ. Ma. Unit Frward ltage Input = ma... Frward Current ma Reverse Current Reverse ltage = μa Frward Current (ma) ma Reverse vltage (ma) Input Electrical Characteristics (Ta = C) fr \ mdel, SIP Frward ltage.. 7. Frward Current ma Reverse Current Reverse ltage = μa Reverse vltage (ma) 7 Input Electrical Characteristics (Ta = C) fr \.- mdel, SIP Frward ltage. 9 Frward Current ma Reverse Current (ma) Reverse ltage = 7 μa Reverse vltage (ma) Islatin and Temperature Characteristics fr all mdels, DIP & SIP Capacitance input t utput. pf Islatin resistance tested at, R.H. [% ς Islatin vltage AC, minute r Strage Temperature - ~ C Operating temperature - C Packaging infrmatin and pins-ut fr a mini SIPm.." (7.7 mm).9" (7. mm) DLD/ EDR9 PIN : + LOAD PIN : return LOAD PIN : +DC CONTROL." (mm) PIN : -DC CONTROL DC &ma A, DC " typ. ( mm)."(. mm). (. mm)." (. mm)." ( mm)." (7.9 mm) All Dimensins are in inches (millimeters). Input terminals (pins) are." ( mm) diameter. Output terminals (pins). Weight: (typical). z. (9.9 g) Encapsulatin: Thermally Cnductive Epy Figure Figure -

3 I. Switching time test Lad - DC & A, Cntrl Signal. DC & current ma =-97ns,=7.µs,=7.µs =ns,=7.7µs,=7.7µs µs Figure. Turn-n delay is 7 μs Figure. Turn-ff delay is 7.7 μs =.7µs,=7.µs,=.µs Figure 7. Rising Time is. μs =7.µs,=.µs,=ns µs Figure. Fall Time is. μs DLD/. Cntrl Signal Lad Signal Slid State Realy. - dd Pulse width =. ms - R - Lad =. Ohm Duty Factr % Figure 9. Switching Time Test Circuit II. Chsing R and cntrl current fr repay with DC input. It is easy t select a prper value fr R t insure the maimum perfrmance. In t cases, similar t an electrmechanical relay, the switching cycle ccurs n mre than Hz and a current f ma is sufficient t cntrl the relay. The current must be increased if the delay r rising slpe must be imprved. Sectin III shws the switching perfrmance vs. the cntrl current. The fllwing equatin shuld be used t calculate the required cntrl current: R = (cc.)/i cs Where is R required resistr; cc Cntrl ltage; I cs Cntrl Current -

4 III. Switching time test vs. the cntrl current Lad is DC, A and the pulse duratin is. ms Cntrl current is ma r abut. DC =-7ns,=.µs,=.µs =.µs,=9.µs,=.µs Jun : Figure. Turn-n delay is. μs Jun : Figure. Rising time is. μs =-ns,=.µs,=.µs Cntrl current is ma r abut. DC =9.µs,=9.µs,=.µs Jun :9 Jun : Figure. Turn-n delay is. μs Figure. Rising time is. μs =.µs,=9ns,=-.µs Jun : Cntrl current is ma r abut 7. DC =9.µs,=.µs,=-9.7µs Jun : Figure. Turn-n delay is. μs Figure. Rising time is 9.7 μs I. A switching time test Lad DC, A, cntrl signal ma, frequency Hz =.µs,=µs,=99µs Jun : Figure. Tp line is a cntrl signal and bttm line is a lad signal -

5 Lw Cntrl Pwer, ltage DL series Only ma required and driving by a lw pwer IC Chip High sensitive, nly 7 S delay and made in a DP r mini SIP package arius utput ratings are available, call with yur requirements. Specificatins fr p/n EDR99/ DLD9/ Input Specificatins: Input DC ltage see the Features Nminal Current. ma Typical Output Specificatins Operating DC vltage range DC Maimum cntinuus current.9 A Maimum surge current (IDM) - ms. A Maimum n-state resistance. Ohm Rising time µs Delay-n time µs Falling time µs Delay-ff time µs Maimum switching frequency Hz * Test perfrmed at the input current equal t ma General Specificatins: Ambient perating temperature range - C t C Ambient strage temperature range - C t C Dialectic Strength input-t-utput, r Mechanical Specificatins: Weight(z). Encapsulatin ResTech 7/ Dimensins fr DL package. H.7 L. W Dimensins fr DIP package.7"h.9"l."w Dimensins fr DL package. H. L.9 W Terminals/slder fr DIP package. diameter Terminals /slder fr SIPm package cntrl -., pwer. Packaging infrmatin and pins-ut fr a mini SIPm.." (7.7 mm).9" (7. mm) DLD9/ EDR99/ DC &ma DC,.9A PIN : + LOAD PIN : return LOAD PIN : +DC CONTROL." (mm) PIN : -DC CONTROL." typ. ( mm)."(. mm). (. mm)." (. mm)." ( mm)." (7.9 mm) All Dimensins are in inches (millimeters). Input terminals (pins) are." ( mm) diameter. Output terminals (pins). Weight: (typical). z. (9.9 g) Encapsulatin: Thermally Cnductive Epy -

6 Input Electrical Characteristics (Ta = C) fr \. mdel, DIP & SIP Characteristic Test Cnditin Min Typ. Ma. Unit Frward ltage Input = ma... Frward Current 9 ma Reverse Current Reverse ltage = μa Recmmended Operating temperature - C + C Reverse vltage (ma) Switching time test Lad Ohm at DC/mA, cntrl.dc, ma - =µs,=µs,=-µs - - The EDR99 chpping capability at abut Hz =-ns,=.7µs,=.7µs =.µs,=-ns,=-.9µs =.µs,=.µs,=-.7µs Turn-n delay is μs Pulse width is. ms Turn-ff delay is 9 μs The input circuitry f a miniature, lw frequency EDR s family (DL) Slid State Relay built with a specially designed phtvltaic device with an LED type input. We make relays with all industrial standard input vltages (.,, 9.,,,, -, 9- and anything in between). The abve specificatins were giving withut cmpnents that insure a prper input current thrugh the device. The typical input current is strngly recmmended in a critical applicatins when a relay attend t be use fr the maimum specify current r at highest chapping frequency. The input current is als effect n the turn-n delay. Please specify yur driving vltage and fr rder f r abve there is n additinal charge t meet yur requirements. Equatin n the Page shuld be used if yu decided t install a resistr in serius by yurself. -

7 Lw Pwer, Islated Slenid Driver DL series Only ma, DC and driving by a lw pwer RS- IC Chip High sensitive, nly 7 S delay and made in a DP r mini SIP package arius utput ratings are available, call with yur requirements. Specificatins fr p/n EDR/ DLD/ Input Specificatins: Input DC ltage see the Features Nminal Current. ma Typical Output Specificatins (DLD): Operating DC vltage range DC Maimum cntinuus current. A Maimum surge current (IDM) - ms. A Maimum n-state resistance. Ohm Rising time µs Delay-n time µs Falling time µs Delay-ff time µs Maimum switching frequency Hz * Test perfrmed at the input current equal t. ma General Specificatins: Ambient perating temperature range Ambient strage temperature range Dialectic Strength input-t-utput Mechanical Specificatins: Weight(z). - C t C - C t C, AC Encapsulatin ResTech 7/ Dimensins fr DL package. H.7 L. W Dimensins fr DIP package.7"h.9"l."w Dimensins fr DL package. H. L.9 W Terminals/slder fr DIP package. diameter Terminals /slder fr SIPm package cntrl -., pwer. DLD/K/ EDR/K/ K - DC,.A + - INPUT +..7 * replace K with a desired and ffered cntrl vltage. =-9ns,=.µs,=9.µs Figure 9. DLD is a lw pwer, fast relay/switch and useful fr varius pwer-management applicatins and capable t chp at KHz rate - 7

8 I. Switching time test Lad - DC &.A, Cntrl Signal.9 DC & current.9 ma =9.µs,=ns,=-7.µs =7µs,=µs,=.µs Fig..Turn-n delay is 7.μS Fig.. Delay-ff time is.μs Fig.. Rising time is.μs =.µs,=.µs,=.7µs DC C. Cntrl C. U 9 RIN ROUT RIN ROUT RIN ROUT TIN TOUT TIN TOUT 7 9 TIN TOUT 7 TIN TOUT TIN TOUT C+ ROUTB C- INALID C+ C- (+in) (-in) Q DLD/ Energ/Cnv D STPSL (+) (-) K RELAY SPDT +. FORCEON FORCEOFF CC MAX/SO C9. C. C7. Figure. Interfacing a high-pwer electrmechanical relay via EDR with a lw-pwer, fast RS- transceiver (MAX) I. Switching time test Lad - DC &.A, Cntrl Signal DC & current. ma =-9ns,=.µs,=.9µs =9.µs,=9.9µs,=7.µs Fig.. Turn-n delay is.9μs Fig.. Rising time is 7.μS Fig.. Delay-ff time is 9.μS =-9ns,=.µs,=9.µs Fig. 7. DLD/ chps pwer at KHz and requires nly. ma =µs,=µs,=9.µs -

9 Electrnic Design & Research Technlgy fr peple's ideas Input Specificatins: Input DC ltage see the Features Nminal Current ma Lw cst DPST ( Frm A) Relays Up t DC & +/- Slid State Relays Features: Utilizes nly. sq. in. f PCB area and nly. tall A family f lw cst Slid State Relays designed fr varieties f Industrial applicatins t cntrl an average pwer. Relays ffered with range f cntrl (input) vltages and required nly ma t perate prperly. There are several utput vltages available:,,,, and DC with a maimum current f up t A r per terminal. Typical Output Specificatins (DLD): Operating DC vltage range DC Maimum cntinuus current A Maimum surge current (IDM) - ms 7 A Cntinues current (ID) A Maimum n-state resistance. Ohm Rising time µs Delay-n time 7 µs Falling time µs Delay-ff time 7 µs Maimum switching frequency Hz * Test perfrmed at the input current equal t ma PORTLEFT-L R General Specificatins: R Ambient perating temperature range - C t C Ambient strage temperature range - C t C Dialectic Strength input-t-utput, AC A SSR with the cnstant current input..... Mechanical Specificatins: Weight(z). Encapsulatin ResTech 7/ Dimensins fr DL package. H.9 L.77 W Terminals /slder fr SIPm package cntrl -., pwer.. t DC (+in) (-in) Q MOSFET N Q DLA/- ImA Cntrl & Driver (-) (+) (-) (+) DLD/-/NN EDR9 PIN + fr a DC type and ~ fr a AC/DC type relay, st terminal PIN - fr a DC type relay and ~ fr AC/DC type relay, st terminal PIN + fr a DC type relay and ~ fr a AC/DC type relay, nd terminal PIN - fr a DC type relay and ~ fr a AC/DC type relay, nd terminal PIN + cntrl signal PIN - (return) cntrl signal Q DLD/NN DC, A r - DC ma.9 Transient Prtectin: All lads are inductive, even nes that are nt s bvius r labeled. An inductive lad prduces a harmful transient vltage, which is much higher than the applied vltage, when it is turned n and ff. A SSR built with a MOSFET utput acts as an ideal switch and can prduce a seemingly nn-inductive lad, which can cause damage if nt suppressed. A transient vltage suppressr, which is bi-directinal fr an AC applied vltage and unidirectinal fr a DC applied vltage, shuld be used t clamp (+in) (-in) Cntrl & driver (-) (+) A SSR with a LED input (-) (+) Electrnic Design & Research Inc. ** 7 Intermdal Dr. ** Luisville ** KY Tel: -9-; Fa: -9-; Sales: --7; vshlding@vshlding.cm - 9

10 Input Electrical Characteristics (Ta = C) fr DL\ DC mdel, Characteristic Test Cnditin Min Typ. Ma. Unit Frward ltage Input = ma. Frward Current ma Reverse Current Reverse ltage = μa Frward Current (ma) ma Reverse vltage (ma) 7 Input Electrical Characteristics (Ta = C) fr DL\-DC mdel Frward ltage Frward Current ma Reverse Current Reverse ltage = μa Reverse vltage (ma) 7 I. Switching time test Lad - DC & A, Cntrl Signal DC & current ma =-97ns,=7.µs,=7.µs =ns,=7.7µs,=7.7µs Figure. Turn-n delay is 7 μs µs Figure. Turn-ff delay is 7.7 μs =.7µs,=7.µs,=.µs =7.µs,=.µs,=ns µs Figure. Rising Time is. μs Figure. Fall Time is. μs (+in) (-in) Q DLD/NN Cntrl & driver (-) (+) (-) (+) Chsing an eternal resistr with a DL\ DC type SSRs. It is easy t select a prper value f an eternal resistr if nly vltage abve the recmmended range is available. In t cases, similar t an electrmechanical relay, the switching cycle ccurs n mre than Hz and a current f ma is sufficient t cntrl the relay. The current must be increased if the delay r rising slpe must be imprved. The fllwing equatin shuld be used t calculate the required cntrl current: R = (cc )/. Where is a R (required resistr); cc an available cntrl vltage. Fr eample, DC is available hence an eternal resistr is ( )/. = Ohm. Figure. Simplified diagram f DL-type -

11 Electrnic Design & Research Technlgy fr peple's ideas Input Specificatins: Input DC ltage see the Features Output ltage & Current see the available selectin Typical Output Specificatins (DLD//C): Operating DC vltage range t DC Maimum cntinuus current A Maimum surge current (IDM) - ms A Cntinues current (ID), ms A Maimum n-state resistance. Ohm Rising time µs Delay-n time 7 µs Falling time.7 µs Delay-ff time 7 µs Maimum switching frequency Hz Test perfrmed at the input current equal t ma General Specificatins: Ambient perating temperature range Ambient strage temperature range Dialectic Strength input-t-utput Mechanical Specificatins: Weight(z). -Frm B, SPST-NC, Slid State Realys - C t C - C t C, r (MIN) Encapsulatin ResTech 7/ Figure Dimensins fr DL package. H.7 L. W A relay chps a Amp at abut Hz. Dimensins fr DIP package.7"h.9"l."w A bttm line (blue) is a cntrl signal. Dimensins fr DL package. H. L.9 W A tp line (red) is a n utput vltage at a lad. Terminals/slder fr DIP package. diameter Terminals /slder fr SIPm package cntrl -., pwer. Packaging infrmatin and pins-ut fr a mini SIP." (7.7 mm).9" (7. mm) Nrmally Clsed, Subminiature Slid State Relays Features: Utilizes nly. sq. in. f PCB area and nly. tall Sealed Cnstructin fr Autmatic Sldering and Cleaning High sensitivity, nly ma required ery high surge current tlerance ery lw n-state resistance Standard. Pin Spacing Available fr.,,, and input cntrl vltages - =ns,=9µs,=9µs Jun : DLD//C EDR/ (mm) DC &ma DC, A " typ.."(. mm). (. mm)." (. mm)." ( mm)." (7.9 mm) PIN : + LOAD; PIN: -LOAD (return) PIN : +DC CONTROL; PIN: -DC (return) CONTROL Figure All Dimensins are in inches (millimeters). -

12 Input Electrical Characteristics (Ta = C) fr a DLD//C mdel Characteristic Test Cnditin Min Typ. Ma. Unit Frward ltage Input = ma... Frward Current.. ma Reverse Current Reverse ltage = μa Frward Current (ma) ma Reverse vltage (ma) I. Switching time test Lad - DC &.A, Cntrl Signal. DC & current.9 ma - =9ns,=.µs,=.µs Jun :7 - =7ns,=ns,=-9ns µs Jun : - Figure. Turn-ff delay is. μs =ns,=ns,=-ns µs Jun : - Figure. Turn-n delay is.9 μs =ns,=-ns,=-ns µs Jun : Figure. Slpe n turn-n is. μs Figure. Rise time is. μs DLD//C Cntrl Signal Slid State Realy. Lad Signal Pulse width =. ms R - - Lad =. Ohm Duty Factr % - dd Figure 7. Switching Time Test Circuit -

13 Slid State Relay t replace an electrmechanical relay -Frm A, SPST-NO (nrmally pen) Slid State Relays Mdel Number Package Operating ltage Id (A) cnt. Idm (A) Ic (ma) p/n DLD/ SIP, mini DC A r EDR9/ DLD/ SIP, mini DC A r EDR/ DLD/ SIP, mini DC A r. EDR/ DLD/ SIP DC A r EDR/ DLD/ SIP, mini DC A r EDR/ DLD/ SIP, mini DC A r EDR/ DL7D/ SIP 7 DC A r EDR99/ DLD/ SIP, mini DC A r EDR7/ DLD/ SIP DC A r EDR99/ DLD/ SIP, mini DC A r 9 EDR9/ DLD/ SIP DC. A r EDR/ DLA/ SIP, mini +/- DC ( AC) A r EDR/ DLA/ SIP +/- DC ( AC) A r EDR7/ DLA/ SIP, mini +/- DC ( AC) A r 7 EDR/ DLA/ SIP, mini +/- DC (7 AC) A r EDR/ DLA/ SIP +/- DC (7 AC) A r EDR99/ DLA/ SIP, mini +/- DC ( AC) A r EDR/ DLA/ SIP +/- DC ( AC).Ar.7 EDR/ DLA/ SIP +/- DC ( AC). A r EDR/ DLA/ SIP +/- DC ( AC) A r EDR99/ DLD/ SIP mini DC.A.9 EDR99/ DLD9/ SIP mini DC.9 A r. EDR99/ -Frm A, DPST-NO (nrmally pen) Slid State Relays DAA//N SIP mini DC/AC A r EDR/ DL7D//N SIP 7DC Ar EDR9/ DLD/ SIP DC A r EDR9 DLD/ SIP DC A r EDR9/ DLD/ SIP DC A r EDR9/ DLA/ SIP +/- DC ( AC) A r EDR9/ DLA/ SIP +/- DC ( AC) A r EDR9/ DLD/ SIP DC A r EDR9/ DLD/ SIP DC A r EDR97/ DLD/ SIP - DC A r EDR9/ DLA/ SIP +/- DC ( AC) A r EDR99/ DLA/ SIP +/- DC ( AC) A r EDR9/ DLD/ SIP DC A r EDR99/ DLD/ SIP DC A r EDR9/ DLD/ SIP DC A r EDR9/ DLA9/ SIP +/- DC ( AC) 9 A r 7 EDR9/ DLA/ SIP +/- DC ( AC) A r EDR9/ DLD/ SIP DC A r EDR9/ DLD9/ SIP DC 9 A r 7 EDR9/ DLD9/ SIP DC 9 A r EDR9/ DLA/ SIP +/- DC (7 AC) A r EDR97/ DLA/ SIP +/- DC (7 AC) A r EDR9/ DLD/ SIP DC A r EDR99/ DLD/ SIP DC A r EDR9/ DLD7/ SIP DC 7 A r EDR9/ DLA/ SIP +/- DC ( AC) A r EDR9/ DLA/ SIP +/- DC ( AC) A r EDR9/ DLD/ SIP DC. A r 9 EDR9/ -

14 DLD/ SIP DC. A r 7 EDR9/ DLD/ SIP DC. A r EDR9/ DLA/ SIP +/- DC ( AC) A r EDR97/ DLA/ SIP +/- DC ( AC).7 A r EDR9/ -Frm B, SPST-NC (nrmally clsed) Slid State Relays Mdel Number Package Operating ltage Id (A) cnt. p/n DLD//C SIP, mini DC A r EDR/ DLD//C SIP, mini DC. A r EDR7/ DLD/C SIP, mini DC. A r EDR/ DLD//C SIP mini - DC. A r EDR/ DLA//C SIP mini +/-DC ( AC). A r EDR79/ DL7D//C SIP 7DC A r EDR/ lw pwer DL7A9//C SIP +/-7DC (AC) Ar EDR/ lw pwer -Frm B and -Frm A, DPST-NC/NO Slid State Relays Mdel Number Package Operating ltage Id (A) cnt. p/n All relays can be made in a panel munt b (. H.7 L. W), please replace D r D with D7 The speed and frequency prperties f many DL-types relays very much resembled the p/n EDR9. There is sme differences fr varies relays and all depended n the utput pwer. Please request a specific data sheet if that is imprtant fr yur applicatin. In the same packages, we manufacture a family f miniature, lw pwer Slid State Relays, built with MOSFETs. Thse relays designed fr an etremely small input cntrl current. Only. DC required t perate. Please request a data sheet 79 fr p/n EDR. Relays were designed as a replacement f a SSR with a TRAIC r SCR utput in applicatins where a lw pwer cnsumptin and lw leakage current are must. Cst f a Slid State Relay is very much tied t an rdered vlume, in t cases a relay csts in lw teens in rder f r mre. We charge n prductin set-up fee fr an rder f and abve fr any type (input and utput specificatins) Slid State Relay/Switch and Slid State Breaker. -

15 A part descriptin will be marked accrding t the descriptin belw but p/n EDR will stay the same fr already ite in circulatin (already sld). Ordering Instructin fr EDR s brand f Fast Relays/Switches D a b c e f /h /i /k /z / /v D is fr ur standard packages. (a) Package dimensins. H. L.9 W. H.7 L. W. H.7 L. W. H. L.9 W. H. L. W DIP,.7 H.9 L. W 7 panel munt,. H.7 L. W DIP (b) Speed - A device s ability t turn ON/OFF utput terminal(s) per secnd L a lw speed relay/switch, rated DC - KHz, direct driving cntrl, SIP A a lw speed I/O relay/switch, AC input relays, SIP N a medium speed relay/switch, rated DC - KHz, direct driving cntrl, SIP G a medium speed relay/switch, rated DC - KHz, lw current cntrl and pwer, SIP F a fast relay/switch, rated DC - KHz, lw current cntrl and pwer, SIP S a super-fast relay/switch, rated DC -. MHz, lw current cntrl and pwer, SIP U a super-fast relay/switch, rated DC. MHz, direct driving cntrl, SIP (c) ltage - A maimum allwed vltage between utput terminals It must be replaced with any f ffered vltage, DC, DC, 7DC, DC, DC, DC, DC, DC, 9DC, DC and DC, DC and 7DC. Nte: In an AC -relay a vltage specified a peak-t-peak maimum vltage and the maimum AC can be calculated by multiplying a maimum allwed vltage by factr f.7. (e) A relay can be use t cntrl DC r AC/DC pwer A - a relay/switch designed t switch/chp an AC pwer C - a relay/switch with a nrmal clse cntacts D - a relay/switch designed t switch/chp a DC pwer (f) A maimum allwed RMS CURRENT (Ampere) withut a heat sink. (h) We ffer several standard cntrl vltages DC, DC, DC, DC, -DC and -DC. Please specify the input cntrl vltage, as fr eample DLD/. Replace with a,,,,, - and - that is fr DC, DC, DC, DC, DC, -DC and -DC. Respectful cntrl vltage represented at the end f part number in the fllwing way, fr an eample EDR/ and EDR/. Bth relays are alt the same and difference is nly an applied cntrl vltage, if fr DC and is fr -DC; Cntrl ltage Representatin Cntrl ltage Representatin Cntrl ltage Representatin DC DC DC DC DC DC -DC 7 -DC 9-AC 9 (i) A pwer supply required fr a relay with an internal DC/DC cnverter. We ffer several standard vltages DC, DC, DC and DC. (k) Output terminals cnfiguratins r nthing SPST-NO r Frm A utput terminals SPST-NC r Frm B utput terminals SPDT r Frm C utput terminals T TOTEM utput, break-befre-make terminatin r NO-NO 7 DPST-NO r FORM A, nrmal pen terminals DPST-NC r FORM A, nrmal clse terminal 9 DPST-NC/NO r FORM A, nrmal clse and nrmal pen terminals (z) A relay/switch built with fllwing standard islatins L type relay is N type relay is, DC ( H ) and ( H ) DC. () Screening ptin, (NONE) fr industrial, B fr Class B, and S fr Class S (v) a eri-slpe ptin. Eamples: DFD/-/ - a fast relay/switch designed t wrk with up t DC and capable f Ampere f r. A cntrl vltage can be any frm DC until DC and required DC t perate prperly, SIP package. DNA// - a medium speed relay/switch designed t withstand DC peak-t-peak r AC and Ampere f r. A cntrl vltage is DC and the pwer supply is DC, SIP package. -