DATASHEET ISL Features. Applications. Related Literature. Low-Voltage, Single Supply, Single SPDT Analog Switch. FN6563 Rev 2.

Transcription

1 DATASHEET ISL4321 Low-Voltage, Single Supply, Single SPDT Analog Switch FN6563 Rev 2. The Intersil ISL4321 device is a precision, bidirectional, single SPDT analog switch designed to operate from a single +2.7V to +12V supply. Targeted applications include battery powered equipment that benefit from the devices low power consumption (5µW), low leakage currents (3nA max), and fast switching speeds (t ON = 28ns, t OFF = ns). ell phones, for example, often face ASI functionality limitations. The number of analog input or GPIO pins may be limited and digital geometries are not well suited to analog switch performance. This device may be used to mux-in additional functionality while reducing ASI design risk. It s small package alleviates board space limitations, making it an ideal solution. The ISL4321 is a single committed SPDT, which is perfect for use in 2-to-1 multiplexer applications. Related Literature TABLE 1. FEATURES AT A GLANE SW 1/SW 2 ISL4321 SPDT or 2x1 MUX 3.3V r ON V t ON /t OFF ns/ns 5V r ON 5V t ON /t OFF 12V r ON 12V t ON /t OFF Package 19 28ns/ns 11 25ns/17ns 6 Ld SOT-23 Technical Brief TB363 Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs) Application Note AN557 Recommended Test Procedures for Analog Switches Features Fully specified at 12V, 5V, and 3.3V supplies for 1% tolerances ON-resistance (r ON ) r ON matching between channels <1 Low charge injection p (Max) Single supply operation V to +12V Low power consumption (P D ) <5µW Low leakage current nA Fast switching action - t ON ns - t OFF ns Guaranteed break-before-make switching Minimum V ESD protection per method 15.7 TTL, MOS compatible Available in 6 Ld SOT-23 package Pb-free available (RoHS compliant) Applications Battery-powered, handheld, and portable equipment - ellular/mobile phones - Pagers - Laptops, notebooks, palmtops ommunications systems - Radios, ADSL Modems - PBX, PABX Test and measurement equipment - Ultrasound - omputerized Tomography (T) Scanner - Magnetic Resonance Image (MRI) - Positron Emission Tomography (PET) Scanner - Electrocardiograph Heads-up displays Audio and video switching Various circuits - +3V/+5V DAs and ADs - Sample and hold circuits - Digital filters - Operational amplifier gain switching networks - High frequency analog switching - High speed multiplexing - Integrator reset circuits FN6563 Rev 2. Page 1 of 12

2 Pinout (Note 1) ISL4321 (6 LD SOT-23) TOP VIEW IN 1 6 NO 2 5 OM 3 4 N NOTE: 1. Switch Shown for Logic Input. Truth Table NOTE: LOGI PIN N ISL4321 PIN NO ON OFF 1 OFF ON Logic.8V. Logic 1 2.4V. Pin Descriptions PIN NAME PIN NUMBER FUNTION 2 System Power Supply Input (+2.7V to +12V) 3 Ground onnection IN 1 Digital ontrol Input OM 5 Analog Switch ommon Pin Ordering Information PART NUMBER PART MARKING TEMP. RANGE ( ) PAKAGE ISL4321IH-T* 123I - to Ld SOT-23 Tape and Reel ISL4321IHZ-T* (Note) 123Z - to Ld SOT-23 (Pb-free) Tape and Reel PKG. DWG. # P6.64 P6.64 *Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 1% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IP/JEDE J STD-. NO 6 Analog Switch Normally Open Pin N 4 Analog Switch Normally losed Pin FN6563 Rev 2. Page 2 of 12

3 Absolute Maximum Ratings to to 15V Input Voltages IN (Note 2) to (() +.3V) NO, N (Note 2) to (() +.3V) Output Voltages OM (Note 2) to (() +.3V) ontinuous urrent (Any Terminal) ma Peak urrent NO, N, or OM (Pulsed 1ms, 1% Duty ycle, Max) ma ESD Rating Human Body Model (Per MIL-STD-883 Method 15).....2kV Thermal Information Thermal Resistance (Typical, Note 3) JA ( /W) 6 Ld SOT-23 Package Maximum Junction Temperature (Plastic Package) Maximum Storage Temperature Range to +15 Pb-free reflow profile see link below Operating onditions Temperature Range to AUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 2. Signals on N, NO, OM, or IN exceeding or are clamped by internal diodes. Limit forward diode current to maximum current ratings. 3. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details. Electrical Specifications - 5V Supply Test onditions: = +4.5V to +5.5V, = V, V INH = 2.4V, V INL =.8V (Note 4), Unless Otherwise Specified. PARAMETER TEST ONDITIONS TEMP ( ) MIN (Notes 5, 6) TYP MAX (Notes 5, 6) UNITS ANALOG SWITH HARATERISTIS Analog Signal Range, V ANALOG Full - V ON-Resistance, r ON = 4.5V, I OM = 1.mA, V NO or V N = 3.5V (See Figure 5) Full - 23 r ON Matching Between hannels, r ON = 5V, I OM = 1.mA, V NO or V N = 3.5V Full r ON Flatness, R FLAT(ON) = 5V, I OM = 1.mA, V NO or V N = 1V, 2V, 3V (Note 7) Full NO or N OFF Leakage urrent, = 5.5V, V OM = 1V, 4.5V, V NO or V N = 4.5V, 1V na I NO(OFF) or I N(OFF) Full -5-5 na OM OFF Leakage urrent, I OM(OFF) = 5.5V, V OM = 4.5V, 1V, V NO or V N = 1V, 4.5V na Full -5-5 na OM ON Leakage urrent, I OM(ON) V = 5.5V, V OM = 1V, 4.5V, or V NO or V N = 1V, na 4.5V or Floating Full -1-1 na DYNAMI HARATERISTIS Turn-ON Time, t ON V NO or V N = 3V, R L = 1k, L = 35pF, ns V IN = V to 3V (See Figure 1) Full - - ns Turn-OFF Time, t OFF V NO or V N = 3V, R L = 1k, L = 35pF, ns V IN = V to 3V (See Figure 1) Full - - ns Break-Before-Make Time Delay, t D R L =, L = 35pF, V NO = V N = 3V, V IN = V to 3V (See Figure 3) Full ns harge Injection, Q L = 1.nF, V G = V, R G = (See Figure 2) p OFF Isolation R L = 5, L = 5pF, f = 1MHz (See Figure 4) db Power Supply Rejection Ratio R L = 5, L = 5pF, f = 1MHz db NO or N OFF apacitance, OFF f = 1MHz, V NO or V N = V OM = V (See Figure 7) pf OM OFF apacitance, OM(OFF) f = 1MHz, V NO or V N = V OM = V (See Figure 7) pf OM ON apacitance, OM(ON) f = 1MHz, V NO or V N = V OM = V (See Figure 7) pf FN6563 Rev 2. Page 3 of 12

4 Electrical Specifications - 5V Supply Test onditions: = +4.5V to +5.5V, = V, V INH = 2.4V, V INL =.8V (Note 4), Unless Otherwise Specified. (ontinued) TEMP MIN MAX PARAMETER TEST ONDITIONS ( ) (Notes 5, 6) TYP (Notes 5, 6) UNITS POWER SUPPLY HARATERISTIS Power Supply Range Full V Positive Supply urrent, I+ = 5.5V, V IN = V or, all channels on or off Full µa DIGITAL HARATERISTIS Input Voltage Low, V INL Full V Input Voltage High, V INH Full V Input urrent, I INH, I INL = 5.5V, V IN = V or Full -1-1 µa Electrical Specifications - 3.3V Supply Test onditions: = +3.V to +3.6V, = V, V INH = 2.4V, V INL =.8V (Note 4), Unless Otherwise Specified. PARAMETER TEST ONDITIONS TEMP ( ) MIN (Notes 5, 6) TYP MAX (Notes 5, 6) UNITS ANALOG SWITH HARATERISTIS Analog Signal Range, V ANALOG Full - V ON-Resistance, r ON = 3V, I OM = 1.mA, V NO or V N = 1.5V Full - 6 r ON Matching Between hannels, r ON = 3.3V, I OM = 1.mA, V NO or V N = 1.5V Full r ON Flatness, R FLAT(ON) = 3.3V, I OM = 1.mA, V NO or V N =.5V, V, 1.5V Full NO or N OFF Leakage urrent, = 3.6V, V OM = 1V, 3V, V NO or V N = 3V, 1V na I NO(OFF) or I N(OFF) Full -5-5 na OM OFF Leakage urrent, I OM(OFF) = 3.6V, V OM = 3V, 1V, V NO or V N = 1V, 3V na Full -5-5 na OM ON Leakage urrent, I OM(ON) V = 3.6V, V OM = 1V, 3V, or V NO or V N = 1V, na 3V or floating Full -1-1 na DYNAMI HARATERISTIS Turn-ON Time, t ON V NO or V N = 1.5V, R L = 1k, L = 35pF, ns V IN = V to 3V Full ns Turn-OFF Time, t OFF V NO or V N = 1.5V, R L = 1k, L = 35pF, ns V IN = V to 3V Full - - ns Break-Before-Make Time Delay, t D R L =, L = 35pF, V NO or V N = 1.5V, V IN = V to 3V Full - - ns harge Injection, Q L = 1.nF, V G = V, R G = p OFF Isolation R L = 5, L = 5pF, f = 1MHz db Power Supply Rejection Ratio R L = 5, L = 5pF, f = 1MHz db NO or N OFF apacitance, OFF f = 1MHz, V NO or V N = V OM = V pf OM OFF apacitance, OM(OFF) f = 1MHz, V NO or V N = V OM = V pf OM ON apacitance, OM(ON) f = 1MHz, V NO or V N = V OM = V (See Figure 7) pf POWER SUPPLY HARATERISTIS Positive Supply urrent, I+ = 3.6V, V IN = V or, all channels on or off Full -1-1 µa FN6563 Rev 2. Page 4 of 12

5 Electrical Specifications - 3.3V Supply Test onditions: = +3.V to +3.6V, = V, V INH = 2.4V, V INL =.8V (Note 4), Unless Otherwise Specified. (ontinued) PARAMETER TEST ONDITIONS DIGITAL HARATERISTIS Input Voltage Low, V INL Full V Input Voltage High, V INH Full V Input urrent, I INH, I INL = 3.6V, V IN = V or Full -1-1 A Electrical Specifications - 12V Supply Test onditions: = +1.8V to +13V, = V, V INH = 4V, V INL =.8V (Note 4), Unless Otherwise Specified. PARAMETER TEST ONDITIONS TEMP ( ) MIN (Notes 5, 6) TYP MAX (Notes 5, 6) UNITS ANALOG SWITH HARATERISTIS Analog Signal Range, V ANALOG Full - V ON-Resistance, r ON = 1.8V, I OM = 1.mA, V NO or V N = 1V Full r ON Matching Between hannels, = 12V, I OM = 1.mA, V NO or V N = 1V r ON Full r ON Flatness, R FLAT(ON) = 12V, I OM = 1.mA, V NO or V N = 3V, 6V, 9V (Note 7) Full NO or N OFF Leakage urrent, = 13V, V OM = 1V, 12V, V NO or V N = 12V, 1V na I NO(OFF) or I N(OFF) Full -5-5 na OM OFF Leakage urrent, = 13V, V OM = 12V, 1V, V NO or V N = 1V, 12V na I OM(OFF) Full -5-5 na OM ON Leakage urrent, I OM(ON) V = 13V, V OM = 1V, 12V, or V NO or V N = 1V, na 12V or floating Full -1-1 na DYNAMI HARATERISTIS Turn-ON Time, t ON V NO or V N = 1V, R L = 1k, L = 35pF, ns V IN =Vto 4V Full ns Turn-OFF Time, t OFF V NO or V N = 1V, R L = 1k, L = 35pF, V IN = V ns to 4V Full ns Break-Before-Make Time Delay, t D R L =, L = 35pF, V NO or V N = 1V, V IN = V to 4V Full ns harge Injection, Q L = 1.nF, V G = V, R G = p OFF Isolation R L = 5, L = 5pF, f = 1MHz db rosstalk (hannel-to-hannel) R L = 5, L = 5pF, f = 1MHz db Power Supply Rejection Ratio R L = 5, L = 5pF, f = 1MHz db NO or N OFF apacitance, OFF f = 1MHz, V NO or V N = V OM = V pf OM OFF apacitance, OM(OFF) f = 1MHz, V NO or V N = V OM = V pf OM ON apacitance, OM(ON) f = 1MHz, V NO or V N = V OM = V (See Figure 7) pf POWER SUPPLY HARATERISTIS Positive Supply urrent, I+ = 13V, V IN = V or, all channels on or off Full -1-1 µa TEMP ( ) MIN (Notes 5, 6) TYP MAX (Notes 5, 6) UNITS FN6563 Rev 2. Page 5 of 12

6 Electrical Specifications - 12V Supply Test onditions: = +1.8V to +13V, = V, V INH = 4V, V INL =.8V (Note 4), Unless Otherwise Specified. (ontinued) TEMP MIN MAX PARAMETER TEST ONDITIONS ( ) (Notes 5, 6) TYP (Notes 5, 6) UNITS DIGITAL HARATERISTIS Input Voltage Low, V INL Full V Input Voltage High, V INH Full V Input urrent, I INH, I INL = 13V, V IN = V or Full -1-1 A NOTES: 4. V IN = input voltage to perform proper function. 5. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. 6. Parts are 1% tested at. Over-temperature limits established by characterization and are not production tested. 7. Limits established by characterization and are not production tested. Test ircuits and Waveforms 3V OR 4V LOGI V 5% t r < ns t f < ns SWITH SWITH OUTPUT V NO V t OFF 9% V OUT 9% SWITH LOGI NO OR N IN OM R L 1k V OUT L 35pF t ON Logic input waveform is inverted for switches that have the opposite logic sense. FIGURE 1A. MEASUREMENT POINTS FIGURE 1. SWITHING TIMES Repeat test for all switches. L includes fixture and stray capacitance. R L V OUT = V (NO or N) R L + r ON FIGURE 1B. TEST IRUIT SWITH OUTPUT V OUT V OUT R G NO OR N OM V OUT LOGI ON Q = V OUT x L OFF ON V V G IN LOGI L FIGURE 2A. MEASUREMENT POINTS FIGURE 2. HARGE INJETION FIGURE 2B. TEST IRUIT FN6563 Rev 2. Page 6 of 12

7 Test ircuits and Waveforms (ontinued) 3V OR 4V LOGI V SWITH OUTPUT V OUT V t D 9% V NX LOGI NO N IN OM R L V OUT L 35pF L includes fixture and stray capacitance. FIGURE 3A. MEASUREMENT POINTS FIGURE 3. BREAK-BEFORE-MAKE TIME FIGURE 3B. TEST IRUIT SIGNAL GENERATOR NO OR N r ON = V 1 /1mA NO OR N V NX IN X V OR V INH 1mA V 1 IN.8V OR V INH ANALYZER OM OM R L FIGURE 4. OFF ISOLATION TEST IRUIT FIGURE 5. r ON TEST IRUIT SIGNAL GENERATOR NO1 OR N1 OM1 5 NO OR N V OR 2.4V IN 1 IN 2 V OR V INH IMPEDANE ANALYZER IN X V OR V INH ANALYZER R L OM2 NO2 OR N2 N OM FIGURE 6. ROSSTALK TEST IRUIT FIGURE 7. APAITANE TEST IRUIT FN6563 Rev 2. Page 7 of 12

8 Detailed Description The ISL4321 bidirectional, single SPDT analog switch offers precise switching capability from a single 2.7V to 12V supply with low ON-resistance (19 ) and high speed operation (t ON =28ns, t OFF = ns). The device is especially well suited to portable battery powered equipment thanks to the low operating supply voltage (2.7V), low power consumption (5µW), low leakage currents (3nA max), and the tiny SOT-23 packaging. High frequency applications also benefit from the wide bandwidth, and the very high off isolation rejection. Supply Sequencing and Overvoltage Protection With any MOS device, proper power supply sequencing is required to protect the device from excessive input currents which might permanently damage the I. All I/O pins contain ESD protection diodes from the pin to and (see Figure 8). To prevent forward biasing these diodes, must be applied before any input signals, and input signal voltages must remain between and. If these conditions cannot be guaranteed, then one of the following two protection methods should be employed. Logic inputs can easily be protected by adding a 1k resistor in series with the input (see Figure 8). The resistor limits the input current below the threshold that produces permanent damage, and the sub-microamp input current produces an insignificant voltage drop during normal operation. Adding a series resistor to the switch input defeats the purpose of using a low r ON switch, so two small signal diodes can be added in series with the supply pins to provide overvoltage protection for all pins (see Figure 8). These additional diodes limit the analog signal from 1V below to 1V above. The low leakage current performance is unaffected by this approach, but the switch resistance may increase, especially at low supply voltages. OPTIONAL PROTETION RESISTOR IN X V NO OR N OPTIONAL PROTETION DIODE V OM OPTIONAL PROTETION DIODE FIGURE 8. OVERVOLTAGE PROTETION Power-Supply onsiderations The ISL4321 construction is typical of most MOS analog switches, except that they have only two supply pins: and. and drive the internal MOS switches and set their analog voltage limits. Unlike switches with a 13V maximum supply voltage, the ISL V maximum supply voltage provides plenty of room for the 1% tolerance of 12V supplies, as well as room for overshoot and noise spikes. The minimum recommended supply voltage is 2.7V. It is important to note that the input signal range, switching times, and ON-resistance degrade at lower supply voltages. Refer to the Electrical Specification tables beginning on page 5 and Typical Performance urves beginning on page 9 for details. and also power the internal logic and level shifter. The level shifter convert the input logic levels to switched and signals to drive the analog switch gate terminals. This device cannot be operated with bipolar supplies, because the input switching point becomes negative in this configuration. Logic-Level Thresholds This switch is TTL compatible (.8V and 2.4V) over a supply range of 3V to 11V (see Figure 15). At 12V the V IH level is about 2.5V. This is still below the TTL guaranteed high output minimum level of 2.8V, but noise margin is reduced. For best results with a 12V supply, use a logic family the provides a V OH greater than 3V. The digital input stages draw supply current whenever the digital input voltage is not at one of the supply rails. Driving the digital input signals from to with a fast transition time minimizes power dissipation. High-Frequency Performance In 5 systems, signal response is reasonably flat even past MHz (see Figure 16). Figure 16 also illustrates that the frequency response is very consistent over a wide range, and for varying analog signal levels. An OFF switch acts like a capacitor and passes higher frequencies with less attenuation, resulting in signal feedthrough from a switch s input to its output. Off isolation is the resistance to this feedthrough. Figure 17 details the high off isolation rejection provided by this part. At 1MHz, off isolation is about 5dB in 5 systems, decreasing approximately db per decade as frequency increases. Higher load impedances decrease off isolation rejection due to the voltage divider action of the switch OFF impedance and the load impedance. Leakage onsiderations Reverse ESD protection diodes are internally connected between each analog-signal pin and both and. One of FN6563 Rev 2. Page 8 of 12

9 these diodes conducts if any analog signal exceeds or. Virtually all the analog leakage current comes from the ESD diodes to or. Although the ESD diodes on a given signal pin are identical and therefore fairly well balanced, they are reverse biased differently. Each is biased by either or and the analog signal. This means their leakages will vary as the signal varies. The difference in the two diode leakages to the and pins constitutes the analog-signal-path leakage current. All analog leakage current flows between each pin and one of the supply terminals, not to the other switch terminal. This is why both sides of a given switch can show leakage currents of the same or opposite polarity. There is no connection between the analog signal paths and or. Typical Performance urves T A =, Unless Otherwise Specified. r ON ( ) (V) r ON ( ) = 3.3V = 5V = 12V V OM (V) FIGURE 9. ON-RESISTANE vs SUPPLY VOLTAGE FIGURE 1. ON-RESISTANE vs SWITH VOLTAGE r ON ( ) = 5V = 12V V OM (V) FIGURE 11. r ON MATH vs SWITH VOLTAGE = 3.3V Q (p) 6 5 = 5V = 12V 1 = 3.3V V OM (V) FIGURE 12. HARGE INJETION vs SWITH VOLTAGE FN6563 Rev 2. Page 9 of 12

10 Typical Performance urves T A =, Unless Otherwise Specified. (ontinued) t ON (ns) (V) FIGURE 13. TURN-ON TIME vs SUPPLY VOLTAGE t OFF (ns) (V) FIGURE 14. TURN-OFF TIME vs SUPPLY VOLTAGE V INH AND V INL (V) V INH V INL (V) FIGURE 15. DIGITAL SWITHING POINT vs SUPPLY VOLTAGE NORMALIZED GAIN (db) -3-6 = 3.3V TO 12V GAIN PHASE R L = 5 V IN =.2V P-P TO 2.5V P-P ( = 3.3V) V IN =.2V P-P TO 4V P-P ( = 5V) V IN =.2V P-P TO 5V P-P ( = 12V) FREQUENY (MHz) FIGURE 16. FREQUENY RESPONSE PHASE ( ) 1 = 3V TO 13V R L = 5 OFF ISOLATION (db) ISOLATION PSRR (db) = 3.3V, SWITH OFF = 12V, SWITH OFF = 12V, SWITH ON = 3.3V, SWITH ON k 1k 1k 1M 1M 1M 5M FREQUENY (Hz) FIGURE 17. OFF ISOLATION FREQUENY (MHz) FIGURE 18. ±PSRR vs FREQUENY FN6563 Rev 2. Page 1 of 12

11 Die haracteristics SUBSTRATE POTENTIAL (POWERED UP): TRANSISTOR OUNT: ISL4321: 58 PROESS: Si Gate MOS opyright Intersil Americas LL 7. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see Intersil products are manufactured, assembled and tested utilizing ISO91 quality systems as noted in the quality certifications found at Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil orporation and its products, see FN6563 Rev 2. Page 11 of 12

12 Small Outline Transistor Plastic Packages (SOT23-6) A L A2 SEATING PLANE b 6. (.8) M 5 L e1 D L e X 1 4X 1 WITH PLATING c A1 E.1 (.4) BASE METAL L L1 b b1 R1 L SEATING PLANE R -- c1 VIEW GAUGE PLANE L2 E1 P LEAD SMALL OUTLINE TRANSISTOR PLASTI PAKAGE INHES MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A A A b b c c D E E e.374 Ref.95 Ref - e1.748 Ref 1.9 Ref - L L1.24 Ref..6 Ref. L2.1 Ref..25 Ref. N R R o 8 o o 8 o - Rev. 3 9/3 NOTES: 1. Dimensioning and tolerance per ASME Y14.5M Package conforms to EIAJ S-74 and JEDE MO178AB. 3. Dimensions D and E1 are exclusive of mold flash, protrusions, or gate burrs. 4. Footlength L measured at reference to gauge plane. 5. N is the number of terminal positions. 6. These Dimensions apply to the flat section of the lead between.8mm and.15mm from the lead tip. 7. ontrolling dimension: MILLIMETER. onverted inch dimensions are for reference only VIEW FN6563 Rev 2. Page 12 of 12