DATASHEET. Features. Applications. Related Literature ISL1550. Single Port, VDSL2 Differential Line Driver. FN6795 Rev 0.
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1 DATASHEET ISL155 Single Port, VDSL2 Differential Line Driver The ISL155 is a dual operational amplifier intended to be used as a differential line driver. ISL155 s high bandwidth and low distortion performance enables the support of VDSL2 8b, 17a and a modem applications. This device features a high current drive capability of ±75mA required to drive large voltage peaks into heavy loads. In Central Office (CO) applications, the driver achieves a typical Missing Band Power Ratio (MBPR) of -dbc in VDSL2 8b upstream (US) 1 band and MBPR s of -1dBc and dbc in VDSL2 17a US1 and US2 respectively. The ISL155 has two bias current control pins (C, C1) to allow for four power settings (disable, low, medium, high). The VDSL modem DSP configures the line driver s power setting based on the desired mode of operation. The line driver operates on a nominal single 12V or a dual ±V supplies with bias current in active mode between 15mA to 2mA, depending on its power setting. The ISL155 s gain setting is configurable at the application level by setting the Rf and Rg resistor values. The surge current handling of ISL155 has been enhanced to allow ITU-T K.2 and GR189 compliance with minimal external surge protection circuitry. The ISL155 is available in the thermally-enhanced, Pb-free RoHS compliant 1 Ld QFN package and is specified for operation over the full C to 85 C temperature range. Features FN795 Rev. 2dBm output power capability Drives up to ±75mA from a 12V supply 18V P-P differential output drive into 2-89dBc typical driver output distortion at full output at 2kHz, 12V P-P differential -1dBc US1, dbc US2 avg. MBPR 17a Supply range: ±4.V to ±.V, 8.V to 1.2V Thermal shutdown K.2, GR-189 Surge Robustness Validated Applications VDSL2 Profiles: 8MHz, 17MHz, and MHz Related Literature AN125 Choosing and Using Bypass Capacitors TABLE 1. ALTERNATE SOLUTIONS PART # NOMINAL ±V CC (V) BANDWIDTH (MHz) APPLICATIONS ISL1557 ±,12 2 VDSL2 ISL159A ±12,24 24 VDSL2 V 1n 5 ½ ISL155 SUPPLY DECOUPLING NOT SHOWN 2.2 AFE Rg 1.5k 2.2n - - Rf 75 Rf 75 1k 1k 1:2.5 1 NOMINAL LINE n ½ ISL M 8.9M 9.4M 9.9M 1.4M 1.9M 11.4M 11.9M -V FIGURE 1. TYPICAL APPLICATION CIRCUIT FIGURE 2. US2 MBPR 17a VDSL2 PERFORMANCE FN795 Rev. Page 1 of 1
2 Connection Diagram V INA ½ ISL155 OUTA k INA- 2V P-P 75 INB- 1V P-P 5V P-P into 5-1.5k ½ ISL155 OUTB 25 INB BIAS CURRENT CONTROL C C1 GND -V Av = (1.5k / (75/2)) 1 = 5V/V Pin Configuration FIGURE. TYPICAL DIFFERENTIAL AMPLIFIER I/O ISL155 (1 LD QFN) TOP VIEW OUTA NC VS OUTB NC 1 12 NC 2 V S- * 11 1 INA- INA INB- INB GND 4 9 C NC NC VS- C *THERMAL PAD CONNECTS TO MOST NEGATIVE SUPPLY FN795 Rev. Page 2 of 1
3 Pin Descriptions PIN NUMBER PIN NAME FUNCTION 1 NC No Connect 2 INA- Amplifier A Inverting Input INA Amplifier A Non-Inverting Input 4 GND Ground 5 NC No Connect NC No Connect 7 VS- Negative Supply Voltage 8 C Digital Control Pin 9 C1 Digital Control Pin 1 INB Amplifier B Non-Inverting Input 11 INB- Amplifier B Inverting Input 12 NC No Connect 1 OUTB Amplifier B Output 14 VS Positive Supply Voltage 15 NC No Connect 1 OUTA Amplifier A Output Ordering Information PART NUMBER (Notes 2, ) PART MARKING TEMP RANGE ( C) PACKAGE (Pb-free) PKG. DWG. # ISL155IRZ 155 IRZ to 85 1 Ld QFN L1.4x4H ISL155IRZ-T7 (Note 1) 155 IRZ to 85 1 Ld QFN L1.4x4H ISL155IRZ-T1 (Note 1) 155 IRZ to 85 1 Ld QFN L1.4x4H ISL155IRZ-EVALZ Evaluation Board NOTES: 1. Please refer to TB47 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 1% matte tin plate plus anneal (e termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-2.. For Moisture Sensitivity Level (MSL), please see device information page for ISL155. For more information on MSL please see tech brief TB. FN795 Rev. Page of 1
4 Absolute Maximum Ratings (T A = 25 C) V S Voltage to GND V to 1.2V Driver V IN Voltage GND to V S C, C 1 Voltage to GND V to V S Current into any Input mA Continuous Output Current for Long Term Reliability mA ESD Rating Human Body Model (Tested per JESD22-A114F) kV Machine Model (Tested per JESD22-A115C) V Charge Device Model (Tested per JESD22-C11E) kV Thermal Information Thermal Resistance (Typical) JA ( C/W) JC ( C/W) 1 Ld QFN Package (Notes 4, 5) Maximum Junction Temperature (Plastic Package) C Storage Temperature Range C to 15 C Pb-Free Reflow Profile see link below Operating Conditions Ambient Temperature Range C to 85 C Junction Temperature Range C to 15 C CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 4. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with direct attach features. See Tech Brief TB For JC, the case temp location is the center of the exposed metal pad on the package underside. Electrical Specifications V S = ±V, see Figure 1, T A = 25 C, unless otherwise specified. PARAMETER DESCRIPTION CONDITIONS MIN (Note ) TYP MAX (Note ) UNIT AC PERFORMANCE BW -db Bandwidth See Figure 1 15 MHz Total Harmonic Distortion, Differential f = 2kHz, V O = 12V P-P output, R L = 2-89 dbc f = 4MHz, V O = 12V P-P output, R L = 1-7 dbc f = 1MHz, V O = 12V P-P output, R L = 1-1 dbc SR Slew Rate (2% to 8%) V OUT from -V to V (differential) V/µs DC PERFORMANCE V OS_CM Input Offset Voltage Common Mode 45 mv V OS_DM Input Offset Voltage Differential Mode mv INPUT CHARACTERISTICS I B Non-Inverting Input Bias Current µa I B - DM Inverting Input Bias Current Differential Mode ±7 45 µa e O Differential Output Noise See Figure 1 [at transformer input] 45 nv Hz OUTPUT CHARACTERISTICS V OUT Loaded Output Swing (single-ended) V S = ±V, R L DIFF = 1 ±4.7 ±5. V V S = ±V, R L DIFF = 2 ±4.5 V SUPPLY V S Supply Voltage Single supply (-V S = GND) V I S (Full Bias) Positive Supply Current All outputs at V, C = C 1 = V ma I S (Medium Bias) Positive Supply Current All outputs at V, C = 5V, C 1 = V ma I S (Low Bias) Positive Supply Current All outputs at V, C = V, C 1 = 5V ma I S (Power down) Positive Supply Current All outputs at V, C = C 1 = 5V ma I INH, C or C 1 C, C 1 Input Current, High C, C 1 = V µa I INL, C or C 1 C, C 1 Input Current, Low C, C 1 = V µa V INH, C or C 1 C, C 1 Input Voltage, High 2. V V INL, C or C 1 C, C 1 Input Voltage, Low.8 V NOTE:. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design. FN795 Rev. Page 4 of 1
5 Typical Performance Curves noted. V CC = ±V, See Figure 1, T A = 25 C, C = C1 = V (Full power), Unless otherwise pf 18pF 22pF 1M 1M 1M 1G FIGURE 4. SMALL SIGNAL FREQUENCY RESPONSE vs R LOAD 1M 1M 1M 1G FIGURE 5. SMALL SIGNAL FREQUENCY RESPONSE vs C LOAD - - V CC = 12V TO 8V - - 1V P-P 5V P-P 2V P-P 1M 1M 1M 1G FIGURE. SMALL SIGNAL BANDWIDTH vs SUPPLY VOLTAGE 1M 1M 1M 1G FIGURE 7. LARGE SIGNAL FREQUENCY RESPONSE - 5V OP-P-DIFF 1 R LOAD -1 1M 1M 1M FIGURE 8. HARMONIC DISTORTION vs FREQUENCY 1 R LOAD FIGURE 9. 4MHz HARMONIC DISTORTION vs OUTPUT VOLTAGE FN795 Rev. Page 5 of 1
6 Typical Performance Curves noted. (Continued) V CC = ±V, See Figure 1, T A = 25 C, C = C1 = V (Full power), Unless otherwise -5 1 R LOAD -5 1 R LOAD FIGURE 1. 1MHz HARMONIC DISTORTION vs OUTPUT VOLTAGE FIGURE 11. 2MHz HARMONIC DISTORTION vs OUTPUT VOLTAGE MTPR (dbm) -2 PAR = 5.2/V - 18dBm LINE POWER, R L = 25 AVG. MBPR = -dbc M.98M 4.18M 4.8M 4.58M 4.78M 4.98M 5.18M FIGURE 12. MBPR 8b US1 MTPR (dbm) -2 PAR =./V dBm LINE POWER, R L = 25 AVG. MBPR = dbc M 8.98M 9.48M 9.98M 1.5M 11M 11.5M FIGURE 1. MBPR 17a US2 1 LOW POWER nv/ Hz FULL POWER MEDIUM POWER Fig. 1 at transformer inputs 1 1k 1k 1M 1M 1M FIGURE 14. DIFFERENTIAL OUTPUT NOISE FN795 Rev. Page of 1
7 Typical Performance Curves otherwise noted. V CC = ±V, See Figure 1, T A = 25 C, C =.V, C1 = V (Medium power), Unless pf 18pF 22pF 1M 1M 1M 1G FIGURE 15. SMALL SIGNAL FREQUENCY RESPONSE vs R LOAD 1M 1M 1M 1G FIGURE 1. SMALL SIGNAL FREQUENCY RESPONSE vs C LOAD - - 1V P-P 5V P-P 2V P-P - 5V OP-P-DIFF 1 R LOAD 1M 1M 1M 1G FIGURE 17. LARGE SIGNAL FREQUENCY RESPONSE -1 1M 1M 1M FIGURE 18. HARMONIC DISTORTION vs FREQUENCY -5 1 R LOAD -5 1 R LOAD FIGURE 19. 4MHz HARMONIC DISTORTION vs OUTPUT VOLTAGE FIGURE 2. 1MHz HARMONIC DISTORTION vs OUTPUT VOLTAGE FN795 Rev. Page 7 of 1
8 Typical Performance Curves otherwise noted. V CC = ±V, See Figure 1, T A = 25 C, C = V, C1 =.V (Low power), unless pf 18pF 22pF 1M 1M 1M 1G FIGURE 21. SMALL SIGNAL FREQUENCY vs R LOAD 1M 1M 1M 1G FIGURE 22. SMALL SIGNAL FREQUENCY RESPONSE vs C LOAD - 5V OP-P-DIFF - - 1V P-P 5V P-P 2V P-P 1 R LOAD 1M 1M 1M 1G FIGURE 2. LARGE SIGNAL FREQUENCY RESPONSE -1 1M 1M 1M FIGURE 24. HARMONIC DISTORTION vs FREQUENCY 1 R LOAD R LOAD FIGURE 25. 4MHz HARMONIC DISTORTION vs OUTPUT VOLTAGE FIGURE 2. 1MHz HARMONIC DISTORTION vs OUTPUT VOLTAGE FN795 Rev. Page 8 of 1
9 Typical Performance Curves VCC = ±V, See Figure, Gain = 5V/V (Differential), Rf = 1.5k, R LOAD = 1, T A = 25 C, C and C1 Varied, unless otherwise noted. GAIN (db) - V S = ±V AV = 5 RF = 75 R LOAD = 1 V IN = 1V P-P DIFF k 1M 1M 1M 1G FIGURE 27. OFF-ISOLATION DIFFERENTIAL ( ) V S = ±V RF = 75 R G = 74 R L = 1 DIFF FULL POWER MEDIUM POWER LOW POWER k 1M 1M 1M FIGURE 28. DIFFERENTIAL OUTPUT IMPEDANCE C, C1 PIN 2V/DIV T = s Output Sine Wave C, C1 PIN 2V/DIV T = 1.µs OUTPUT PIN 5V/DIV OUTPUT PIN 5V/DIV ns FIGURE 29. POWER ON FIGURE. POWER OFF T = 242.8ns 4 5 FULL POWER(mA) OUTPUT A 2V/DIV OUTPUT B FIGURE 1. OVERDRIVE RECOVERY QUIESCENT CURRENT (ma) 25 MEDIUM POWER 2 15 LOW POWER 1 5 Figure TEMPERATURE ( C) FIGURE 2. QUIESCENT CURRENT vs TEMPERATURE FN795 Rev. Page 9 of 1
10 Typical Performance Curves VCC = ±V, See Figure, Gain = 5V/V (Differential), Rf = 1.5k, R LOAD = 1, T A = 25 C, C and C1 Varied, unless otherwise noted. (Continued) HD (dbc) V P-P-D 2 R LOAD 8 Figure TEMPERATURE( C) FIGURE. 2kHz DISTORTION vs TEMPERATURE HD (dbc) Figure TEMPERATURE( C) FIGURE 4. 4MHz DISTORTION vs TEMPERATURE FN795 Rev. Page 1 of 1
11 Applications Information Product Description The ISL155 is a dual operational amplifier designed for line driving in DMT VDSL2 8MHz, 12MHz, 17MHz and MHz bandplans solutions. It is a current mode feedback amplifier with low distortion drawing moderately low supply current. Due to the current feedback architecture, the ISL155 closed-loop db bandwidth is dependent on the value of the feedback resistor. First, the desired bandwidth is selected by choosing the feedback resistor, R F, and then the gain is set by picking the gain resistor, R G (Figure ). VDSL CO Applications The ISL155 is designed as a VDSL line driver for CO. At an output current of ±45mA, the typical supply voltage headroom is 1.5V on each side of the differential output. The average line power requirement for the VDSL CO application is 2dBm (1mW) into a 1 line. The average line voltage is.1v RMS. The VDSL DMT peak-to-average ratio (crest factor) of 5. implies peak voltage of 1.8V P into the line. Using a differential drive configuration and transformer coupling with standard back termination, a transformer ratio of 1:2.5 is selected. The active termination technique provides better power efficiency by reducing the backmatch resistor by a factor of K = 5. Positive feedback resistors, RP, can be sized to make the effective backmatch impedance larger. The circuit configuration is shown in Figure k /k RP TX1 AFE 1 RP 12.5/k 1:2.5 R P = R F (K/(K-1)) Similarly, capacitors should be low inductance for best performance. Capacitance at the Inverting Input Due to the topology of the current feedback amplifier, stray capacitance at the inverting input will affect the AC and transient performance of the ISL155 when operating in the non-inverting configuration. Feedback Resistor Values The ISL155 has been designed and specified with R F =1.5k for A V = 5 (Figure ). As is the case with all current feedback amplifiers, wider bandwidth at the expense of slight peaking, can be obtained by reducing the value of the feedback resistor. Inversely, larger values of the feedback resistor will cause rolloff to occur at a lower frequency. Quiescent Current vs Temperature The ISL155 was designed to slightly increase quiescent current with temperature to maintain good distortion performance at high temperatures. Refer to Typical Performance Curves beginning on page 5. Supply Voltage Range The ISL155 has been designed to operate with supply voltages from ±4.V to ±.V nominal. Optimum bandwidth, slew rate, and video characteristics are obtained at higher supply voltages. Single Supply Operation If a single supply is desired, values from 8.V to 1.2V nominal can be used as long as the input common mode range is not exceeded. When using a single supply, be sure to either, 1. DC bias the inputs at an appropriate common mode voltage and AC-couple the signal, or 2. Ensure the driving signal is within the common mode range of the ISL155. FIGURE 5. CIRCUIT CONFIGURATION Power Supply Bypassing and Printed Circuit Board Layout As with any high frequency device, good printed circuit board layout is necessary for optimum performance. Ground plane construction is highly recommended. Lead lengths should be as short as possible (below.25 ). The power supply pins must be well bypassed to reduce the risk of oscillation. A 4.7µF tantalum capacitor in parallel with a.1µf ceramic capacitor is adequate for each supply pin. During power-up, it is necessary to limit the slew rate of the rising power supply to less than 1V/µs. If the power supply rising time is undetermined, a series 1 resistor on the power supply line before the decoupling caps can be used to ensure the proper power supply rise time. For good AC performance, parasitic capacitances should be kept to a minimum, especially at the inverting input. This implies keeping the ground plane away from this pin. Carbon or metal film resistors are acceptable, while use of wire-wound resistors should be avoided because of their parasitic inductance. FN795 Rev. Page 11 of 1
12 Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest revision. DATE REVISION CHANGE FN795. Initial release. Products Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks. Intersil's product families address power management and analog signal processing functions. Go to for a complete list of Intersil product families. For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on intersil.com: ISL155 To report errors or suggestions for this datasheet, please go to: Copyright Intersil Americas LLC 212. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see Intersil products are manufactured, assembled and tested utilizing ISO91 quality systems as noted in the quality certifications found at Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see FN795 Rev. Page 12 of 1
13 Package Outline Drawing L1.4x4H 1 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev, 1/ X 1.95 PIN 1 INDEX AREA 4. A B X.5 1 PIN #1 INDEX AREA (4X).15 TOP VIEW 1x.55±.5 8 BOTTOM VIEW M C. ±.5 AB.9±.1 SEE DETAIL "X".1 C C BASE PLANE (. TYP ) SIDE VIEW SEATING PLANE ( 2.4) (12x.5) TYPICAL RECOMMENDED LAND PATTERN (1x.) (1x.75) C. 2 REF 5./-.2 DETAIL "X" NOTES: Dimensions are in millimeters. Dimensions in ( ) for Reference Only. Dimensioning and tolerancing conform to ASME Y14.5m Unless otherwise specified, tolerance : Decimal ±.5 Dimension applies to the metallized terminal and is measured between.15mm and.mm from the terminal tip. Tiebar shown (if present) is a non-functional feature. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. FN795 Rev. Page 1 of 1
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