Precision, Quad, SPDT, CMOS Analog Switch

Transcription

1 ; Rev 1; 6/99 Precision, Quad, SPDT, MOS Analog Switch General Description The is a precision, quad, single-pole doublethrow (SPDT) analog switch. The four independent switches operate with bipolar supplies ranging from ±4.5V to ±20V, or with a single-ended supply between +V and +30V. The offers low on resistance (less than 35Ω), guaranteed to match within 2Ω between channels and to remain flat over the analog signal range ( 3Ω max). It also offers break-before-make switching (ns typical), with turn-off times less than 145ns and turn-on times less than 175ns. The is ideal for portable operation since quiescent current runs less than 50µA with all inputs high or low. This monolithic, quad switch is fabricated with Maxim s new improved silicon-gate process. Design improvements guarantee extremely low charge injection (p), low power consumption (3.75mW), and electrostatic discharge (ESD) greater than 2000V. Logic inputs are TTL and MOS compatible and guaranteed over a +0.8V to +2.4V range regardless of supply voltage. Logic inputs and switched analog signals can range anywhere between the supply voltages without damage. Applications Test Equipment ommunications Systems PBX, PABX Heads-Up Displays Portable Instruments Pin onfiguration Features Upgraded Replacement for a DG211/DG212 Pair or Two DG403s Low On Resistance < 17Ω Typical (35Ω Max) Guaranteed Matched On Resistance Between hannels < 2Ω Guaranteed Flat On Resistance over Analog Signal Range 3Ω Max Guaranteed harge Injection < p Guaranteed Off-hannel Leakage < 6nA at +85 ESD Guaranteed > 2000V per Method Single-Supply Operation (+V to +30V) Bipolar-Supply Operation (±4.5V to ±20V) TTL-/MOS-Logic ompatibility Rail-to-Rail Analog Signal Handling apability Ordering Information PART TEMP. RANGE PIN-PAKAGE PP 0 to Plastic DIP WP 0 to Wide SO UP 0 to TSSOP /D 0 to +70 Dice* EPP -40 to Plastic DIP EWP -40 to Wide SO EUP -40 to TSSOP MJP -55 to ERDIP * ontact factory for dice specifications. Typical Operating ircuit TOP VIEW INPUTS OUTPUTS IN IN4 V 1 V 1 - V 2 NO1 OM NO4 OM4 V 2 N N4 N.. OS IN N N3 OM2 NO OM3 NO3 V 3 V 3 - V 4 IN2 11 IN3 V 4 DIP/SO/TSSOP SWITHES ARE SHOWN WITH LOGI "0" INPUT N.. = NOT INTERNALLY ONNETED FLYING APAITOR LEVEL TRANSLATOR (2-HANNEL) Maxim Integrated Products 1 For free samples & the latest literature: or phone For small orders, phone

2 Precision, Quad, SPDT, MOS Analog Switch ABSOLUTE MAXIMUM RATINGS to...44v V IN, V OM, V NO, V N... to (V NO - V N )...32V to Ground...30V to Ground...-30V urrent, Any Terminal Except V OM, V NO, or V N...30mA ontinuous urrent, V OM, V NO, or V N...20mA Peak urrent, V OM, V NO, or V N (Pulsed at 1ms, % duty cycle max)...70ma ESD V ELETRIAL HARATERISTIS Dual Supplies ( = 0V, =, =, T A = +25, unless otherwise noted.) ontinuous Power Dissipation (T A = +70 ) (Note 1) Plastic DIP (derate above +70 by 11.11mW/ )...889mW SO (derate above +70 by.00mw/ )...800mW ERDIP (derate above +70 by 11.11mW/ )...889mW TSSOP (derate above +70 by 7mW/ )...559mW Operating Temperature Ranges:...0 to +70 E to +85 MJP to +125 Storage Temperature Range to +150 Lead Temperature (soldering, sec) Note 1: Device mounted with all leads soldered to P board. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. PARAMETER SYMBOL ONDITIONS MIN TYP MAX (Notes 2, 3) UNITS POWER REQUIREMENTS Positive Supply urrent I+ V IN = 0V/5V, = 16.5V, = -16.5V ma Supply Voltage Range / Dual supply, = ±4.5V ±20 Single supply, = 30 V Negative Supply urrent I- V IN = 0V/5V, = 16.5V, = -16.5V µa LOGI INPUT Input Voltage Low V IL 0.8 V Input Voltage High V IH 2.4 V Input urrent I IN V IN =, µa SWITH Analog Signal Range V OM, V NO, V N V V On ircuit Resistance R OM = +V, I (N or NO) = 1mA; M ON Ω V OM = -V, I (N or NO) = 1mA, E 45 On Resistance Match Between hannels (Note 4) On Resistance Flatness (Note 4) On ircuit Leakage urrent Off ircuit Leakage urrent DYNAMI R ON I (N or NO) = -ma, V D = V or -V, =15V, = T A = +25 T A = T MIN to T MAX R ON I (N or NO) = -ma, V D = 5V T A = or -5V, =15V, = T A = T MIN to T MAX 5 I OM V OM = ±15.5V, V N or V NO = +15.5V, M = 16.5V, = -16.5V, E I N or V OM = ±15.5V V N or V NO = +15.5V, M I NO = 16.5V, = -16.5V, E Turn-Off Time t OFF Figure ns Turn-On Time t ON 175 ns Break-Before-Make Time t OPEN ns Off apacitance OFF 5 pf On apacitance ON 5 pf harge Injection Q L = nf, V GEN = 0V, R GEN = 0Ω, Figure 6 T A = p Off Isolation OIRR f = 1MHz, RL = 75Ω, V OM = 2.3V RMS 72 db rosstalk RR 78 db 2 4 Ω Ω na na 2

3 Precision, Quad, SPDT, MOS Analog Switch ELETRIAL HARATERISTIS DUAL SUPPLIES (continued) ( = 0V, =, =, T A = T MIN to T MAX, unless otherwise noted.) PARAMETER SYMBOL ONDITIONS MIN TYP MAX (Notes 2, 3) UNITS LOGI INPUT Input Voltage Low V IL 0.8 V Input Voltage High V IH 2.4 V Input urrent I IN V IN =, µa SWITH Analog Signal Range V OM V On ircuit Resistance RON V OM = V, I (N or NO) = 1mA;, E 45 V OM = -V, I (N or NO = 1mA M 45 Ω On ircuit Leakage urrent IOM V OM = ±15V, V N or V NO =,, E - = 16.5V, = -16.5V M na On ircuit Leakage urrent I N or I NO V OM = ±15V, V N or V NO =,, E -6 6 = 16.5V, = -16.5V M na ELETRIAL HARATERISTIS Single Supply ( = 0V, = +12V, = 0V, T A = +25, unless otherwise noted.) PARAMETER SYMBOL ONDITIONS MIN TYP MAX (Notes 2, 3) UNITS SUPPLY Supply Voltage Range V + Single supply, = 30 V Positive Supply urrent l ma INPUT Input Voltage Low V INLO V Input Voltage High V INHI 2.4 V Input urrent I IN V IN =, 0V 1 µa SWITH Analog Signal Range V OM, V NO, V N V On ircuit Resistance r ON V OM = V, I( N or NO) = 1mA, V OM = 1V, I( N or NO) = 1mA Ω On ircuit Leakage urrent I OM V OM = 11V, V N or V NO = 0V V OM = 1V, V N or V NO = 0.75 na Off ircuit Leakage urrent I N or V OM = 11V I NO V N or V NO = 1V 0.25 na DYNAMI Turn-Off Time t OFF Figure 1 45 ns Turn-On Time t ON 90 ns Break-Before-Make Time t OPEN 5 ns Off Isolation OIRR f = 1MHz, R L = 75Ω, V OM = 2.3V RMS 70 db rosstalk RR 72 db Note 2: The algebraic convention, whereby the most negative value is a minimum and the most positive is a maximum, is used in this data sheet. Note 3: Typical values are for design aid only, not guaranteed or subject to production testing. Note 4: On resistance match between channels and flatness are guaranteed only with bipolar-supply operation. 3

4 Precision, Quad, SPDT, MOS Analog Switch Typical Operating haracteristics (T A = +25, unless otherwise noted). RON (Ω) ON RESISTANE vs. V OM AND POWER SUPPLY VOLTAGE A: = 5V, = -5V B: = V, = -V : = 15V, = D: = 20V, = -20V V OM (V) A B D -01 RON (Ω) ON RESISTANE vs. V OM AND TEMPERATURE = 15V = T A = V OM (V) -02 RON (Ω) ON RESISTANE vs. V OM AND TEMPERATURE = 5V = V = 0V = 15V = 20V V OM (V) -03 RON (Ω ) ON RESISTANE vs. V OM AND SINGLE SUPPLY = 12V = 0V T A = +125 T A = +85 T A = OFF LEAKAGE OFF LEAKAGE URRENTS vs. TEMPERATURE = 16.5V = -16.5V V OM = ±15V V N OR V NO = ±15V -05 ON LEAKAGE ON LEAKAGE URRENTS vs. TEMPERATURE = 16.5V = -16.5V V OM = ±15V V N OR V NO = ±15V V OM (V) HARGE INJETION vs. V OM 75 V SUPPLY = TEMPERATURE ( ) TEMPERATURE ( ) SUPPLY URRENT vs. TEMPERATURE 0 I+ AT = +16.5V -08 Q (p) I+, I-, IL (µa) I- AT = +16.5V V OM (V) TEMPERATURE ( ) 4

5 Precision, Quad, SPDT, MOS Analog Switch Pin Description PIN NAME FUNTION 1,, 11, 20 IN1-IN4 Logic-Level Inputs 2, 9, 12, 19 NO1-NO4 Normally Open Switches 3, 8, 13, 18 OM1-OM4 ommon Switch Poles 4, 7, 14, 17 N1-N4 Normally losed Switches 5 Negative Power Supply 6 Ground 15 N.. Not Internally onnected 16 Positive Power Supply Overvoltage Protection Proper power-supply sequencing is recommended for all MOS devices. It is important not to exceed the absolute maximum ratings because stresses beyond the listed ratings may cause permanent damage to the devices. Always sequence on first, followed by VL,, and logic inputs. If power-supply sequencing is not possible, add two small signal diodes in series with the supply pins (Figure 1). Adding the diodes reduces the analog signal range to 1V below and 1V below, but low switch resistance and low leakage characteristics are unaffected. Applications Information Operation with Supply Voltages Other than ±15V o The main limitation of supply voltages other than ±15V is a reduction in the analog signal range. The operates with ±5V to ±20V bipolar supplies. The Typical Operating haracteristics and graphs show typical on resistance for ±15V, ±V, ±5 supplies. Switching times increase by a factor of two or more for ±5V operation. The can operate from +V to +24V unipolar supplies. It can be powered from a single +V to +24V supply, as well as from unbalanced supplies such as +24V and -5V. onnect to 0V when operating with a single supply. V g OM_ NO_ ( OR N_) Figure 1. Overvoltage Protection Using Blocking Diodes Test ircuits/timing Diagrams V IN V OM 3V 0V +V 0V -V t OFF t R < 20ns t F < 20ns 50% t OPEN t OFF 50% t ON 50% 50% 50% 50% LOGI INPUT +V -V N_ NO_ OM_ SWITH OUTPUT 300Ω t ON t OPEN (REPEAT TEST FOR IN2, IN3, AND IN4.) Figure 2. Switching-Time Test ircuit 5

6 Precision, Quad, SPDT, MOS Analog Switch Test ircuits/timing Diagrams APAITANE METER OM_ NO_ OR N_ 0V, 2.4V APAITANE METER OM_ NO OR N 0V, 2.4V Figure 3. hannel-off apacitance Figure 4. hannel-on apacitance LOGI INPUT SWITH OUTPUT SWITH OUTPUT +3V 0V V OM 0V V OM 0V V O2 V O1 50% t D 0.9V O t D 0.9V O LOGI INPUT V OM OM_ NO N R L2 V O2 L INLUDES FIXTURE AND STRAY APAITANE. LOGI 0 INPUT. R L1 L2 R L = 00Ω L = 35pF V O1 L1 Figure 5. Break-Before-Make R GEN OM_ N OR NO V O VO V O V GEN L nf ON OFF ON Q = ( V O )( L ) Figure 6. harge Injection 6

7 Precision, Quad, SPDT, MOS Analog Switch Test ircuits/timing Diagrams (continued) SIGNAL GENERATOR H A H B R L 0Ω OM_ N_ OR NO_ = 5pF 0V, 2.4V FREQUENY TESTED 1 MHz SIGNAL GENERATOR AUTOMATI SYNTHESIZER V OM OFF ISOLATION = 20LOG V N OR V NO TRAKING SPETRUM Figure 7. Off-Isolation SIGNAL GENERATOR OM_ N_ OR NO_ 50Ω H A H B 0V, 2.4V R L N1 OR NO1 IN1 OM1 0V, 2.4V FREQUENY TESTED 1 MHz SIGNAL GENERATOR AUTOMATI SYNTHESIZER REPEAT TESTS FOR OTHER HANNELS TRAKING SPETRUM 0Ω Figure 8. rosstalk 7

8 Precision, Quad, SPDT, MOS Analog Switch hip Topography NO3 IN3 IN2 NO2 OM3 OM2 N3 N4 OM4 N2 N1 OM " (3.53mm) NO4 IN4 IN1 NO1 0.1" (2.57mm) TRANSISTOR OUNT: 145; SUBSTRATE ONNETED TO. Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 8 Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, A (408) Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

9 ENGLISH?????????? WHAT'S NEW PRODUTS SOLUTIONS DESIGN APPNOTES SUPPORT BUY OMPANY MEMBERS Part Number Table Notes: See the QuickView Data Sheet for further information on this product family or download the full data sheet (PDF, 120kB). Other options and links for purchasing parts are listed at: Didn't Find What You Need? Ask our applications engineers. Expert assistance in finding parts, usually within one business day. Part number suffixes: T or T&R = tape and reel; + = RoHS/lead-free; # = RoHS/lead-exempt. More: See full data sheet or Part Naming onventions. * Some packages have variations, listed on the drawing. "Pkgode/Variation" tells which variation the product uses. Part Number Free Sample Buy Direct Package: TYPE PINS SIZE DRAWING ODE/VAR * Temp RoHS/Lead-Free? MJP /D eramic DIP;20 pin;.300" Dwg: A (PDF) Use pkgcode/variation: J20-2* -55 to +125 EPP+ PP PP+ EPP WP+ PDIP;20 pin;.300" Dwg: D (PDF) Use pkgcode/variation: P20+5* PDIP;20 pin;.300" Dwg: D (PDF) Use pkgcode/variation: P20-5* PDIP;20 pin;.300" Dwg: D (PDF) Use pkgcode/variation: P20+5* PDIP;20 pin;.300" Dwg: D (PDF) Use pkgcode/variation: P20-5* SOI;20 pin;.300" Use pkgcode/variation: W20+3* -40 to to +85

10 WP-T WP WP+T EWP EWP-T EWP+ EWP+T EAP+ SOI;20 pin;.300" Use pkgcode/variation: W20-3* SOI;20 pin;.300" Use pkgcode/variation: W20-3* SOI;20 pin;.300" Use pkgcode/variation: W20+3* SOI;20 pin;.300" Use pkgcode/variation: W20-3* SOI;20 pin;.300" Use pkgcode/variation: W20-3* SOI;20 pin;.300" Use pkgcode/variation: W20+3* SOI;20 pin;.300" Use pkgcode/variation: W20+3* Dwg: (PDF) Use pkgcode/variation: A20+2* -40 to to to to to +85 EAP+T -40 to +85 AP AP+T AP+ AP-T Dwg: (PDF) Use pkgcode/variation: A20-2* Dwg: (PDF) Use pkgcode/variation: A20+2* Dwg: (PDF) Use pkgcode/variation: A20+2* Dwg: (PDF) Use pkgcode/variation: A20-2* EAP-T -40 to +85 EAP UP Dwg: (PDF) Use pkgcode/variation: A20-2* Use pkgcode/variation: U20-2* -40 to +85

11 UP-T UP+T UP+ EUP+T EUP-T EUP EUP+ Use pkgcode/variation: U20-2* Use pkgcode/variation: U20+2* Use pkgcode/variation: U20+2* Use pkgcode/variation: U20+2* Use pkgcode/variation: U20-2* Use pkgcode/variation: U20-2* Use pkgcode/variation: U20+2* -40 to to to to +85 Didn't Find What You Need? ONTAT US: SEND US AN opyright 2007 by Maxim Integrated Products, Dallas Semiconductor Legal Notices P rivacy P olicy