MAX4737/MAX4738/ MAX Ω Quad SPST Analog Switches in UCSP. General Description. Benefits and Features. Applications

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1 General Description The MAX77/MAX78/ low-voltage, low onresistance (R ), quad single-pole/single throw (SPST) analog switches operate from a single +.8V to +5.5V supply. These devices are designed for USB. and audio switching applications. The MAX77/MAX78/ feature.5ω R (max) with.ω flatness and.ω matching between channels. These new switches feature guaranteed operation from +.8V to +5.5V and are fully specified at V and 5V. These switches offer break-before-make switching (ns) with t <8ns and t <ns at +.7V. The digital logic inputs are +.8V logic compatible with a +.7V to +.6V supply. These switches are packaged in a chip-scale package (UCSP ), significantly reducing the required PC board area. The chip occupies only a mm x mm area and has a x bump array with a bump pitch of.5mm. These switches are also available in a -pin TSSOP and a 6-pin thin QFN (mm x mm) package. Applications Battery-Operated Equipment Audio/Video-Signal Routing Low-Voltage Data-Acquisition Systems Sample-and-Hold Circuits Data-Acquisition Systems Communications Circuits Benefits and Features USB. Signal Switching ns (max) Differential Skew -db Bandwidth: >MHz Low pf On-Channel Capacitance Low R.5Ω (max) (+V Supply) Ω (max) (+5V Supply).Ω (max) R Match (+V Supply).Ω (max) R Flatness (+V Supply) <.5nA Leakage Current at +5 C High Off-Isolation: -55dB (MHz) Low Crosstalk: -8dB (MHz) Low Distortion:.% +.8V CMOS-Logic Compatible Single-Supply Operation from +.8V to +5.5V Rail-to-Rail Signal Handling UCSP is a trademark of Maxim Integrated Products, Inc. 9-6; Rev ; /6

2 Absolute Maximum Ratings (All Voltages Referenced to ), IN_...-.V to +6.V COM_, NO_, NC_ (Note )...-.V to ( +.V) Continuous Current COM_, NO_, NC_...±mA Peak Current COM_, NO_, NC_ (pulsed at ms, % duty cycle)...±ma Continuous Power Dissipation (T A = +7 C) -Pin TSSOP (derate 6.mW/ C above +7 C)...5mW 6-Bump UCSP (derate 8.mW/ C above +7 C)...659mW 6-Pin Thin QFN (derate 5mW/ C above +7 C)...mW ESD Method >kV Operating Temperature Range... - C to +85 C Junction Temperature...+5 C Storage Temperature Range C to +5 C Lead Temperature (soldering, s)...+ C Bump Temperature (soldering) Infrared (5s)...+ C Vapor Phase (6s)...+5 C Note : Signals on COM_, NO_, or NC_ exceeding or are clamped by internal diodes. Limit forward-diode current to maximum current rating. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Electrical Characteristics Single +V Supply ( = +.7V to +.6V, V IH = +.V, V IL = +.5V, T A =, unless otherwise noted. Typical values are at = +.V, T A = +5 C, unless otherwise noted.) (Notes, ) PARAMETER SYMBOL CDITIS T A MIN TYP MAX UNITS Analog Signal Range V COM_, V NO_, V NC_ V ANALOG SWITCH On-Resistance (Note 5) R =.7V, I COM_ = ma; V NO_ or V NC_ =.5V +5 C..5 5 Ω On-Resistance Match Between Channels (Notes 5, 6) R =.7V, I COM_ = ma; V NO_ or V NC_ =.5V +5 C...5 Ω On-Resistance Flatness (Note 7) R FLAT() =.7V, I COM_ = ma; V NO_ or V NC_ =.V,.5V,.V +5 C.6..5 Ω NO_, NC_ Off-Leakage Current (Note 8) I NO_(), I NC_() =.6V, V COM_ =.V,.V; V NO_ or V NC_ =.V,.V +5 C na COM_ Off-Leakage Current (Note 8) I COM_( ) =.6V, V COM_ =.V,.V; V NO_ or V NC_ =.V,.V +5 C na COM_ On-Leakage Current (Note 8) I COM_() =.6V, V COM_ =.V,.V; V NO_ or V NC_ =.V,.V, or floating +5 C na Maxim Integrated

3 Electrical Characteristics Single +V Supply (continued) ( = +.7V to +.6V, V IH = +.V, V IL = +.5V, T A =, unless otherwise noted. Typical values are at = +.V, T A = +5 C, unless otherwise noted.) (Notes, ) PARAMETER SYMBOL CDITIS T A MIN TYP MAX UNITS DYNAMIC CHARACTERISTICS Turn-On Time t V NO_, V NC_ =.5V; R L = Ω, C L = 5pF, Figure Turn-Off Time t V NO_, V NC_ =.5V; R L = Ω, C L = 5pF, Figure Break-Before-Make Time Delay ( Only) (Note 8) t BBM V NO_, V NC_ =.5V; R L = Ω, C L = 5pF, Figure Skew (Note 8) t SKEW R S = 9Ω, C L = 5pF, Figure Charge Injection Off-Isolation (Note 9) Crosstalk (Note ) On-Channel -db Bandwidth Q V ISO V CT BW V GEN = V, R GEN = Ω, C L =.nf, Figure f = MHz; V NO_, V NC_ = V P-P ; R L = 5Ω, C L = 5pF, Figure 5a f = MHz; V NO_, V NC_ = V P-P ; R L = 5Ω, C L = 5pF, Figure 5a f = MHz; V NO_, V NC_ = V P-P ; R L = 5Ω, C L = 5pF, Figure 5b f = MHz; V NO_, V NC_ = V P-P ; R L = 5Ω, C L = 5pF, Figure 5b Signal = dbm, C L = 5pF, 5Ω in and out, Figure 5a +5 C 8 +5 C 5 +5 C 8 ns ns ns.5 ns +5 C 5 pc +5 C +5 C db db +5 C MHz Total Harmonic Distortion THD R L = 6Ω +5 C. % NO_, NC_ Off-Capacitance C NO_(), C NC_() f = MHz, Figure 6 +5 C 9 pf Switch On-Capacitance C f = MHz, Figure 6 +5 C 5 pf DIGITAL I/O Input Logic High Voltage V IH. V Input Logic Low Voltage V IL.5 V Input Leakage Current I IN =.6V, V IN _ = or 5.5V µa Maxim Integrated

4 Electrical Characteristics Single +V Supply (continued) ( = +.7V to +.6V, V IH = +.V, V IL = +.5V, T A =, unless otherwise noted. Typical values are at = +.V, T A = +5 C, unless otherwise noted.) (Notes, ) SUPPLY PARAMETER SYMBOL CDITIS TA MIN TYP MAX UNITS Supply Voltage Range Positive Supply Current I+ = 5.5V, V IN _ = V or V µa Electrical Characteristics Single +5V Supply ( = +.V to +5.5V, V IH = +.V, V IL = +.8V, T A =, unless otherwise noted. Typical values are at = +5.V, T A = +5 C, unless otherwise noted.) (Notes, ) PARAMETER SYMBOL CDITIS TA MIN TYP MAX UNITS Analog Signal Range ANALOG SWITCH V COM_, V NO_, V NC_ V On-Resistance (Note 5) R =.V; I COM_ = ma; V NO_ or V NC_ =.5V On-Resistance Match Between Channels (Notes 5, 6) R =.V; I COM_ = ma; V NO_ or V NC_ =.5V On-Resistance Flatness (Note 7) R FLAT() =.V; I COM_ = ma; V NO_ or V NC_ =.V,.V,.5V NO_, NC_ Off-Leakage Current (Note 8) COM_ Off-Leakage Current (Note 8) COM_ On-Leakage Current (Note 8) DYNAMIC CHARACTERISTICS I NO_(), I NC_() I COM_ () I COM_() = 5.5V; V COM_ =.V,.5V; V NO_ or V NC_ =.5V,.V = 5.5V; V COM_ = V,.5V; V NO_ or V NC_ =.5V, V = 5.5V; V COM_ =.V,.5V; V NO_ or V NC_ =.V,.5V, or floating Turn-On Time t V NO_, V NC_ =.V; R L = Ω, C L = 5pF, Figure Turn-Off Time t V NO_, V NC_ =.V; R L = Ω, C L = 5pF, Figure +5 C C C C C C C 8 +5 C 5 Ω Ω Ω na na na ns ns Maxim Integrated

5 Electrical Characteristics Single +5V Supply (continued) ( = +.V to +5.5V, V IH = +.V, V IL = +.8V, T A =, unless otherwise noted. Typical values are at = +5.V, T A = +5 C, unless otherwise noted.) (Notes, ) PARAMETER SYMBOL CDITIS TA MIN TYP MAX UNITS Break-Before-Make Time Delay ( Only) (Note 8) t BBM V NO_, V NC_ =.V; R L = Ω, C L = 5pF, Figure Skew (Note 8) t SKEW R S = 9Ω, C L = 5pF, Figure DIGITAL I/O +5 C 8 Note : UCSP parts are % tested at +5 C only, and guaranteed by design over the specified temperature range. TSSOP and thin QFN parts are % tested at and guaranteed by design over the specified temperature range. Note : The algebraic convention used in this data sheet is where the most negative value is a minimum and the most positive value is a maximum. Note 5: Guaranteed by design for UCSP and thin QFN parts. Note 6: ΔR = R (MAX) - R (MIN). Note 7: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges. Note 8: Guaranteed by design. Note 9: Off-Isolation = log (V COM / V NO ), V COM = output, V NO = input to off switch. Note : Between any two switches. ns.5 ns Input Logic High Voltage V IH. V Input Logic Low Voltage V IL.8 V Input Leakage Current I IN = 5.5V, V IN_ = V or POWER SUPPLY Power-Supply Range Positive Supply Current I+ = 5.5V, V IN_ = V or µa V µa Maxim Integrated 5

6 Typical Operating Characteristics (T A = +5 C, unless otherwise noted.) 8 -RESISTANCE vs. V COM =.8V MAX77/8/9 toc 6 5 = V -RESISTANCE vs. V COM MAX77/8/9 toc 5 = 5V -RESISTANCE vs. V COM MAX77/8/9 toc R (Ω) 6 =.5V = V =.V R (Ω) T A = +5 C T A = +85 C R (Ω) T A = +5 C T A = +85 C = 5V 5 V COM (V) T A = - C V COM (V) T A = - C 5 V COM (V) LEAKAGE CURRENT (pa) LEAKAGE CURRENT vs. TEMPERATURE 5 = V COM -LEAKAGE COM -LEAKAGE MAX77/8/9 toca LEAKAGE CURRENT (pa) LEAKAGE CURRENT vs. TEMPERATURE = 5V 8 6 COM -LEAKAGE COM -LEAKAGE MAX77/8/9 tocb CHARGE INJECTI (pc) 5 CHARGE INJECTI vs. V COM C L = nf = V C L = nf = 5V MAX77/8/9 toc TEMPERATURE ( C) TEMPERATURE ( C) 5 V COM (V) SUPPLY CURRENT (na) 6 5 SUPPLY CURRENT vs. TEMPERATURE = 5V = V MAX77/8/9 toc6 SUPPLY CURRENT (µa) 8 6 SUPPLY CURRENT vs. LOGIC LEVEL = 5V = V MAX77/8/9 toc7 t/t (ns) 8 6 TURN-/ TIME vs. SUPPLY VOLTAGE t t MAX77/8/9 toc TEMPERATURE ( C) 5 LOGIC LEVEL (V) SUPPLY VOLTAGE (V) Maxim Integrated 6

7 Typical Operating Characteristics (continued) (T A = +5 C, unless otherwise noted.) t/t (ns) 6 5 TURN-/ TIME vs. TEMPERATURE t, =.V t, = 5.V t, = 5.V t, =.V MAX77/8/9 toc9 OUTPUT RISE/FALL-TIME DELAY (ps) RISE/FALL-TIME DELAY vs. SUPPLY VOLTAGE RISE/FALL TIME = 5ns FIGURE, C L = 5pF RISE DELAY FALL DELAY MAX77/8/9 toc OUTPUT RISE/FALL-TIME DELAY (ns) RISE/FALL-TIME DELAY vs. TEMPERATURE RISE/FALL TIME = 5ns FIGURE, C L = 5pF =.V RISE DELAY FALL DELAY MAX77/8/9 toc TEMPERATURE ( C) SUPPLY VOLTAGE (V) TEMPERATURE ( C) RISE TIME TO FALL TIME MISMATCH vs. SUPPLY VOLTAGE RISE/FALL TIME = 5ns FIGURE, C L = 5pF MAX77/8/9 toc 5 RISE TIME TO FALL TIME MISMATCH vs. TEMPERATURE RISE/FALL TIME = 5ns FIGURE, C L = 5pF =.V MAX77/8/9 toc SKEW vs. SUPPLY VOLTAGE RISE/FALL TIME = 5ns FIGURE, C L = 5pF MAX77/8/9 toc MISMATCH (ps) MISMATCH (ps) SKEW (ps) SUPPLY VOLTAGE (V) TEMPERATURE ( C) SUPPLY VOLTAGE (V) SKEW (ps) 5 SKEW vs. TEMPERATURE RISE/FALL TIME = 5ns FIGURE, C L = 5pF =.V MAX77/8/9 toc5 -LOSS (db) FREQUENCY RESPSE = V/5V -LOSS -ISOLATI MAX77/8/9 toc CROSSTALK TEMPERATURE ( C) -.. FREQUENCY (MHz) Maxim Integrated 7

8 Typical Operating Characteristics (continued) (T A = +5 C, unless otherwise noted.) THD (%). TOTAL HARMIC DISTORTI vs. FREQUENCY = V R L = 6Ω MAX77/8/9 toc7 LOGIC THRESHOLD (V) LOGIC THRESHOLD vs. SUPPLY VOLTAGE..6 V TH+. V TH-.8 MAX77/8/9 toc8.. k k k FREQUENCY (Hz) SUPPLY VOLTAGE (V) Maxim Integrated 8

9 Pin Configurations/Functional Diagrams/Truth Tables TOP VIEW (BUMPS SIDE DOWN) MAX77 MAX78 A NO A NC A NO B C NO COM NO B C NC COM NC B C NC COM NC IN_ LOW HIGH NO_ NC_ D COM NO IN IN D COM NC IN IN D COM NO IN IN UCSP UCSP UCSP MAX77 MAX78 NO NC NO COM IN COM IN COM IN NO IN NC IN NC IN NO NC NC 5 COM 5 COM 5 COM NO 7 8 NC 7 8 NO TSSOP TSSOP TSSOP LOW HIGH SWITCH STATE LOW HIGH SWITCH STATE LOW HIGH NO, NO NC, NC N.C. NO IN COM IN NO MAX77 NO COM NO N.C. N.C. NC IN 6 5 COM IN NC MAX78 NC COM NC N.C. N.C. NO IN COM IN NC NC COM NO N.C. QFN QFN QFN LOW HIGH SWITCH STATE LOW HIGH SWITCH STATE LOW HIGH NO, NO NC, NC Maxim Integrated 9

10 Pin Descriptions PIN MAX77 MAX78 UCSP TSSOP THIN QFN UCSP TSSOP THIN QFN UCSP TSSOP THIN QFN NAME D 5 D 5 NO D 5 NC FUNCTI Analog-Switch Normally Open Terminal Analog-Switch Normally Closed Terminal D D D COM Analog-Switch Common Terminal C NO C C NC Analog-Switch Normally Open Terminal Analog-Switch Normally Closed Terminal B B B Analog-Switch Common Terminal A 5 A 5 A 5 Logic-Control Digital Input A 6 5 A 6 5 A 6 5 Logic-Control Digital Input B 7 6 B 7 6 B 7 6 Ground. Connect to digital ground. A 8 7 A 8 7 NO A 8 7 NC Analog-Switch Normally Open Terminal Analog-Switch Normally Closed Terminal A 9 9 A 9 9 A 9 9 Analog-Switch Common Terminal B B B COM Analog-Switch Common Terminal Maxim Integrated

11 Detailed Description The MAX77/MAX78/ quad SPST analog switches operate from a single +.8V to +5.5V supply. The MAX77/MAX78/ offer excellent AC characteristics, <.5nA leakage current, less than ns differential skew, and 5pF on-channel capacitance. All of these devices are CMOS-logic compatible with to signal handling capability. The MAX77/MAX78/ are USB-complaint switches that provide.5ω (max) on-resistance and 5pF on-channel capacitance to maintain signal integrity. At Mbps (USB full-speed data rate specification), the MAX77/MAX78/ introduce less than ns propagation delay between input and output signals and less than.5ns change in skew for the output signals (see Figure ). The MAX77 has four normally open (NO) switches, the MAX78 has four normally closed (NC) switches, and the has two NO switches and two NC switches. Applications Information Digital Control Inputs The MAX77/MAX78/ logic inputs accept up to +5.5V regardless of supply voltage. For example, with a +.V supply, IN_ can be driven low to and high to +5.5V allowing for mixing of logic levels in a system. Driving the control logic inputs rail-to-rail minimizes power consumption. For a +.8V supply voltage, the logic thresholds are.5v (low) and.v (high); for a +5V supply voltage, the logic thresholds are.8v (low) and.v (high). Analog Signal Levels Analog signals that range over the entire supply voltage ( to ) are passed with very little change in onresistance (see Typical Operating Characteristics). The switches are bidirectional, so the NO_, NC_, and COM_ pins can be either inputs or outputs. Power-Supply Bypassing Power-supply bypassing improves noise margin and prevents switching noise from propagating from the supply to other components. A.μF capacitor connected from to is adequate for most applications. UCSP Applications Information For the latest application details on UCSP construction, dimensions, tape carrier information, PC board techniques, bump-pad layout, and recommended reflow temperature profile, as well as the latest information on reliability testing results, refer to the Application Note: UCSP A Wafer-Level Chip-Scale Package on Maxim s web site at Maxim Integrated

12 Test Circuits/Timing Diagrams MAX77 MAX78 V LOGIC IH NO_ COM_ V IL V N_ V OUT OR NC_ 5% R L C L t LOGIC IN_ SWITCH OUTPUT V V OUT t.9 x V UT.9 x V OUT C L INCLUDES FIXTURE AND STRAY CAPACITANCE. R V OUT = V COM ( L R L - R ) LOGIC WAVEFORMS INVERTED FOR SWITCHES THAT HAVE THE OPPOSITE LOGIC SENSE. Figure. Switching Time V COM V COM NO_ NC_ V OUT R L V OUT CL LOGIC V IH V IL 5% LOGIC IN_ R L C L C L INCLUDES FIXTURE AND STRAY CAPACITANCE. SWITCH OUTPUT (V OUT ) SWITCH OUTPUT (V OUT ) V V t D.9 x V UT t D.9 x V OUT Figure. Break-Before-Make Interval Maxim Integrated

13 Test Circuits/Timing Diagrams (continued) t ri 9% TxD+ R s A B C L A A- % 9% 5% 5% t skew_i % t fi t ro 9% TxD- R s = 9Ω C L = 5pF R s A- B- C L OUTPUT B OUTPUT B- % 9% 5% 5% t skew_o % t fo t ro - t ri t fo - t fi DELAY DUE TO SWITCH FOR RISING AND RISING OUTPUT SIGNALS. DELAY DUE TO SWITCH FOR FALLING AND FALLING OUTPUT SIGNALS. t skew_o CHANGE IN SKEW THROUGH THE SWITCH FOR OUTPUT SIGNALS. t skew_i CHANGE IN SKEW THROUGH THE SWITCH FOR SIGNALS. Figure. Input/Output Skew Timing Diagram Maxim Integrated

14 Test Circuits/Timing Diagrams (continued) MAX77 MAX78 V GEN R GEN NC_ OR NO_ IN_ COM_ C L V OUT V OUT IN V OUT V IL TO V IH IN Q = ( V OUT )(C L ) LOGIC WAVEFORMS INVERTED FOR SWITCHES THAT HAVE THE OPPOSITE LOGIC SENSE. Figure. Charge Injection SIGNAL GENERATOR dbm C =.µf NC_ or NO_ 5Ω* MAX77 MAX78 IN_ V OR SIGNAL GENERATOR dbm V TO C =.µf COM IN MAX77 MAX78 NO 5Ω V OR ANALYZER COM_ ANALYZER NO N.C. *USED LY FOR -ISOLATI TEST. Figure 5a. On-Loss and Off-Isolation Figure 5b. Crosstalk Test Circuit C =.µf CAPACITANCE METER f = MHz NC_ or NO_ COM_ MAX77 MAX78 IN_ V OR Figure 6. Channel Off-/On-Capacitance Maxim Integrated

15 Ordering Information PART TEMP RANGE PIN/BUMP- PACKAGE TOP MARK MAX77EUD - C to +85 C TSSOP MAX77ETE - C to +85 C 6 Thin QFN MAX77EBE+T - C to +85 C 6 UCSP-6 77 MAX78EUD - C to +85 C TSSOP MAX78ETE - C to +85 C 6 Thin QFN MAX78EBE+T - C to +85 C 6 UCSP-6 78 EUD - C to +85 C TSSOP ETE - C to +85 C 6 Thin QFN EBE+T - C to +85 C 6 UCSP Denotes a lead(pb)-free/rohs-compliant package. Package Information For the latest package outline information and land patterns (footprints), go to Note that a +, #, or - in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO. TSSOP U QFN T UCSP B6+ - Chip Information TRANSISTOR COUNT: 6 PROCESS: CMOS Maxim Integrated 5

16 Revision History REVISI NUMBER REVISI DATE DESCRIPTI PAGES CHANGED /6 Pb-free part numbers updated For pricing, delivery, and ordering information, please contact Maxim Direct at , or visit Maxim Integrated s website at Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. 6 Maxim Integrated Products, Inc. 6