50Ω, Low-Voltage, Quad SPST/Dual SPDT Analog Switches in WLP

Transcription

1 9-266; Rev 3; /2 5Ω, Low-Voltage, Quad SPST/Dual SPDT Analog General Description The low-voltage, quad single-pole single-throw (SPST)/dual single-pole/double-throw (SPDT) analog switches operate from a single +2V to +V supply and handle rail-to-rail analog signals. These switches exhibit low leakage current (.na) and consume less than.5nw (typ) of quiescent power, making them ideal for battery-powered applications. When powered from a +3V supply, these switches feature 5Ω (max) on-resistance (R ), with 3.5Ω (max) matching between channels and 9Ω (max) flatness over the specified signal range. The MAX77 has four normally open (NO) switches, the MAX78 has four normally closed (NC) switches, and the MAX79 has two NO and two NC switches. The MAX75 has two SPDT switches. These switches are available in -pin TSSOP, 6-pin TQFN (mm x mm), and 6-bump WLP packages. This tiny chip-scale package occupies a 2mm 2mm area and significantly reduces the required PC board area. Applications Battery-Powered Systems Audio/Video-Signal Routing Low-Voltage Data-Acquisition Systems Cell Phones Communications Circuits Glucose Meters PDAs Features 2mm 2mm WLP Guaranteed On-Resistance (R ) 25Ω (max) at +5V 5Ω (max) at +3V On-Resistance Matching 3Ω (max) at +5V 3.5Ω (max) at +3V Guaranteed <.na Leakage Current at T A = +25 C Single-Supply Operation from +2.V to +V TTL/CMOS-Logic Compatible -8dB Crosstalk (MHz) -72dB Off-Isolation (MHz) Low Power Consumption:.5nW (typ) Rail-to-Rail Signal Handling PART Ordering Information TEMP RANGE PIN-/BUMP- PACKAGE MAX77EUD+ - C to +85 C TSSOP MAX77ETE+ - C to +85 C 6 Thin QFN-EP* MAX77EWE+T - C to +85 C 6 WLP *EP = Exposed pad. +Denotes a lead(pb)-free/rohs-compliant package. T = Tape and reel. Ordering Information continued at end of data sheet. Pin/Bump Configurations/Truth Tables NO IN (BUMPS SIDE DOWN) MAX COM IN NO + MAX77 A COM NO2 COM2 IN2 NO2 COM2 IN2 2 3 MAX77ETE *EP 9 NO COM COM3 COM NO2 COM2 IN IN IN NO COM B C NO IN3 IN NO IN COM3 NO3 D IN NO COM COM3 IN3 *CNECT EP TO NO3 TQFN LOW HIGH TSSOP WLP SWITCH STATE Pin Configurations/Truth Tables continued at end of data sheet. Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at , or visit Maxim s website at

2 ABSOLUTE MAXIMUM RATINGS (All voltages referenced to.)...-.3v to +2V, COM_, NO_, NC_ (Note )...-.3V to ( +.3V) Continuous Current (any pin)...±ma Peak Current (any pin, pulsed at ms, % duty cycle)...±2ma Continuous Power Dissipation (T A = +7 C) -Pin TSSOP (derate 9.mW/ C above +7 C)...727mW 6-Pin Thin QFN (derate 6.9mW/ C above +7 C)...39mW 6-Bump WLP (derate 7.3mW/ C above +7 C)...589mW Note : Signals on, NO_, NC_, or COM_ exceeding or are clamped by internal diodes. Limit forward-diode current to maximum current rating. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS Single +3V Supply Operating Temperature Range...- C to +85 C Storage Temperature Range C to +5 C Maximum Junction Temperature...+5 C Bump Temperature (soldering) Infrared (5s) C Vapor Phase (6s) C Lead Temperature (soldering, s)...+3 C Soldering Temperature (reflow) C ( = +3V ±%, V IH = +2.V, V IL = +.8V, T A =, unless otherwise noted. Typical values are at = +3V, T A = +25 C.) (Notes 3, ) ANALOG SWITCH PARAMETER SYMBOL CDITIS T A MIN TYP MAX UNITS Analog Signal Range V COM_, V NO_, V NC_ V On-Resistance R = +2.7V, I COM_ = 5mA, V NO_ or V NC_ = +.5V On-Resistance Matching Between Channels (Notes 5, 6) On-Resistance Flatness (Note 7) NO_ or NC_ Off-Leakage Current COM_ Off-Leakage Current R R FLAT() I NO_(), I NC_() I COM_() = +2.7V, I COM_ = 5mA, V NO_ or V NC_ = +.5V = +2.7V, I COM_ = 5mA, V NO_ or V NC_ = +V, +.5V, +2V = +3.6V, V COM_ = +.3V, +3V, V NO_ or V NC_ = +3V, +.3V = +3.6V, V COM_ = +.3V, +3V, V NO_ or V NC_ = +3V, +.3V +25 C C C C C Ω Ω Ω na na COM_ On-Leakage Current I COM_() = +3.6V, V COM_ = +.3V, +3.V, V NO_ or V NC_ = +.3V, +3V, or unconnected +25 C na 2

3 ELECTRICAL CHARACTERISTICS Single +3V Supply (continued) ( = +3V ±%, V IH = +2.V, V IL = +.8V, T A =, unless otherwise noted. Typical values are at = +3V, T A = +25 C.) (Notes 3, ) DYNAMIC PARAMETER SYMBOL CDITIS T A MIN TYP MAX UNITS Turn-On Time t V NO_ or V NC_ = +.5V, R L = 3Ω, C L = 35pF, Figure 2 Turn-Off Time t V NO_ or V NC_ = +.5V, R L = 3Ω, C L = 35pF, Figure 2 Break-Before-Make (MAX79/MAX75 Only) Charge Injection t BBM Q V NO_ or V NC_ = +.5V, R L = 3Ω, C L = 35pF, Figure 3 V GE N = V, R GE N = Ω, C L =.nf, Figure +25 C C C 33 ns ns ns +25 C 7 pc On-Channel -3dB Bandwidth BW Signal = dbm, 5Ω in and out +25 C 25 MHz Off-Isolation (Note 9) V ISO f = MHz, V NO_ = V RMS, R L = 5Ω, C L = 5pF, Figure C -72 db Crosstalk (Note ) V CT f = MHz, V NO_ = V RMS, R L = 5Ω, C L = 5pF, Figure C 8 db NO_ or NC_ Off-Capacitance C f = MHz, Figure C 2 pf COM_ Off-Capacitance C COM_() f = MHz, Figure C 2 pf COM_ On-Capacitance C COM_() f = MHz, Figure C pf LOGIC Input Logic High V IH. V Input Logic Low V IL.8 V Input Leakage Current I IN V = V or µa POWER SUPPLY Power-Supply Range 2 V Positive Supply Current I+ = +5.5V, V = V or, all switches on or off. µa 3

4 ELECTRICAL CHARACTERISTICS Single +5V Supply ( = +5V ±%, V IH = +2.V, V IL = +.8V, T A =, unless otherwise noted. Typical values are at = +5V, T A = +25 C.) (Notes 3, ) ANALOG SWITCH PARAMETER SYMBOL CDITIS T A MIN TYP MAX UNITS Analog Signal Range V COM_, V NO_, V NC_ V On-Resistance R I COM_ = 5mA, = +.5V, V NO_ or V NC_ = +3.V On-Resistance Matching Between Channels (Notes 5, 6) On-Resistance Flatness (Notes 7) NO_ or NC_ Off-Leakage Current COM_ Off-Leakage Current R R FLAT() I NO_(), I NC_() I COM_() = +.5V, I COM_ = 5mA, V NO_ or V NC_ = +3.V = +.5V, I COM_ = 5mA, V NO_ or V NC_ = +V, +2V, +3V = +5.5V, V COM_ = +V, +.5V, V NO_ or V NC_ = +.5V, +V = +5.5V, V COM_ = +V, +.5V, V NO_ or V NC_ = +.5V, +V +25 C C C C C Ω Ω Ω na na COM_ On-Leakage Current DYNAMIC I COM_() = +5.5V, V COM_ = +V, +.5V, V NO_ or V NC_ = +V, +.5V, or unconnected Turn-On Time t R L = 3Ω, C L = 35pF, V NO_ or V NC_ = +3.V, Figure 2 Turn-Off Time t R L = 3Ω, C L = 35pF, V NO_ or V NC_ = +3.V, Figure 2 Break-Before-Make (MAX79/MAX75 Only) t BBM V NO_ or V NC_ = +3.V, R L = 3Ω, C L = 35pF, Figure C C C C na ns ns ns Charge Injection Q V GEN = V, R GEN = Ω, C L =.nf, Figure +25 C 9 pc On-Channel -3dB Bandwidth BW Signal = dbm, 5Ω in and out +25 C 25 MHz Off-Isolation (Note 9) V ISO f = MHz, V NO_ = V RMS, R L = 5Ω, C L = 5pF, Figure C -72 db

5 ELECTRICAL CHARACTERISTICS Single +5V Supply (continued) ( = +5V ±%, V IH = +2.V, V IL = +.8V, T A =, unless otherwise noted. Typical values are at = +5V, T A = +25 C.) (Notes 3, ) PARAMETER SYMBOL CDITIS T A MIN TYP MAX UNITS Crosstalk (Note ) V CT f = MHz, V NO_ = V RMS, R L = 5Ω, C L = 5pF, Figure C -8 db NO_ or NC_ Off-Capacitance C f = MHz, Figure C 2 pf COM_ Off-Capacitance C COM_() f = MHz, Figure C 2 pf COM_ On-Capacitance C COM_() f = MHz, Figure C pf LOGIC Input Logic High V IH 2 V Input Logic Low V IL.8 V Input Leakage Current I IN V = V or µa POWER SUPPLY Power-Supply Range 2 V Positive Supply Current I+ = +5.5V, V = V or, all switches on or off. µa Note 3: The algebraic convention, where the most negative value is a minimum and the most positive value a maximum, is used in this data sheet. Note : WLP parts are % tested at +25 C only, and are guaranteed by design over temperature. TSSOP and Thin QFN parts are % tested at +85 C and guaranteed by design over temperature. Note 5: R = R (MAX) - R (MIN). Note 6: WLP and Thin QFN on-resistance matching between channels is guaranteed by design. Note 7: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal range. Note 8: Guaranteed by design. Note 9: Off-isolation = 2 log (V NO_ /V COM_ ), V NO_ = output, V COM_ = input to off switch. Note : Between any two switches. (T A = +25 C, unless otherwise noted.) Typical Operating Characteristics R (Ω) RESISTANCE vs. V COM = 2V = 3V = 5V = V MAX77 5-toc R (Ω) RESISTANCE vs. V COM = 5V T A = +85 C T A = +25 C T A = - C MAX77 5-toc2 R (Ω) RESISTANCE vs. V COM = 3V T T A = +85 C A = +25 C T A = - C MAX77 5-toc V COM (V) V COM (V) V COM (V) 5

6 (T A = +25 C, unless otherwise noted.) R (Ω) -RESISTANCE vs. V COM 3 = 2.5V T A = +25 C 25 T A = +85 C 2 5 T A = - C V COM (V) MAX77 5-toc SUPPLY CURRENT (pa), Typical Operating Characteristics (continued) SUPPLY CURRENT vs. TEMPERATURE = 3V, 5V TEMPERATURE ( C) MAX77 5-toc5 LEAKAGE CURRENT (pa).. LEAKAGE vs. TEMPERATURE = 5V, V COM =.5V, NO_ or NC_ = UNCNECTED TEMPERATURE ( C) MAX77 5-toc6 LOGIC THRESHOLD (V) IN LOGIC THRESHOLD vs. SUPPLY VOLTAGE V NO_ = SUPPLY VOLTAGE (V) MAX77 5-toc7 GAIN (db)/phase (DEGREES) FREQUENCY RESPSE - ISOLATI LOSS CROSSTALK PHASE -.. FREQUENCY (MHz) MAX77 5-toc8 CHARGE (pc) CHARGE INJECTI vs. V COM = V = 5V = 3V V COM (V) MAX77 5-toc9 TURN-/ TIME (ns) t, = 3V TURN-/ TIME vs. TEMPERATURE t, = 5V t, = 3V t, = 5V MAX77 5-toc TURN-/ TIME (ns) V NO = /2 t TURN-/ TIME vs. SUPPLY VOLTAGE t MAX77 5-toc THD (%).. TOTAL HARMIC DISTORTI vs. FREQUENCY SOURCE AND LOAD = 6Ω V COM = 2V P-P = 3V = 5V MAX77-5 toc TEMPERATURE ( C) SUPPLY VOLTAGE (V)... FREQUENCY (khz) 6

7 PIN MAX77 MAX78 MAX79 MAX75 NAME Pin Description TSSOP FUNCTI, 3, 8, NO NO Analog-Switch Normally Open Terminals, 3, 8, NC NC Analog-Switch Normally Closed Terminals, 8 NO, NO3 Analog-Switch Normally Open Terminals, 8 NO, NO2 Analog-Switch Normally Open Terminals, NC, NC2 Analog-Switch Normally Closed Terminals 3, NC2, NC Analog-Switch Normally Closed Terminals 2,, 9, 2,, 9, 2,, 9, COM COM Analog-Switch Common Terminal 2, 9 COM, COM2 Analog-Switch Common Terminal 3, 5, 6, 2 3, 5, 6, 2 3, 5, 6, 2 IN IN Logic-Control Digital Input 3, 6 IN, IN2 Logic-Control Digital Input Ground. Connect to digital ground. Positive Analog and Digital Supply Voltage Input. Internally connected to substrate. 3, 5,, 2 No Connection. Not internally connected. PIN MAX77 MAX78 MAX79 MAX75 NAME Bump Description WLP FUNCTI B, A2, C, D2 NO NO Analog-Switch Normally Open Terminals B, A2, C, D2 NC NC Analog-Switch Normally Closed Terminals B, C NO, NO3 Analog-Switch Normally Open Terminals B, C NO, NO2 Analog-Switch Normally Open Terminals A3, D2 NC, NC2 Analog-Switch Normally Closed Terminals A2, D2 NC2, NC Analog-Switch Normally Closed Terminals A, A3, D, D3 A, A3, D, D3 A, A3, D, D3 COM COM Analog-Switch Common Terminal A, D COM, COM2 Analog-Switch Common Terminal C, A, B, D C, A, B, D C, A, B, D IN IN Logic-Control Digital Input C, B IN, IN2 Logic-Control Digital Input C3 C3 C3 C3 Ground. Connect to digital ground. B2 B2 B2 B2 Positive Analog and Digital Supply Voltage Input. Internally connected to substrate. A2, A, D, D3 No Connection. Not internally connected. 7

8 Pin Description TQFN-EP PIN MAX77 MAX78 MAX79 MAX75 NAME FUNCTI, 3, 3, 3, 9 COM, COM2 Analog-Switch Common Terminals 2 7 NO2 Analog-Switch Normally Open Terminal, 3, 3, 3 5, 3 IN2, IN Logic-Control Digital Inputs 5, 2 5, 2 5, 2 IN3, IN Logic-Control Digital Inputs Ground. Connect to digital ground. 7 7 NO3 Analog-Switch Normally Open Terminal 8, 8, 8, 2,, 8,, 2, No Connection. Not internally connected. 9, 9, 9, COM3, COM Analog-Switch Common Terminals NO Analog-Switch Normally Open Terminal Positive Supply-Voltage Input NO Analog-Switch Normally Open Terminal 2 2 NC2 Analog-Switch Normally Closed Terminal 7 NC3 Analog-Switch Normally Closed Terminal NC Analog-Switch Normally Closed Terminal 6 3 NC Analog-Switch Normally Closed Terminal EP Exposed Pad. Connect EP to. 8

9 Applications Information Operating Considerations for High-Voltage Supply The operate to +V with some precautions. The absolute maximum rating for is +2V (referenced to ). When operating near this region, bypass with a minimum.µf capacitor to ground as close to the IC as possible. Logic Levels The are TTL compatible when powered from a single +3V supply. When powered from other supply voltages, the logic inputs should be driven rail-to-rail. For example, with a +V supply, should be driven low to V and high to V. With a +3.3V supply, should be driven low to V and high to 3.3V. Driving rail-to-rail minimizes power consumption. Analog Signal Levels Analog signals that range over the entire supply voltage ( to ) pass with very little change in R (see the Typical Operating Characteristics). The bidirectional switches allow NO_, NC_, and COM_ connections to be used as either inputs or outputs. Power-Supply Sequencing and Overvoltage Protection CAUTI: Do not exceed the absolute maximum ratings. Stresses beyond the listed ratings can cause permanent damage to the devices. Proper power-supply sequencing is recommended for all CMOS devices. Always apply before applying analog signals, especially if the analog signal is not current limited. If this sequencing is not possible, and if the analog inputs are not current limited to < 2mA, add small-signal diode D as shown in Figure. If the analog signal can dip below, add D2. Adding protection diodes reduces the analog signal range to a diode drop (about.7v) below (for D), and to a diode drop above ground (for D2). Leakage is unaffected by adding the diodes. On-resistance increases slightly at low supply voltages. Maximum supply voltage () must not exceed +V. Test Circuits/Timing Diagrams EXTERNAL BLOCKING DIODE NO_ * * EXTERNAL BLOCKING DIODE D D2 COM_ MAX77 MAX75 *INTERNAL PROTECTI DIODES Figure. Overvoltage Protection Using External Blocking Diodes Adding protection diodes causes the logic thresholds to be shifted relative to the power-supply rails. The most significant shift occurs when using low supply voltages (+5V or less). With a +5V supply, TTL compatibility is not guaranteed when protection diodes are added. Driving and all the way to the supply rails (i.e., to a diode drop higher than the pin, or to a diode drop lower than the pin) is always acceptable. Protection diodes D and D2 also protect against some overvoltage situations. Using the circuit in Figure, no damage results if the supply voltage is below the absolute maximum rating (+2V) and if a fault voltage up to the absolute maximum rating ( +.3V) is applied to an analog signal terminal. WLP Applications Information For the latest application details on WLP construction, dimensions, tape carrier information, PC board techniques, bump-pad layout, and recommended reflow temperature profile, as well as the latest information on reliability testing results, refer to the Application Note 89: Wafer-Level Packaging (WLP) and its Applications on Maxim s web site at * * 9

10 MAX77 MAX75 LOGIC V N_ NO_ OR NC_ Figure 2. Switching Time R L 3Ω C L INCLUDES FIXTURE AND STRAY CAPACITANCE. R L V OUT = V N_ ( R ) L + R COM_ Test Circuits/Timing Diagrams (continued) V OUT C L 35pF LOGIC SWITCH OUTPUT V IH V IL 5% V OUT t t t r < 5ns t f < 5ns.9 x V OUT.9 x V OUT LOGIC WAVEFORMS INVERTED FOR SWITCHES THAT HAVE THE OPPOSITE LOGIC SENSE. MAX79 V N_ NO_ COM_ V OUT LOGIC V IH V IL 5% t r < 5ns t f < 5ns LOGIC NC_ COM_ R L2 3Ω V OUT2 C L2 35pF R L 3Ω C L 35pF SWITCH OUTPUT (V OUT ) SWITCH OUTPUT 2 (V OUT2 ) t BBM.9 x V UT t BBM.9 x V OUT2 C L INCLUDES FIXTURE AND STRAY CAPACITANCE. Figure 3. Break-Before-Make Interval MAX77 MAX75 V OUT V OUT V GEN R GEN NC_ OR NO_ COM C L nf V OUT IN V IL TO V IH IN Q = ( V OUT )(C L ) IN DEPENDS SWITCH CFIGURATI; POLARITY DETERMINED BY SENSE OF SWITCH. Figure. Charge Injection

11 SIGNAL GENERATOR dbm ANALYZER R L nf COM_ NC_ OR NO_ nf MAX77 MAX75 V IL OR V IH V- DUAL SUPPLIES USED TO ACCOMMODATE GROUND-REFERENCED INSTRUMENTS. Figure 5. Off-Isolation/On-Channel Bandwidth Test Circuits/Timing Diagrams (continued) SIGNAL GENERATOR dbm ANALYZER OR 2.V R L nf COM_ NO_/NC_ nf V- NO_/NC_ COM_ MAX77 MAX75 5Ω OR 2.V DUAL SUPPLIES USED TO ACCOMMODATE GROUND-REFERENCED INSTRUMENTS. Figure 6. Crosstalk Ordering Information (continued) CAPACITANCE METER f = MHz nf COM_ NC_ OR NO_ MAX77 MAX75 V IL OR V IH PART TEMP RANGE PIN-/BUMP- PACKAGE MAX78EUD+ - C to +85 C TSSOP MAX78ETE+ - C to +85 C 6 Thin QFN-EP* MAX78EWE+T - C to +85 C 6 WLP MAX79EUD+ - C to +85 C TSSOP MAX79ETE+ - C to +85 C 6 Thin QFN-EP* MAX79EWE+T** - C to +85 C 6 WLP MAX75EUD+ - C to +85 C TSSOP MAX75ETE+ - C to +85 C 6 Thin QFN-EP* MAX75EWE+T** - C to +85 C 6 WLP Figure 7. Channel Off-/On-Capacitance *EP = Exposed pad. +Denotes a lead(pb)-free/rohs-compliant package. **Future products. Contact factory for availability. T = Tape and reel.

12 COM NC2 COM2 IN2 COM NC2 COM2 IN NC IN IN3 MAX78ETE NC3 TQFN *CNECT EP TO NO MAX79ETE *EP IN *EP Pin/Bump Configurations/Truth Tables (continued) IN NO COM COM3 IN NC COM COM3 + NC COM 2 NC2 3 COM2 IN2 5 IN3 6 7 LOW HIGH + NO COM 2 NC2 3 COM2 IN2 5 IN3 6 7 MAX78 TSSOP SWITCH STATE MAX79 (BUMPS SIDE DOWN) 3 IN 2 IN NC COM 9 COM3 8 NC3 (BUMPS SIDE DOWN) 3 IN 2 IN NC COM 9 COM3 8 NO3 A B C D A B C D COM COM MAX NC2 COM2 IN2 NC IN3 IN NC3 IN NC COM COM3 WLP MAX NC2 COM2 IN2 NO IN3 IN NO3 IN NC COM COM3 IN3 NO3 TQFN *CNECT EP TO LOW HIGH TSSOP NO, NO3 NC2, NC WLP MAX78 NO IN (BUMPS SIDE DOWN) MAX COM NO + MAX75 A COM NC NC 2 3 MAX75ETE *EP 9 NC2 COM2 COM NC IN NC2 B C NO IN2 IN NO IN COM2 NO2 D NC2 COM2 IN2 NO2 TQFN *CNECT EP TO LOW HIGH TSSOP NO, NO2 NC, NC2 WLP 2

13 PROCESS: CMOS Chip Information Package Information For the latest package outline information and land patterns (footprints), go to Note that a +, #, or - in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO. TSSOP U TQFN T WLP W62D Refer to Application Note 89 3

14 REVISI NUMBER REVISI DATE DESCRIPTI Revision History PAGES CHANGED 2 2/6 Various changes -5 3 /2 Updated UCSP to WLP packaging, corrected pin configuration, added lead-free packaging -9, -3 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. Maxim Integrated Products, 2 San Gabriel Drive, Sunnyvale, CA Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.