Application Fields. Portable Electronics (PC, PDA, Wireless) IC Cost (Packaging and Cooling) Reliability (Electromigration, Latchup)

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4 Application Fields Portable Electronics (PC, PDA, Wireless) IC Cost (Packaging and Cooling) Reliability (Electromigration, Latchup) Signal Integrity (Switching Noise, DC Voltage Drop) Thermal Design Ultra-low-power applications Space missions (miniaturized satellites) Arun N. Chandorkar, IIT Bombay

5 Different Constraints for Different Application Fields Portable devices: Battery life-time Telecom and military: Reliability (reduced power decreases electromigration, hence increases reliability) High volume products: Unit cost (reduced power decreases packaging cost) Arun N. Chandorkar, IIT Bombay

6 Is Transistor a Good Switch? I=0 I 0 On I = 1ma/u I= I=0 I 0 Off I=0 I 0 Sub-threshold Leakage

7 MOSFET Scaling Problem: Saturation of IDsat Constant OFF current Limit 5 I Dsat (A/m) 4 (drive current) 600 NMOS PMOS Supply Voltage (V) Drive Current (ma/µm) Relaxed OFF current Limit Source: Intel Channel Length (µm) 0 log Id Low Vt High Vt IOFF,low Vt Data 2005 from IBM, TI, Intel, AMD, Motorola and Lucent Low 0 1 IOFF,hig Vg h Vt OFF current desirable Changhoon Choi, PhD Thesis, Stanford Univ., 2002

8 Leakage Power Leakage Power (% of Total) 50% Must stop at 50% 40% 30% 20% 10% 0% Technology (µ ) A. Grove, IEDM 2002 Leakage power limits Vt scaling INTEL

9 The limit is deferent depending on application 100 Operation Frequency (a.u.) e) 10 1 Subthreshold Leakage (A/µµ) Source: 2007 ITRS Winter Public Conf.

10 Gate Oxide is Near Limit CoSi2 130nm Transistor Si3N4 70 nm Poly Si Gate Electrode 1.5 nm Gate Oxide Si Substrate Will high K happen? Would you count on it? INTEL

11 Microprocessors Trend expected in 2001 Power Increase Heat generation Past: 1972 (Intel) Today: 2002 (Intel) 2008 (Intel) Lg sub-25 nm Lg sub-70 nm Lg 10,000 nm Tox 0.7 nm Tox 1.4 nm Tox 1200 nm f GHz f 2.53 GHz P a few 100 mw P several 10 W N 2.25k N 50 M Heat Generation f 30 GHz increase Cause Tr. Number increase Clock Frequency increase P 10 kw N 1.8B MIPS 1M MIPS (TIPS) W/cm2 Hot Plate Solution: W/cm2 Surface of Nuclear Reactor 1000W/cm2 Rocket Nozzle 10000W/cm2 Sun Surface Low supply Voltage P. P. Gelsinger, Microprocessor for the New Millennium: Challenges, Opportunities, and New Frontiers, Dig. Tech ISSCC, San Francisco, pp.22-23, February, 2001

12 VT Distribution 0.18 micron ~1000 samples 120 # of Chips ~30mV VTn(mv) INTEL High Freq High Isb Low Freq Low Isb High Freq Medium Isb

13 Probability Impact on Path Delays Path Delay Delay Path delay variability due to variations in Vdd, Vt, and Temp Impacts individual circuit performance and power Objective: full chip performance, power, and yield Multivariable optimization of individual circuit Vdd, Vt, size Optimize each circuit for full chip objectives

14 Towards the end of the (ITRS) Roadmap Feature sizes approach single-digit nanometers Physical and economic limits to scaling Red Brick Wall! New Technologies Chemically Assembled Electronic Nanotech. (CAEN) Extreme Ultraviolet (EUV) Lithography

15 Qi Xinag, ECS 2004, AMD

16 Scaling limit? Channel length? 10 nm Electron wave length Gate Oxd Channel Hiroshi Iwai

17 5 nm gate length CMOS Is a Real Nano Device!! 5 nm Length of 18 Si atoms H. Wakabayashi et.al, NEC IEDM, 2003 Hiroshi Iwai

18 Prediction now! Electron wave length 10 nm Tunneling distance 3 nm Atom distance 0.3 nm Gate length Prediction at present Practical limit because of off-leakage between S and D? Lg = 5 nm? MOSFET operation Lg = 2 ~ 1.5 nm? But, no one knows future!

19 .8 nm Gate Oxide Thickness MOSFETs operates 0.8 nm: Distance of 3 Si atoms!! By Robert Chau, IWGI 2003

20 So, we are now in the limitation Of Scaling? Do you believe this or do not????

21 There is a solution! K: Dielectric Constant To use high-k dielectrics Thin gate SiO2 Thick gate high-k dielectrics Almost the same electric characteristics Thick Small leakage Current However, very difficult and big challenge! Remember MOSFET had not been realized without Si/SiO2!

22 Choice of High k elements for oxide Gas or liquid at 1000 K Candidates Unstable at Si interface H Si + MOX M + SiO2 Li B ② Si + MO MSi + SiO X X 2 e ③ Si + MO M + MSi O ① Mg X X Y Na ① HfO2 based dielectrics are selected as the first Radio active generation materials, He because of their merit in 1) band offset, B C N O F Ne 2) dielectric constant 3) thermal stability Al Si P S Cl Ar ② ① ① ① ① ① ① ① ① ① ① Ca Sc K Ti V Cr Mn Fc Co Ni Cu Zn Ga Ge ① ① ① ① ① ① ① ① Y Sr Zr Rh Nb Mo Tc Ru Rb Pd Ag Cd In Sn ③ Hf ① ① ① ① ① ① Cs Ba Ta W Re Os Ir Pt Au Hg Tl Pb As ① Sb ① Bi Se ① Te Po Br I At Fr Ra Rf Ha Sg Ns Hs Mt Kr Xe Rn La2O3 based dielectrics are thought to be the next generation materials, which may not need a thicker interfacial layer La Ce Pr Nd PmSmEu GdTb Dy Ho Er TmYｂ Lu Ac Th Pa U Np Pu AmCm Bk Cf Es Fm Md No Lr R. Hauser, IEDM Short Course, 1999 Hubbard and Schlom, J Mater Res (1996)

23 Intel s announcement, January 26, 2007, and IEDM Dec 2010 Hafnium-based high-k material by ALD: EOT= 1nm Specific gate metals ( Intel s trade secret) Different Metals for NMOS and PMOS Use of 193nm dry lithography From 45 nm to 32 nm Tech. Tr density: 2 times increase Tr witching power: 30% reduction Tr witching speed: 20% improvement S-D leakage power: 5 times reduction Gate oxide leakage: 10 times reduction 45nm processors (Core 2 family processors "Penryn") running Windows* Vista*, Linux* etc. 11nm production in the First half of 2015 or Early 2016.

24 High-k gate insulator MOSFETs for Intel: EOT=1nm EOT: Equivalent Oxide Thickness PMOS

25 EOT = 0.48 nm TIT results Transistor with La2O3 Gate Insulator

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27 Conclusion: Technology Progression Bulk CMOS 3D ICs channel raised source/drain halo Depletion layer Well doping isolation Wafer bonding Crystallization Nanowires Strained Si channel depletion layer isolation Cu interconnect Feature Size FD SOI CMOS Si (tensile) buried oxide Optical interconnect Si0.8 Ge0.2 Si1-xGex Low k ILD Si Double Gate CMOS Metal gate Gate High k gate dielectric Sourc e Drain Ge/Si Heterostrcture Detectors, lasers, modulators, waveguides top-gate channel Ge on Si hetroepitaxy Single e transistor channel Ge on Insulator back-gate isolation buried oxide Molecular device Nanowire Nanotube B + = Spin device Time 2 nm

28 Carbon Nanotubes

29 Graphene Device

30 Graphene Device Electronics(??) A study of how electrons behave in circuitry made from ultrathin layers of graphite known as graphene suggests the material could provide the foundation for a new generation of nanometer scale devices that manipulate electrons as waves much like photonic systems control light waves.

31 Graphene 3D structure and Band Diagram

32 In 2004 two scientists, Andre Geim and Konstantin Novoselov, both of whom would later receive the Nobel Prize for their work In preparation of Graphene

33 Graphene based (2D Material)Transistor Standard NMOSFET Graphene Based Transistor

34 Graphene transistor and new possible Ballistic Device

35 Tunneling Effect

36 Coulomb Blockade a Coulomb blockade is the increased resistance at small bias voltage of an electronic device comprising at lease one low-capacitance tunnel junction.

37 Bottom-Up

38 Self Assembly Applicatoins: solar cell, light-emitting diodes, capsule in drug delivery system

39 Chemical Colloidal Method

40 Lithography and Etching Lithography: electron beam, ion beam, nanoimprint, dip pen nanolithography Etching: wet etching, dry etching, plasma, implantation, photo etching

41 Split-gate Approach Use additional voltage to create 2 dimensional confinements to control the shape and size of the quantum dot s gate. It s a combination of e beam lithography, evaporation, lift off, contact annealing

42 Limitations of CMOS in ~ 10 years Fundamental physical limit 8 electron per bit (today 1000 e/bit) Manufacturing cost $50 Billion/FAB Moore s law scaling to an end??????

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44 Do not believe a text book statement, Or Researcher s statement, Blindly! Never Give Up! As No one knows future! There would always be a solution!!!! Think, Think, and Think! Or, Wait for the time! when Some one will think for you