High Speed, High Voltage, and Energy Efficient Static Induction Devices

Transcription

1 High eed, High Voltage, ad ergy fficiet tatic ductio evices Bogda M. Wilamowski eartmet of lectrical gieerig Uiversity of Wyomig Laramie, WY 8071, UA Abstract everal devices from the static iductio family such as: tatic ductio Trasistor (T), tatic ductio iode (), tatic ductio Thyristor, Lateral Puch- Through Trasistor (LPTT), tatic ductio Trasistor Logic (TL), tatic ductio MO Trasistor (MO), ad ace Charge Limitig Load (CLL) are described. The theory of oeratio of static iductio devices is give for both a curret cotrolled by a otetial barrier ad a curret cotrolled by sace charge. The ew cocet of a Puch-Through (PT), which oerates with majority carrier trasort, is reseted. t is show that by usig the PT it is ossible to desig fast, high ower diodes with breakdow voltages above 1000V while the forward voltage dro ca be o the order of 0.15V. where = µ V ad T kt V T =. By multilyig both q sides of the equatio by ϕ ( ex ad rearragig VT ϕ ( d ex = q ( ex () VT dx VT troductio tatic iductio devices were iveted by. Nishizawa [6]. The idea was so iovative that the curret establishmet i the solid state electroics commuity had difficulty uderstadig ad accetig this discovery. The Trasactios o lectro evices the leadig eriodical had difficulty fidig roer reviewers ad as a result the reviewig rocess cotiued for years. aa was the oly coutry where static iductio family devices were successfully fabricated [14]. The umber of devices i this family is growig with time. The static iductio trasistors ca oerate with ower of 100kW at 100kHz or 10W at 10GHz. tatic iductio trasistor logic had 100 time smaller switchig eergy tha its L cometitor[8][9]. tatic iductio thyristor has may advatages over the traditioal CR, ad tatic iductio diode exhibits high switchig seed, large reverse voltage ad low forward voltage dros. Theory of tatic ductio evices The derivatios of formulas will be doe for a - chael device, but the obtaied results, with a little modificatio ca be also alied to -chael devices. A iduced electrostatically otetial barrier cotrols the curret i static iductio devices. For a small electrical field existig i the viciity of the otetial barrier the drift ad diffusio curret ca be aroximated by dϕ ( d( = q( µ + q (1) dx dx Fig. 1. Potetial distributio i T view from the source side ad view from the drai side. tegratig from x 1 to x oe ca obtai x ) x 1) ( ex ( x1)ex = VT VT q x ex dx x1 VT With the followig boudary coditios x1) = 0; ( x1) = N ; x ) = V ; ( x ) = N ; (3) (4)

2 equatio (3) reduces to q N (5) = x ex dx x1 VT Note that the above equatios derived for T ca be also used to fid curret i ay devices cotrolled by a otetial barrier, such as a biolar trasistor, MO trasistor oeratio i subthreshold mode, or i a chottky diode. amles of the otetial distributio i devices are show i Fig. 3 [1][0]. The viciity of the otetial barrier were aroximated by Plotka [11][1] usig arabolic formulas (Fig. ) alog ad across the chael. x (6) = Φ1 1 L y (7) y) = Φ1 1 W Φ Φ W Φ where L is the chael legth ad v sat µm/s is the carrier saturatio velocity. ractical devices the curretvoltage relatioshi is described by a exoetial relatioshi (1) for small currets, a quadratic relatioshi (14), ad fially for large voltages by a almost liear relatioshi (15). L Fig.. Potetial distributio i the viciity of the barrier aroximated by arabolic shaes. tegratig (5) first alog the chael ad the across the chael, yields a very simle formula for drai currets i -chael T trasistors W Φ = q N Z ex (8) L VT where Φ is the otetial barrier height i referece to the source otetial, N is the electro cocetratio at the source, W/L ratio describes the shae of the otetial saddle i viciity of the barrier, ad Z is the legth of the source stri. ice barrier height Φ ca be a liear fuctio of gate ad drai voltages, therefore W a( VG + bv + Φ0 ) = qn Z ex (9) L VT For large curret levels the device curret is cotrolled by the sace charge of movig carriers. the oedimesioal case the otetial distributio is described by the Poisso equatio: d ϕ ρ( = = (10) dx ε 0 A v( Where A is the effective device cross sectio ad v( is carrier velocity. For a small electrical field v(=µ( 9 A = Vµε (11) L ad for a large electrical field v(= cost A = V vsatε (1) 0 L Fig. 3. Potetial distributios i T traditioal ad with shar otetial barrier. tatic ductio Trasistor (T) Oe of the disadvatages of T is the relatively flat shae of the otetial barrier (Fig. 3). This leads to slow, diffusio based trasort of carriers i the viciity of the otetial barrier. The carrier trasit time ca be estimated usig the formula: t trasit leff l = (13) where eff is the effective legth of the chael ad =µv T is the diffusio costat. the case of a traditioal T trasistor this chael legth is about µm while i the case of T trasistors with sharer barriers (Fig. 3) the chael legth is reduced to about 0.=µm. The corresodig trasiet times are s ad 0s resectively.

3 Puch-Through There are two well kow emitters: (1) - juctio (Fig. 4) ad () chottky juctio (Fig. 4). For silico devices - juctios have a forward voltage dro of volts while chottky emitters have V oly. ice the chottky diode is a majority carrier device, the carrier storage effect is egligible. Aother iterestig emitter structure is show i Fig. 4(c). This emitter has all the advatages of the chottky diode eve though it is fabricated out of - juctios. - - After isertig (14) ito (5) oe ca obtai the wellkow equatio for electro curret ijected ito the base qi VB = (15) ex x VT N ( dx x1 B f equatio (5) is valid for T ad BT the oe may assume that it is also valid for the biolar mode of oeratio of the T trasistor. tatic ductio iode () The biolar mode of oeratio of T ca be also used to obtai diodes with low forward voltage dro ad egligible carrier storage effect [][5][13][3][4]. A static iductio diode ca be obtaied by shortig a gate to the emitter of the static iductio trasistor. uch diode has all the advatages of the static iductio trasistor such as thermal stability, ad short switchig time. The cross sectio of such diode is show i Fig. 5. T (c) - aode Fig. 4. Various structures of emitters: - juctio icludig heterostructure with ige materials, chottky juctio, (c) uch-through emitter (i ormal oeratio coditio the regio is deleted from carriers). The cocet of static iductio devices ca be used ideedetly of the tye of emitter show i Fig. 4. This way the quality of each emitter ca be further ehaced by the static iductio effect as show i Fig. 5. Biolar Mode Oeratio of devices (BT) The biolar mode of oeratio of T was first reorted i 1976 by Nishizawa ad Wilamowski [8][9]. everal comlex theories for the biolar mode of oeratio were develoed [][5][6][10][3][4], but actually the simle formula (5) works well ot oly for the tyical mode of T oeratio, but also for the biolar mode of T oeratio. Furthermore, the same formula works very well for classical biolar trasistors. For examle, i the case of biolar trasistors the otetial distributio across the base i referece to emitter otetial at the referece imurity level N =N is described by NB( N ϕ ( = VT l V (14) B i - a emitter cathode Fig. 5. tatic ductio iode: circuit diagram ad cross sectio The quality of the static iductio diode ca be further imroved with more sohisticated emitters (Fig. 4 ad 4(c)). The diode with chottky emitter was described by Wilamowski i 1983 [17] (Fig. 6). A imroved structure was later ublished by Baliga [1]. T chotty

4 cathode - aode cathode f the -layer has a uiform imurity distributio the MAXF ad MAXR are equal. Whe, istead of the costat doig rofile i the regio, the ouiform doig is used the the value MAXR ca be much larger tha MAXF. Aother advatage of the - diode is the very fast switchig time because this is basically a device with majority carrier trasort. ice the curret flow i both directios is cotrolled by a otetial barrier i both directios, the curret voltage characteristics ca be described by equatios (5) ad (8). Lateral Puch-Through Trasistor (LPTT) - (c) aode Fig. 6. chottky diode with elarged breakdow voltages: circuit diagram, ad (c) two cross sectio of ossible imlemetatio Fabricatios of trasistors usually require very sohisticated techology. t is much simler to fabricate a lateral uch through trasistor, which oerates o the same ricile ad has similar characteristics [15]. The cross sectio of the LPTT is show i Fig. 8. electro flow MAXF forward directio electrical field rai - Gate - Gate rai - MAXR reverse directio electro flow Fig. 7. lectrical field distributio i - diode for forward ad reverse directios - iode f the uch-through emitter is used (Fig. 4(c)) the a a very iterestig diode ca be develoed. Fig. 7 shows the electrical field distributio for forward ad reverse directios usig ste juctio aroximatio. The voltage dro o the device is roortioal to the area uder the curve ad the ratio betwee forward ad reverse directios ca be very large. Let us assume the imurity cocetratio i layer N A =10 18 ; thickess of - layer =100µm, thickess of layer 0.01µm. The eak electrical electrical field field ca be foud as qnx MAX = = = 1.55 ε ad the forward ad reverse voltages are MAX ( x + x + ) VFORWAR 0. 15V V x = V RVR MAX 1500 V cm V = 15 µ m rai Gate Gate rai Fig. 8. everal structures of the lateral uch-through trasistors: simle ad with sharer otetial barrier. - Fig. 9. Cross-sectio of T logic i suly curret out1 Fig. 10. iagrams of T logic out out3 tatic ductio Trasistor Logic (TL) The TL was roosed by Nishizawa ad Wilamowski [8][9]. This logic circuit has almost 100

5 times better ower-delay roduct tha its L cometitor. uch drastic imrovemet of the ower-delay roduct is ossible because the TL structure has sigificatly smaller juctio arasitic caacitace ad also the voltage swig was reduced by half. Fig. 9 ad 10 illustrate the cocet of TL. BT aturatio Protected by T The trasistor ca be also used istead of a chottky diode to rotect a biolar juctio trasistor agaist saturatio[0]. The cocet is show i Fig. 11 ad 1. chottky C B C tatic ductio MO Trasistor (MO) The uch-through trasistor with MO Cotrolled Gate was described i 1983 [18][19]. the structure i Fig. 13 curret ca flow i a similar fashio as i the lateral uch-through trasistor[15]. this mode of oeratio, carriers are movig far from the surface with a velocity close to the saturatio velocity. The real advatage of such structure is the very low gate caacitace. + gate deletio B Fig. 11. Protectio of biolar trasistor agaist dee saturatio usig chottky diode, ad usig T. T B C imlat - Gate rai - Fig. 1. Cross sectios of biolar trasistors rotected agaist dee saturatio usig T. - - gate - - deletio gate deletio - rai + - rai Fig. 13. MO cotrolled uch-through trasistor trasistor i the off state for the egative gate otetial ad trasistor i the o state for the ositive gate otetial. + rai Fig. 14. tatic ductio MO structure cross sectio ad to view Aother iterestig structure is show i Fig. 14. The buried + layer is coected to the substrate, which has a large egative otetial. As a result the otetial barrier is high ad the emitter-drai curret caot flow. The uch through curret may start to flow whe the ositive voltage is alied to the gate ad i this way the otetial barrier is lowered. The -imlat layer is deleted ad due to the high horizotal electrical field uder the gate there is o charge accumulatio uder this gate. uch a trasistor has several advatages over the traditioal MO trasistor. (1) The gate caacitace is very small, sice there is o accumulatio layer uder the gate. () Carriers are movig with a velocity close to saturatio velocity. (3) Much lower substrate doig ad the existig deletio layer lead to much smaller drai caacitace. The device oerates i a similar fashio as MO trasistor i subthreshold coditios, but this rocess occurs at much higher curret levels. uch "biolar mode"

6 of oeratio may have may advatages i VL alicatios. ace Charge Limitig Load (CLL) Usig the cocet of the sace-charge limited curret flow (qs. (11) ad (1)) it is ossible to fabricate very large resistors o a very small area. Moreover these resistors have a very small arasitic caacitace. The 50kΩ resistor requires oly several square µm usig µm techology []. - Fig. 16. ace Charge Limitig Load (CLL) Refereces [1] Baliga B.. "The ich rectifier: A low frowarddro, high-seed ower diode," lectro evice Letters, vol. 5, , [] Kim C. W., M. Kimura, K.Yao, A. Taaka, ad T. ukegawa, "Biolar-Mode tatic ductio Trasistor: xerimet ad Two-imesioal Aalysis," Tras. o lectro evices, vol. 37, No. 9, , etember [3] Lewadowski,. ad B. M. Wilamowski, "O the dyamic roerties of TL iverter", lectro Techology, vol.14, o. 3/4,. 19-6, [4] Mattso, R. H. ad B. M. Wilamowski "Puch- Through evices Oeratig i ace-charge- Limited Modes," teratioal Worksho o the Physics of emicoductor evices, elhi, dia, ecember 5-10, [5] Nakamura Y., H. Tadao, M. Takigawa,. garashi, ad. Nishizawa "xerimetal tudy o Curret Gai of BT," Tras. o lectro evices, vol. 33, No. 6, , ue [6] Nishizawa., T. Ohmi, ad H. L. Che, "Aalysis of tatic Characteristics of a Biolar-Mode T (BT)," Tras. o lectro evices, vol. 9, No. 8, , August 198. [7] Nishizawa., T. Terasaki, ad. hibata, "Field- ffect trasistor Versus Aalog Trasistor (tatic ductio Trasistor)", Tras. o lectro evices, vol., No. 4, , Aril [8] Nishizawa,. ad B. M. Wilamowski, "tegrated Logic - tate ductio Trasistor Logic," teratioal olid tate Circuit Coferece, Philadelhia UA,.-3, [9] Nishizawa,. ad B. M. Wilamowski, "tatic ductio Logic - A imle tructure with Very Low witchig ergy ad Very High Packig esity," teratioal Coferece o olid tate evices, Tokyo, aa, , 1976 ad oural of aaese oc. Al. Physics Vol. 16-1, , [10] Ohmi T., "Puchig Through evice ad ts tegratio - tatic ductio trasistor," Tras. o lectro evices, vol. 7, , March [11] Plotka, P. ad B. M. Wilamowski, "terretatio of xoetial Tye rai Characteristics of the T," olid-tate lectroics, vol. 3, , [1] Plotka, P. ad B. M. Wilamowski, "Temerature Proerties of the tatic ductio Trasistor," olid- tate lectroics, vol. 4, , [13] himizu Y., M. Naito,. Murakami, ad Y. Terasawa "High-eed Low-loss - iode Havig a Chael tructure," Tras. o lectro evices, vol. 31, No. 9, , etember [14] tork. M. C. ad.. Plummer, "mall geometry deleted barrier biolar trasistor (BT), " Tras. o lectro evices vol. 9, , 198. [15] Wilamowski, B. M. ad R. C. aeger, "The Lateral Puch-Through Trasistor," lectro evice Letters, vol. 3, o. 10, , 198. [16] Wilamowski, B. M. ad T.. glert, "CMT - Coductivity Modulated Trasistor", Tras. o lectro evices vol. 39, o 11, , 199. [17] Wilamowski, B. M., "chottky iodes with High Breakdow voltage," olid-tate lectroics, vol. 6, o. 5, , [18] Wilamowski, B. M., "The Puch-Through Trasistor with MO Cotrolled Gate," Phys. tatus olidi, vol. 79, , [19] Wilamowski, B. M., R. C. aeger, ad. N. Fordemwalt, "Buried MO Trasistor with Puch- Through," olid tate lectroics, vol. 7, o. 8/9, , [0] Wilamowski, B. M., R. H. Mattso, ad Z.. taszak "The T saturatio rotected biolar trasistor", lectro evice Letters, vol , [1] Wilamowski, B. M., Z.. taszak, ad R. H. Mattso, "A lectrical etwork aroach to the aalyses of semicoductor devices", Tras. o ducatio vol. 35, o, , 199. [] Wilamowski, B.M., R. H. Mattso, Z.. taszak, ad A. Musallam, "Puch- through sace-charge limited loads", lectroic Comoet Coferece, eattle, Washigto, UA, , May 5-7, [3] Yao K.,. Hemi, M. Kasuga, ad A. himizu, "High-Power Rectifier Usig the BT Oeratio," Tras. o lectro evices, vol. 45, No., , February [4] Yao K., M. Masahito, H. Moroshima,. Morita, M. Kasuga, ad A. himizu, "Rectifier Characteristics Based o Biolar-Mode T Oeratio," lectro evice Letters, vol. 15, No. 9, , etember 1994.