Two and four-quadrant DC/DC converters with SCALE drivers

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1 Applicatio Note wo ad four-quadrat / coverters with A drivers Notes for the use of dead-time logic by Heiz üedi, -ocept echology td. witzerlad troductio Whereas the most widely used / coverter topologies operate oly i siglequadrat mode, a 2 or 4-quadrat cotrol rage is required i some applicatios. hese iclude / coverters which ca trasport eergy i both forwards ad reverse directios as well as buck/boost coverters. Figure illustrates the basic circuit of a 2-quadrat buck coverter. Q Q Fig. wo-quadrat buck coverter teret: river.com Page

2 Applicatio Note he circuit ca be rotated to obtai a 2-quadrat up-coverter. Oly oe switch is clocked, depedig o the desired directio of eergy flow. he opposite trasistor i each case has o importace as oly the freewheelig diode is used. he two switches Q ad Q2 must ever coduct simultaeously; provisio must be made for a dead time whe chagig over betwee Q ad Q2. Use of A drivers A drivers are also ideal for applicatios of this kid. Firstly i the ormal way where both trasistors are always operated i half-bridge cofiguratio, so that the A driver (i half-bridge mode) ca also geerate the required dead times. M P 2 9 N H M P 8 t t Fig. 2 Block diagram of the 00 logic-to-driver iterface Page 2 teret: ocept.com

3 Applicatio Note f oly Q or Q2 are to be clocked depedig o the desired directio of eergy flow, the driver s direct mode ca be used. he cotroller must the prevet both trasistors from coductig simultaeously ad must esure that a specific dead time is maitaied whe chagig over betwee Q ad Q2 ad vice-versa. But there is also a easier way by lookig more closely at the iside of the circuit. he iput sigals are processed i the 00 (a A used i the A driver). However, the block diagram of this A (Fig. 2) does ot reveal ay details of how the sigals are actually processed. Figure 3 shows the sigal processig i half-bridge mode. he sigal applied to iput A is fed to the dead-time circuits oce iverted ad oce ot. A AN gate is located behid the iput; both outputs ca be deactivated with iput B. H 4 5 ( Fig. 3 ircuit priciple i half-bridge mode f the iformatio about the directio of eergy flow is applied to iput A ad the PWM sigal to iput B, the the required characteristic is obtaied with o additioal circuits: : ither Q or Q2 ca be used for clockig, the opposite switch is always blocked. he driver applies the PWM sigal preset at iput B i udistorted form (without addig a dead time) to the correspodig power switch. : Wheever switchover takes place betwee Q ad Q2 ad vice-versa, the driver geerates a dead time. teret: river.com Page 3

4 Applicatio Note Figure 4 shows the resultig sigal profile. Fig. 4 igal profiles i the applicatio upplemetary otes We take great care i preparig our applicatio otes. However, we caot guaratee that the circuits ad procedures show will operate without problems i every applicatio. his must be established by the user himself. Neither ca we guaratee that the suggestios are free of third-party rights. Maufacturer Your istributio Parter -ocept echology td. telliget Power lectroics Hauptstrasse 3 H-2533 eubrige / vilard (witzerlad) el 4 (0)32 / Fax 4 (0)32 / Mail ifo@ct-cocept.com teret teret Page 4 teret: ocept.com

5 Applicatio Note opyright by -ocept echology td. - witzerlad. All rights reserved. We reserve the right to make ay techical modificatios without prior otice. ersio from teret: river.com Page 5

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