To make the gm constant, the two parameters can be made constant at first: '

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1 EE 501 Lab 9 Constant gm circuit for rail to rail input common mode voltage Due: November 20, 2014 Objective: To understand the constant gm input circuit (appendix 1). To implement the circuit with low supply voltage. ntroduction: From the class, we know already that complementary input circuit can drive CMR from rail to rail and the total gm of the first stage should be constant which is not easy as shown in the appendix. To adjust the circuit so that we can get a constant gm to improve the linearity of opamp, a trick is used. As the total gm of complementary input stage is: W W gm gm, n gm, p 2Kn n 2K p p L L To make the gm constant, the two parameters can be made constant at first: W W Kn K p K ' L n L p Therefore, the gm becomes: g 2 K ' ( ) m n p f we can make n p a constant value during operation, a constant gm input stage can be acquired. As shown in Fig. 1. Fig. 1 Constant gm stage scheme Fig. 2 shown below is a structure for realizing constant gm by making both. Assume that the mobility ratio between NMOS and PMOS is 3:1.

2 1. When input is higher than V 2V V, PMOS input pair will be off, NMOS input pair will have current of 4 n. 2. When input is lower thanv 2V thn DD dsat thp dsat, NMOS input pair will be off, PMOS input pair will contain current of 4 p. 3. When input is in the middle where both NMOS and PMOS input pair are in strong inversion, the total current will be. However, with this low supply voltage, n the tail current might be in deep triode which will affect the constancy of gm. p Fig. 2 Constant gm stage example Tasks: Please read the appendix 1 before lab. n this lab, we will use supply voltage of 2.5V. An example (roughly tuned) is prepared. f this lab is difficult for you, ask TA for the example to begin with. Bonus: a. Lower the supply voltage to 2V and make sure the variation of gm between ±10%. b. Change the supply voltage from 2V to 6V and keep gm and total current the same (10% change). c. Try other constant gm structure such as two identical pairs with level shifter.

3 Appendix: 1. Analysis of complementary input stage: To analyze the common mode input range of the NMOS differential input stage, a simplified diagram will be used as shown in figure below. Several modifications are made to the simple differential pair in actual implementation such as active loads and cascodes, however this is sufficient for the purpose of illustration. The range extends from the positive supply to Vgs,n+VDsat,b above the negative supply. This minimum voltage is needed to keep the NMOS differential pair and the tail current source in saturation. A similar analysis can be carried out for the PMOS differential pair shown in figure below. The range extends from Vgs,n+VDsat,b below the positive supply to the negative supply. This minimum voltage is needed to keep the PMOS differential pair and the tail current source in saturation.

4 The simple differential pair can not meet the rail to rail common mode input requirement. A possible solution to the problem is to use both NMOS and PMOS differential pairs simultaneously. The resulting compound differential pair is called the complementary differential pair and is shown in figure below. For low common mode input, the PMOS differential pair is in saturation and NMOS is off. For high common mode input, the NMOS differential pair is in saturation and PMOS is off. Therefore, the total effect is that the complementary differential pair is always working and the rail to rail common mode input requirement is met. t should be noted that for common mode input in the middle region both pairs are working, this will have a significant effect on the performance of the circuit. To understand the effect, we will investigate how the transconductance of each pair and of the complementary pair changes with common mode input signal. First the transconductance verses input common mode of the NMOS pair is shown in figure below. Similarly, the transconductance verses input common mode of the PMOS pair is shown in figure below.

5 We see that the transconductance of each pair is almost constant over its common mode range and drops to zero outside this range. Combining these two graphs gives the transconductance verses input common mode of the complementary pair as shown in figure below. t is assumed here that both pairs in the complementary structure had been sized appropriately to obtain equal transconductance in their region of operation.