ECEN325: Electronics Summer 2018

Transcription

1 ECEN325: Electronics Summer 2018 Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) Sam Palermo Analog & Mixed-Signal Center Texas A&M University

2 Announcements & Reading H5 due today Exam 2 on July 20 MOSFET Reading Razavi Ch6 MOSFET Models Razavi Ch7 MOSFET Amplifiers 2

3 MOSFET Circuit Symbols NMOS PMOS MOSFETs are 4-terminal devices Drain, Gate, Source, & Body Body terminal generally has small impact in normal operation modes, thus device is generally considered a 3-terminal device Drain, Gate, and Source are respectively similar to the Collector, Base, and Emitter of the BJT 2 complementary MOSFETS: NMOS, PMOS 3

4 NMOS Physical Structure n+ n+ [Karsilayan] 4

5 CMOS Physical Structure [Karsilayan] 5

6 TH Definition [Silva] The threshold voltage, TH, is the voltage at which an inversion layer is formed For an NMOS this is when the concentration of electrons equals the concentration of holes in the p - substrate 6

7 Drain Current Derivation: Channel Charge Density [Razavi] Q C ( GC TH where Capacitane per unit gate area : C ) t The incremental channel charge density is equal to the gate capacitance times the gate-channel voltage in excess of the threshold voltage. CH 6 Physics of MOS Transistors 7

8 Drain Current Derivation: Charge Density at a Point [Razavi] Q( x) C ( x) TH et x be a point along the channel from source to drain, and (x) its potential; the expression above gives the charge density (per unit length). CH 6 Physics of MOS Transistors 8

9 Drain Current Derivation: Charge Density and Current [Razavi] Q v The current that flows from source to drain (electrons) is related to the charge density in the channel by the charge velocity. CH 6 Physics of MOS Transistors 9

10 Drain Current Derivation: Triode Region (Small ) Current Equation [Razavi] Electron elocity : D Q xv C ( x) x x x x Ddx 0 0 v C n n d dx TH n d ( x) dx ( x) TH d ( x) D C n TH 1 2 CH 6 Physics of MOS Transistors 10

11 Triode or inear Region [Silva] x x=0 x= Channel depth and transistor current is a function of the overdrive voltage, - T, and Because is small, GC is roughly constant across channel length and channel depth is roughly uniform n C OX Tn 0. 5 GC 0 0 x x x For small x R C 1 Tn 11

12 MOS Equations in Triode Region (arge ) Drain current: Expression used in SPCE level 1 GND t n C OX Tn 0. 5 N+ N+ GND Dsat D inear apprimation This doesn t really happen t N+ N+ > T Non-linear channel sat sat Tn

13 Triode Region Channel Profile [Sedra/Smith] GC x x x f GC is always above T throughout the channel length, the transistor current obeys the triode region current equation 13

14 Saturation Region Channel Profile GC x x x hen - TH = O, GC no longer exceeds TH, resulting in the channel pinching off and the current saturating to a value that is no longer a function of (ideally) [Sedra/Smith] 14

15 Saturation Region [Silva] sat = - T - sat GC x x x x=0 x= x 0 0 x Channel pinches-off when = - TH and the current saturates After channel charge goes to 0, the high lateral field sweeps the carriers to the drain and drops the extra voltage C n OX nc 2 OX Tn 2 2 Tn Tn sat Tn 15

16 NMOS D Characteristics O TN [Sedra/Smith] 16

17 MOS arge-signal Output Characteristic [Sedra/Smith] Note: ov = - T 17

18 hat about the PMOS device? NMOS PMOS [Silva] The current equations for the PMOS device are the same as the NMOS EXCEPT you swap the current direction and all the voltage polarities NMOS inear: n C OX Tn 0. 5 Saturation: ncox Tn 2 PMOS C 0. 5 SD pcox SG Tp 2 SD p OX SG Tp SD SD

19 PMOS D SD Characteristics O SG TP [Karsilayan] (Saturation) 19

20 NMOS DC Operation (w/ infinite r out ) Region Bias Condition Cutoff TN 0 Triode (inear) TN, TN C n TN 2 Saturation (Active) TN, TN nc 2 2 TN [Karsilayan] n transistor model, often combine n C term as a parameter KP N with units A/ 2 n lab, we combine n C (/) term as a parameter N with units A/ 2 20

21 PMOS DC Operation (w/ infinite r out ) Region Bias Condition SD Cutoff SG TP SD 0 Triode (inear) SG TP, SD SG TP SD C p SG TP 2 SD SD Saturation (Active) SG TP, SD SG TP SD C p 2 2 SG TP [Karsilayan] n transistor model, often combine p C term as a parameter KP P with units A/ 2 n lab, we combine p C (/) term as a parameter P with units A/ 2 21