TSMC Property. EUV Lithography. The March toward HVM. Anthony Yen. 9 September TSMC, Ltd

Transcription

1 EUV Lithography The March toward HVM Anthony Yen 9 September 2016

2 1 1 st EUV lithography setup and results, 1986 Si Stencil Mask SR W/C Multilayer Coating Optics λ=11 nm, provided by synchrotron radiation Ring Aperture Wafer 8X, ring-field Schwarzschild optics; exposure carried out by scanning mask and wafer Hiroo Kinoshita, 30 years have passed from the first experiment, International Symposium on EUVL, Maastricht, the Netherlands, 6 Oct. 2015

3 2 Bell Lab s setup and results, 1990 Under the leadership of Rick Freeman and Bill Brinkman, based on initial investigations by Silfvast and Wood, a Bell Lab team was assembled to work on EUVL in mm Si membrane; 0.5 mm Ge absorber 20X Schwazschild NA = 0.08 J. E. Bjorkholm et al., JVST B 8, 1509, Nov/Dec 1990 Pitch = 100 nm

4 3 Reflective EUV masks proposed and fabricated Lawrence Livermore National Laboratory, 1989 Kinoshita et al. also succeeded in fabricating ML masks in 1989, published in JVST B 7, 1648 (1989) Hawryluk et al., JVST B7, 1702, Nov/Dec 1989

5 4 Critical component in EUVL: multilayer reflector technology n = 1 d; k = b Troy W. Barbee, Jr., Proc. SPIE 563, 2 (1985)

6 5 EUV LLC Organizational Structure, mid-90s from EUV LLC: An Historical Perspective, by Chuck Gwyn and Stefan Wurm in EUV Lithography, edited by Vivek Bakshi, SPIE Press 2009

7 6 Culmination of EUV LLC work ETS, early 2000s Schematic drawing Initial assembly 0.1 NA, 4 mirrors, 24x32.5 mm imaging field from EUV LLC: An Historical Perspective, by Chuck Gwyn and Stefan Wurm in EUV Lithography, edited by Vivek Bakshi, SPIE Press 2009

8 Reflectivity and Spectra Density (arb. units) 2013 TSMC, Ltd nm wavelength was selected around Reflectivity of an 11-mirror imaging system and spectra of Xe, Sn, Li Xe Sn Li Mo/Si ML Wavelength (nm) from EUV Source Requirements for EUVL, by K. Ota, Y. Watanabe, V. Banine, H. Franken in EUV Sources for Lithography, edited by Vivek Bakshi, SPIE Press 2006

9 8 ASML s ADT in image qualification, Spring 2006 Hans Meiling et al., First performance results of the ASML alpha demo tool, Proc. SPIE 6151, (2006)

10 9 TSMC participation of imec s EUV Program 10/2007 DPP Source 1 st light: 4/2007 Tool accepted: 6/2008 Photos courtesy of imec ADT Scanner

11 10 NXE3100 Arrives in Taiwan, 7/2011 One of several scanner shipments arriving in Taiwan

12 11 NXE3100 Installation Nearly Complete Hsinchu, October 2011

13 12 NXE3300: Installation Complete Hsinchu, October 2013

14 13 Mid-module of NXE3350 Arriving at TSMC Hsinchu, January 2016

15 EUV Power (W) 2013 TSMC, Ltd 14 Progress on EUV source power Year

16 15 210W w/ in-spec dose, on a development source Slide courtesy of ASML

17 16 Carl Zeiss Starlith 3300/3400 Optics ML coated collector mirror Photo Source: Fraunhofer IOF Slide courtesy of Carl Zeiss

18 17 Improvements in Sustaining EUV Power by maintaining collector mirror cleanliness 1 st Round of 2 nd Round of Improvements Improvements 3 rd Round of Improvements 4 th Round of Improvements 5 th Round of Improvements 30 Gp (-1.4%/Gp) 35 Gp (-1.2%/Gp) 77 Gp (-0.78%/Gp) 95 Gp (-0.43%/Gp) *130Gp (-0.4%/Gp) *estimated Collector usage (G-pulses)

19 Wafers per Day 2013 TSMC, Ltd 18 Daily EUV Wafer Exposure Trend 1000 NXE3350 single tool champion data Day 1 Day 2 Day 3 1/2016 8/2016

20 Total number of wafers exposed: 2013 TSMC, Ltd 19 > 545,000 wafers exposed on NXE:33x0B systems by customers 600, , , , , , Week Slide courtesy of ASML

21 20 Can we keep the mask clean? (a) Outer pod Inner pod EUV Mask (downward facing) and associated Dual-Pod (b) (c) (d) Inner pod (a) Conductive layer (b) Low thermal expansion material (c) Mo/Si multilayer (d) Absorber (b) (c) Dual-Pod manufactured by Gudeng Precision Industrial Co. (d)

22 Defects per Blank 21 Continual reduction of mask native defects Resolution of inspection:23 nm SEVD

23 22 TSMC EUV pellicle development Membrane thickness = 50nm Transmission = 85%

24 23 Slide courtesy of JSR

25 24 Non-CAR Resist: 13nm 26 mj/cm 2 w/ Process Window -60nm -40nm -20nm BF: 0nm 20nm 40nm 60nm NXE3300, Dip45x 26nm Pitch, 13nm L/S DOF@10%EL: 140 nm 27.0 mj/cm nm CD 4.6 nm LWR Slide courtesy of Inpria, in collaboration with imec

26 25 EUV single exposure replaces immersion multiple patterning 2D Metal layer at 32nm pitch achieved with Quasar illumination 48nm pitch / 24nm CD 32nm pitch / 16nm CD EUV Single Exposure ArFi Triple Patterning Dose: 20 mj/cm 2 Quasar illumination Pupil Fill ratio 20% Slide courtesy of ASML, in cooperation with imec

27 26 Exposure tools and their approximate resolution limits Exposure Tool Type DUV (248) DUV (193) DUV (immersion) EUV (current) EUV (future) Wavelength 248 nm 193 nm 193 nm 13.5 nm 13.5 nm N.A Approx. Min. Printable Pitch 160 nm 120 nm 80 nm 26 nm 16 nm For lines and spaces; resolution is somewhat lower for hole-type patterns EUV options being explored to extend Moore s law Node N: 1 st generation EUV single patterning Node N+1: low-k1 EUV single patterning Node N+2: EUV double patterning or high-na EUV single patterning Node N+3: high-na, low-k1 EUV single patterning

28 27 Immersion Lithography Development at TSMC 10/2003 ASML made 1 st immersion scanner the 1150i with NA = /2004 Immersion a tool 1250i NA = / i NA = / i NA = 1.2 March st immersion proposal (Burn Lin, TSMC) Dec st 1250i moved into TSMC July st 65nm product yield Miror LastLens Tank Fluid Fluid Element Cover Inlet Outlet Wafer Fluid Miror Vacum Pump Fluid Replenishing Hole Filter Drain Nov 2004 TSMC made 1st functioning 90nm chip with 1150i

29 28 EUV Lithography Development at TSMC Metal-1 layer 20-nm node Exposed on ADT 2010 Metal-1 layer 10-nm node 2013 Via layer 7-nm node 2015 Via layer 5-nm node 2016 imec s ADT passed acceptance test 6/2008 NXE3100 installation complete 10/2011 NXE3300 installation complete 10/2013 NXE3350 move-in 1/2016 NXE3400 scanners for 5-nm node ADT scanner, resists, masks, pellicles, integration, etc. Resists, mask blanks, AIMS tool, etc. Actinic mask blank inspector Co-funding of EUV development