TLC227x, TLC227xA Advanced LinCMOS RAIL-TO-RAIL OPERATIONAL AMPLIFIERS

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1 TLC7x, TLC7xA SLOS9E FEBRUARY 997 REVISED MARCH Output Swing Includes Both Supply Rails Low Noise...9 nv/ Hz Typ at f = khz Low Input Bias Current... pa Typ Fully Specified for Both Single-Supply and Split-Supply Operation Common-Mode Input Voltage Range Includes Negative Rail High-Gain Bandwidth.... MHz Typ High Slew Rate.... V/µs Typ Low Input Offset Voltage 9 µv Max at T A = C Macromodel Included Performance Upgrades for the TS7, TS7, TLC7, and TLC7 Available in Q-Temp Automotive HighRel Automotive Applications Configuration Control / Print Support Qualification to Automotive Standards description The TLC7 and TLC7 are dual and quadruple operational amplifiers from Texas Instruments. Both devices exhibit rail-to-rail output performance for increased dynamic range in single- or split-supply applications. The TLC7x family offers MHz of bandwidth and V/µs of slew rate for higher speed applications. These devices offer comparable ac performance while having better noise, input offset voltage, and power dissipation than existing CMOS operational amplifiers. The TLC7x has a noise voltage of 9 nv/ Hz, two times lower than competitive solutions. The TLC7x, exhibiting high input impedance and low noise, is excellent for small-signal conditioning for high-impedance sources, such as piezoelectric transducers. Because of the micropower dissipation levels, these devices work well in hand-held monitoring and remote-sensing applications. In addition, the rail-to-rail output feature, with single- or split-supplies, makes this family a great choice when interfacing with analog-to-digital converters (ADCs). For precision applications, the TLC7xA family is available and has a maximum input offset voltage of 9 µv. This family is fully characterized at V and ± V. The TLC7/ also makes great upgrades to the TLC7/ or TS7/ in standard designs. They offer increased output dynamic range, lower noise voltage, and lower input offset voltage. This enhanced feature set allows them to be used in a wider range of applications. For applications that require higher output drive and wider input voltage range, see the TLV and TLV devices. If the design requires single amplifiers, please see the TLV// family. These devices are single rail-to-rail operational amplifiers in the SOT- package. Their small size and low power consumption, make them ideal for high density, battery-powered equipment. V(OPP) O(PP) Maximum Peak-to-Peak Output Voltage V 8 MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE SUPPLY VOLTAGE IO = ± µa IO = ± µa 8 VDD ± Supply Voltage V Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Advanced LinCMOS is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX DALLAS, TEXAS 7 Copyright, Texas Instruments Incorporated On products compliant to MIL-PRF-8, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.

2 TLC7x, TLC7xA SLOS9E FEBRUARY 997 REVISED MARCH TA C to7 C C to C C to C TLC7 AVAILABLE OPTIONS PACKAGED DEVICES VIOmax At SMALL C PLASTIC DIP TSSOP OUTLINE (P) (PW) (D) 9 µv TLC7ACD TLC7ACP. mv TLC7CD TLC7CP TLC7CPW 9 µv TLC7AID TLC7AIP. mv TLC7ID TLC7IP TLC7IPW 9 µv TLC7AQD TLC7AQPW. mv TLC7QD TLC7QPW 9 µv TLC7AMD TLC7AMP. mv TLC7MD TLC7MP The D packages are available taped and reeled. Add R suffix to the device type (e.g., TLC7CDR). The PW package is available taped and reeled. Add R suffix to the device type (e.g., TLC7PWR). Chips are tested at C. TA C to7 C C to C C to C VIOmax AT C SMALL OUTLINE (D) TLC7 AVAILABLE OPTIONS PACKAGED DEVICES CHIP CARRIER (FK) CERAMIC DIP (J) PLASTIC DIP (N) TSSOP (PW) 9 µv TLC7ACD TLC7ACN. mv TLC7CD TLC7CN TLC7CPW 9 µv TLC7AID TLC7AIN. mv TLC7ID TLC7IN TLC7IPW 9 µv TLC7AQD. mv TLC7QD 9 µv TLC7AMD TLC7AMFK TLC7AMJ TLC7AMN. mv TLC7MD TLC7MFK TLC7MJ TLC7MN The D packages are available taped and reeled. Add R suffix to device type (e.g., TLC7CDR). The PW package is available taped and reeled. Chips are tested at C. TLC7 D, P, OR PW PACKAGE (TOP VIEW) TLC7 D, J, N, OR PW PACKAGE (TOP VIEW) TLC7 FK PACKAGE (TOP VIEW) OUT IN IN+ V DD /GND 8 7 V DD + OUT IN IN+ OUT IN IN+ V DD + IN+ IN OUT OUT IN IN+ V DD IN+ IN OUT IN+ NC V DD + NC IN+ IN OUT NC OUT OUT IN IN IN OUT NC IN+ NC V DD NC IN+ NC No internal connection POST OFFICE BOX DALLAS, TEXAS 7

3 TLC7x, TLC7xA SLOS9E FEBRUARY 997 REVISED MARCH equivalent schematic (each amplifier) VDD + Q Q Q9 Q Q Q IN + C OUT IN R Q Q Q Q Q7 Q Q Q7 Q8 Q Q D R R R R VDD ACTUAL DEVICE COMPONENT COUNT COMPONENT TLC7 TLC7 Transistors 8 7 Resistors Diodes 9 8 Capacitors Includes both amplifiers and all ESD, bias, and trim circuitry POST OFFICE BOX DALLAS, TEXAS 7

4 TLC7x, TLC7xA SLOS9E FEBRUARY 997 REVISED MARCH absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, V DD+ (see Note ) V Supply voltage, V DD (see Note ) V Differential input voltage, V ID (see Note ) ± V Input voltage, V I (any input, see Note ) V DD. V to V DD+ Input current, I I (any input) ± ma Output current, I O ± ma Total current into V DD ± ma Total current out of V DD ± ma Duration of short-circuit current at (or below) C (see Note ) unlimited Continuous total dissipation See Dissipation Rating Table Operating free-air temperature range, T A : C suffix C to 7 C I, Q suffix C to C M suffix C to C Storage temperature range C to C Lead temperature, mm (/ inch) from case for seconds: D, N, P or PW package C Lead temperature, mm (/ inch) from case for seconds: J package C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES:. All voltage values, except differential voltages, are with respect to the midpoint between VDD+ and VDD.. Differential voltages are at IN+ with respect to IN. Excessive current will flow if input is brought below VDD. V.. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded. PACKAGE DISSIPATION RATING TABLE TA C DERATING FACTOR TA = 7 C TA = 8 C TA = C POWER RATING ABOVE POWER RATING POWER RATING POWER RATING D 8 7 mw.8 mw/ C mw 7 mw mw D 9 mw 7. mw/ C 8 mw 9 mw 9 mw FK 7 mw. mw/ C 88 mw 7 mw 7 mw J 7 mw. mw/ C 88 mw 7 mw 7 mw N mw 9. mw/ C 7 mw 98 mw mw P mw 8. mw/ C mw mw mw PW 8 mw. mw/ C mw 7 mw mw PW 7 mw. mw/ C 8 mw mw recommended operating conditions C SUFFIX I SUFFIX Q SUFFIX M SUFFIX MIN MAX MIN MAX MIN MAX MIN MAX Supply voltage, VDD± ±. ±8 ±. ±8 ±. ±8 ±. ±8 V Input voltage range, VI VDD VDD +. VDD VDD +. VDD VDD +. VDD VDD +. V Common-mode input voltage, VIC VDD VDD +. VDD VDD +. VDD VDD +. VDD VDD +. V Operating free-air temperature, TA 7 C UNIT POST OFFICE BOX DALLAS, TEXAS 7

5 TLC7x, TLC7xA SLOS9E FEBRUARY 997 REVISED MARCH TYPICAL CHARACTERISTICS Percentage of Amplifiers % DISTRIBUTION OF TLC7 INPUT OFFSET VOLTAGE 89 Amplifiers From Wafer Lots VDD = ±. V Percentage of Amplifiers % DISTRIBUTION OF TLC7 INPUT OFFSET VOLTAGE 89 Amplifiers From Wafer Lots VDD = ± V VIO Input Offset Voltage mv Figure VIO Input Offset Voltage mv Figure DISTRIBUTION OF TLC7 INPUT OFFSET VOLTAGE 99 Amplifiers From Wafer Lots VDD = ±. V DISTRIBUTION OF TLC7 INPUT OFFSET VOLTAGE 99 Amplifiers From Wafer Lots VDD = ± V Percentage of Amplifiers % Percentage of Amplifiers % VIO Input Offset Voltage mv VIO Input Offset Voltage mv Figure Figure POST OFFICE BOX DALLAS, TEXAS 7

6 TYPICAL CHARACTERISTICS TLC7x, TLC7xA SLOS9E FEBRUARY 997 REVISED MARCH VIO V Input Offset Voltage mv.. RS = Ω INPUT OFFSET VOLTAGE COMMON-MODE VOLTAGE VIO V Input Offset Voltage mv.. VDD = ± V RS = Ω INPUT OFFSET VOLTAGE COMMON-MODE VOLTAGE VIC Common-Mode Voltage V Figure VIC Common-Mode Voltage V Figure Percentage of Amplifiers % DISTRIBUTION OF TLC7 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT 8 Amplifiers From Wafer Lots VDD = ±. V P Package C to C Percentage of Amplifiers % DISTRIBUTION OF TLC7 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT 8 Amplifiers From Wafer Lots VDD = ± V P Package C to C αvio Temperature Coefficient µv/ C Figure 7 αvio Temperature Coefficient µv/ C Figure 8 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX DALLAS, TEXAS 7

7 TLC7x, TLC7xA SLOS9E FEBRUARY 997 REVISED MARCH TYPICAL CHARACTERISTICS Percentage of Amplifiers % DISTRIBUTION OF TLC7 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT 8 Amplifiers From Wafer Lots VDD = ±. V N Package to C Percentage of Amplifiers % DISTRIBUTION OF TLC7 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT 8 Amplifiers From Wafer Lots VDD = ±. V N Package to C αvio Temperature Coefficient µv/ C Figure 9 αvio Temperature Coefficient µv/ C Figure IIB I IB and IIO Input Bias and Input Offset Currents pa INPUT BIAS AND INPUT OFFSET CURRENT VDD = ±. V VIC = VO = RS = Ω 8 Figure IIB IIO V VI I Input Voltage Range V 8 8 RS = Ω INPUT VOLTAGE RANGE SUPPLY VOLTAGE VIO mv 7 8 VDD ± Supply Voltage V Figure Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX DALLAS, TEXAS 7

8 TYPICAL CHARACTERISTICS TLC7x, TLC7xA SLOS9E FEBRUARY 997 REVISED MARCH INPUT VOLTAGE RANGE HIGH-LEVEL OUTPUT VOLTAGE HIGH-LEVEL OUTPUT CURRENT V VI I Input Voltage Range V VIO mv V VH OH High-Level Output Voltage V TA = C TA = C 7 7 Figure IOH High-Level Output Current ma Figure VOL V OL Low-Level Output Voltage V LOW-LEVEL OUTPUT VOLTAGE LOW-LEVEL OUTPUT CURRENT VIC = VIC =. V VIC =. V VOL V OL Low-Level Output Voltage V LOW-LEVEL OUTPUT VOLTAGE LOW-LEVEL OUTPUT CURRENT VIC =. V TA = C TA = C IOL Low-Level Output Current ma Figure IOL Low-Level Output Current ma Figure Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX DALLAS, TEXAS 7

9 TLC7x, TLC7xA SLOS9E FEBRUARY 997 REVISED MARCH TYPICAL CHARACTERISTICS MAXIMUM POSITIVE PEAK OUTPUT VOLTAGE OUTPUT CURRENT MAXIMUM NEGATIVE PEAK OUTPUT VOLTAGE OUTPUT CURRENT Maximum Positive Peak Output Voltage V TA = C TA = C VDD ± = ± V Maximum Negative Peak Output Voltage V VDD = ± V VIC = TA = C TA = C V OM + V OM IO Output Current ma IO Output Current ma Figure 7 Figure 8 MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE SHORT-CIRCUIT OUTPUT CURRENT SUPPLY VOLTAGE V(OPP) O(PP) Maximum Peak-to-Peak Output Voltage V k k M RL = kω VDD = ± V M IOS Short-Circuit Output Current ma I 8 VO = 8 VID = mv VID = mv 7 8 VDD ± Supply Voltage V Figure 9 Figure Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX DALLAS, TEXAS 7

10 TYPICAL CHARACTERISTICS TLC7x, TLC7xA SLOS9E FEBRUARY 997 REVISED MARCH IOS Short-Circuit Output Current ma I 7 SHORT-CIRCUIT OUTPUT CURRENT VID = mv VID = mv VO = VDD = ± V V O Output Voltage V OUTPUT VOLTAGE DIFFERENTIAL INPUT VOLTAGE RL = kω VIC =. V 7 7 Figure 8 8 VID Differential Input Voltage µv Figure V O Output Voltage V OUTPUT VOLTAGE DIFFERENTIAL INPUT VOLTAGE VDD = ± V RL = kω VIC = ÁÁAVD Large-Signal Differential Voltage Amplification db ÁÁ LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION LOAD RESISTANCE VO = ± V VDD = ± V 7 7 VID Differential Input Voltage µv Figure.. RL Load Resistance kω Figure Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX DALLAS, TEXAS 7

11 TLC7x, TLC7xA SLOS9E FEBRUARY 997 REVISED MARCH TYPICAL CHARACTERISTICS LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE MARGIN AVD A VD Large-Signal Differential Voltage Amplification db ÁÁ ÁÁ 8 RL = kω CL = pf 8 9 φ om m Phase Margin 9 k k k M M Figure LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE MARGIN AVD A VD Large-Signal Differential Voltage Amplification db ÁÁ ÁÁ 8 VDD = ± V RL = kω CL = pf 8 9 φ om m Phase Margin 9 k k k M M Figure POST OFFICE BOX DALLAS, TEXAS 7

12 TYPICAL CHARACTERISTICS TLC7x, TLC7xA SLOS9E FEBRUARY 997 REVISED MARCH LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION k VIC =. V VO = to V k VDD = ± V VIC = VO = ± V AVD A VD Large-Signal Differential Voltage Amplification V/mV ÁÁ RL = MΩ RL = kω ÁÁAVD Large-Signal Differential Voltage Amplification V/mV RL = MΩ RL = kω 7 7 Figure Figure 8 OUTPUT IMPEDANCE VDD = ± V OUTPUT IMPEDANCE zo Output Impedance Ω O AV = AV = AV = zo Output Impedance Ω O AV = AV = AV =. k k k M Figure 9. k k k M Figure Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX DALLAS, TEXAS 7 7

13 TLC7x, TLC7xA SLOS9E FEBRUARY 997 REVISED MARCH TYPICAL CHARACTERISTICS CMRR Common-Mode Rejection Ratio db 8 COMMON-MODE REJECTION RATIO VDD = ± V CMRR Common-Mode Rejection Ratio db COMMON-MODE REJECTION RATIO VIC = V to.7 V VIC = to.7 V VDD = ± V k k k M M Figure Figure ksvr Supply-Voltage Rejection Ratio db 8 SUPPLY-VOLTAGE REJECTION RATIO ksvr ksvr+ ksvr Supply-Voltage Rejection Ratio db 8 SUPPLY-VOLTAGE REJECTION RATIO ksvr VDD = ± V ksvr+ k k k M M Figure k k k M M Figure 8 POST OFFICE BOX DALLAS, TEXAS 7

14 TYPICAL CHARACTERISTICS TLC7x, TLC7xA SLOS9E FEBRUARY 997 REVISED MARCH SUPPLY VOLTAGE REJECTION RATIO TLC7 SUPPLY CURRENT SUPPLY VOLTAGE ksvr Supply Voltage Rejection Ratio db 9 9 VDD ± = ±. V to ±8 V VO = I IDD Supply Current ma..8.. VO = No Load TA = C TA = C VDD ± Supply Voltage V Figure Figure VO = No Load TLC7 SUPPLY CURRENT SUPPLY VOLTAGE VDD = ± V VO = TLC7 SUPPLY CURRENT.8. I IDD Supply Current ma... TA = C TA = C IDD Supply Current ma.8.. VO =. V 7 8 VDD ± Supply Voltage V Figure Figure 8 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX DALLAS, TEXAS 7 9

15 TLC7x, TLC7xA SLOS9E FEBRUARY 997 REVISED MARCH TYPICAL CHARACTERISTICS.8 VDD = ± V VO = TLC7 SUPPLY CURRENT SLEW RATE LOAD CAPACITANCE AV = I IDD Supply Current ma... VO =. V µ s SR Slew Rate V/ SR + SR 7 7 Figure 9 k CL Load Capacitance pf Figure k µs SR Slew Rate V/ SLEW RATE SR + SR RL = kω CL = pf AV = 7 7 VO V O Output Voltage mv INVERTING LARGE-SIGNAL PULSE RESPONSE t Time µs RL = kω CL = pf AV = Figure Figure Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX DALLAS, TEXAS 7

16 TYPICAL CHARACTERISTICS TLC7x, TLC7xA SLOS9E FEBRUARY 997 REVISED MARCH INVERTING LARGE-SIGNAL PULSE RESPONSE VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE V VO O Output Voltage V VDD = ± V RL = kω CL = pf AV = VO V O Output Voltage V RL = kω CL = pf AV = t Time µs t Time µs Figure Figure VO V O Output Voltage V VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE VDD = ± V RL = kω CL = pf AV = VO O Output Voltage V. INVERTING SMALL-SIGNAL PULSE RESPONSE... RL = kω CL = pf AV =. t Time µs t Time µs Figure Figure POST OFFICE BOX DALLAS, TEXAS 7

17 TLC7x, TLC7xA SLOS9E FEBRUARY 997 REVISED MARCH TYPICAL CHARACTERISTICS VO V O Output Voltage mv INVERTING SMALL-SIGNAL PULSE RESPONSE VDD = ± V RL = kω CL = pf AV = VO V O Output Voltage V.... VOLTAGE-FOLLOWER SMALL-SIGNAL PULSE RESPONSE RL = kω CL = pf AV =... t Time µs..... t Time µs Figure 7 Figure 8 VO V O Output Voltage mv VOLTAGE-FOLLOWER SMALL-SIGNAL PULSE RESPONSE VDD = ± V RL = kω CL = pf AV = Vn Equivalent Input Noise Voltage nv/ Hz Hz EQUIVALENT INPUT NOISE VOLTAGE RS = Ω.. t Time µs k k Figure 9 Figure POST OFFICE BOX DALLAS, TEXAS 7

18 TYPICAL CHARACTERISTICS TLC7x, TLC7xA SLOS9E FEBRUARY 997 REVISED MARCH Vn Equivalent Input Noise Voltage nv/ Hz Hz EQUIVALENT INPUT NOISE VOLTAGE VDD = ± V RS = Ω Noise Voltage nv 7 7 NOISE VOLTAGE OVER A SECOND PERIOD f =. to Hz k k t Time s 8 Figure Figure Integrated Noise Voltage uvrms µ V RMS INTEGRATED NOISE VOLTAGE Calculated Using Ideal Pass-Band Filter Lower Frequency = Hz TA= C. k k k THD + N Total Harmonic Distortion Plus Noise %. TOTAL HARMONIC DISTORTION PLUS NOISE RL = kω.. AV = AV = AV =. k k k Figure Figure POST OFFICE BOX DALLAS, TEXAS 7

19 TLC7x, TLC7xA SLOS9E FEBRUARY 997 REVISED MARCH TYPICAL CHARACTERISTICS GAIN-BANDWIDTH PRODUCT SUPPLY VOLTAGE GAIN-BANDWIDTH PRODUCT Gain-Bandwidth Product MHz..... f = khz RL = kω CL = pf Gain-Bandwidth Product MHz f = khz RL = kω CL = pf. 7 8 VDD ± Supply Voltage V Figure. 7 7 Figure PHASE MARGIN LOAD CAPACITANCE GAIN MARGIN LOAD CAPACITANCE 7 VDD = ± V Rnull = Ω AV = RL = kω φ om m Phase Margin Rnull = Ω Rnull = Ω Gain Margin db 9 kω VI kω VDD + R null Rnull = CL VDD Rnull = Ω CL Load Capacitance pf CL Load Capacitance pf Figure 7 Figure 8 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX DALLAS, TEXAS 7

20 APPLICATION INFORMATION TLC7x, TLC7xA SLOS9E FEBRUARY 997 REVISED MARCH macromodel information Macromodel information provided was derived using Microsim Parts, the model generation software used with Microsim PSpice. The Boyle macromodel (see Note ) and subcircuit in Figure 9 were generated using the TLC7x typical electrical and operating characteristics at T A = C. Using this information, output simulations of the following key parameters can be generated to a tolerance of % (in most cases): Maximum positive output voltage swing Maximum negative output voltage swing Slew rate Quiescent power dissipation Input bias current Open-loop voltage amplification Unity gain frequency Common-mode rejection ratio Phase margin DC output resistance AC output resistance Short-circuit output current limit NOTE : G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, Macromodeling of Integrated Circuit Operational Amplifiers, IEEE Journal of Solid-State Circuits, SC-9, (97). VCC + RP IN IN + DP RSS ISS J J RD C RD VC DC + R EGND 9 + VB GCM 99 + FB C GA 9 RO HLIM 7 + VLIM 8 + DIP DIN VIP VIN + VCC VAD + + VE.SUBCKT TLC7x C E C 7.E DC DX DE DX DLP 9 9DX DLN 9 9DX DP DX EGND 99 POLY () (,) (,).. FB 99 POLY () VB VC VE VLP VLN E E E E E GA 77.E GCM 99 E 9 ISS DC.OE HLIM 9 VLIM K J JX J JX R 9.OE DE OUT RO RD.E RD.E R 8 R 7 99 RP.E RSS 999.9E VAD. VB 9 DC VC DC.78 VE DC.78 VLIM 7 8DC VLP 9 DC.9 VLN 9DC 9..MODEL DX D (IS=8.E 8).MODEL JX PJF (IS=.E BETA=.E- + VTO=.7).ENDS Figure 9. Boyle Macromodel and Subcircuit PSpice and Parts are trademarks of MicroSim Corporation. Macromodels, simulation models, or other models provided by TI, directly or indirectly, are not warranted by TI as fully representing all of the specification and operating characteristics of the semiconductor product to which the model relates. POST OFFICE BOX DALLAS, TEXAS 7