AVAILABLE OPTIONS CERAMIC DIP (J) CERAMIC DIP (JG) TL071CPWLE 6 mv TL071ACD TL071ACP 3 mv TL071BCD TL071BCP TL072CP

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1 Low Power Consumption Wide Common-Mode and Differential Voltage Ranges Low Input Bias and Offset Currents Output Short-Circuit Protection Low Total Harmonic Distortion.3% Typ TL7, TL7A, TL7B, TL72 Low Noise V n = 8 nv/ Hz Typ at f = khz High Input Impedance...JFET Input Stage Internal Frequency Compensation Latch-Up-Free Operation High Slew Rate...3 V/µs Typ Common-Mode Input Voltage Range Includes V CC description The JFET-input operational amplifiers in the TL7_ series are designed as low-noise versions of the TL8_ series amplifiers with low input bias and offset currents and fast slew rate. The low harmonic distortion and low noise make the TL7_ series ideally suited for high-fidelity and audio preamplifier applications. Each amplifier features JFET inputs (for high input impedance) coupled with bipolar output stages integrated on a single monolithic chip. The C-suffix devices are characterized for operation from C to 7 C. The I-suffix devices are characterized for operation from C to 85 C. The M-suffix devices are characterized for operation over the full military temperature range of 55 C to 25 C. TA C to 7 C C to 85 C 55 C to 25 C VIOmax AT 25 C SMALL OUTLINE (D) CHIP CARRIER (FK) CERAMIC DIP (J) AVAILABLE OPTIONS CERAMIC DIP (JG) PACKAGE PLASTIC DIP (N) PLASTIC DIP (P) TSSOP PACKAGE (PW) FLAT PACKAGE (W) mv TL7CD TL7CP TL7CPWLE 6 mv TL7ACD TL7ACP 3 mv TL7BCD TL7BCP mv TL72CD TL72CP TL72CPWLE 6 mv TL72ACD TL72ACP 3 mv TL72BCD TL72BCP mv TL7CD TL7CN TL7CPWLE 6 mv TL7ACD TL7ACN 3 mv TL7BCD TL7BCN 6 mv TL7ID TL7IP TL72ID TL72IP TL7ID TL7IN 6 mv TL7MFK TL7MJG 6 mv TL72MFK TL72MJG TL72MP 9 mv TL7MFK TL7MJ TL7MN TL7MW The D package is available taped and reeled. Add the suffix R to the device type (e.g., TL7CDR). The PW package is only available left-ended taped and reeled (e.g., TL72CPWLE). Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 996, Texas Instruments Incorporated POST OFFICE BOX DALLAS, TEXAS 75265

2 TL7, TL7A, TL7B, TL72 OFFSET N IN IN V CC TL7, TL7A, TL7B D, JG, P, OR PW PACKAGE (TOP VIEW) V CC OUT OFFSET N2 TL72, TL72A, TL72B D, JG, P, OR PW PACKAGE (TOP VIEW) OUT IN IN V CC V CC 2OUT 2IN 2IN TL7, TL7A, TL7B D, J, N, OR PW PACKAGE TL7...W PACKAGE (TOP VIEW) OUT IN IN V CC 2IN 2IN 2OUT OUT IN IN V CC 3IN 3IN 3OUT TL7 FK PACKAGE (TOP VIEW) TL72 FK PACKAGE (TOP VIEW) TL7 FK PACKAGE (TOP VIEW) IN IN OFFSET N VCC OFFSET N2 V CC OUT IN IN OUT VCC VCC 2IN 2OUT 2IN IN V CC 2IN 2IN IN 2OUT OUT 3OUT OUT 3IN IN IN V CC 3IN No internal connection symbols TL7 OFFSET N TL72 (each amplifier) TL7 (each amplifier) IN IN OUT IN IN OUT OFFSET N2 2 POST OFFICE BOX DALLAS, TEXAS 75265

3 TL7, TL7A, TL7B, TL72 schematic (each amplifier) VCC IN IN 6 Ω 28 Ω OUT 6 Ω C 8 pf 8 Ω 8 Ω VCC OFFSET NULL (N) OFFSET NULL (N2) TL7 Only All component values shown are nominal. COMPONENT COUNT COMPONENT TYPE TL7 TL72 TL7 Resistors 22 Transistors JFET 2 6 Diodes 2 Capacitors 2 epi-fet 2 Includes bias and trim circuitry POST OFFICE BOX DALLAS, TEXAS

4 TL7, TL7A, TL7B, TL72 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, V CC (see Note ) V Supply voltage, V CC (see Note ) V Differential input voltage, V ID (see Note 2) ±3 V Input voltage, V I (see Notes and 3) ±5 V Duration of output short circuit (see Note ) unlimited Continuous total power dissipation See Dissipation Rating Table Operating free-air temperature range, T A : C suffix C to 7 C I suffix C to 85 C M suffix C to 25 C Storage temperature range C to 5 C Case temperature for 6 seconds: FK package C Lead temperature,6 mm (/6 inch) from case for seconds: J, JG, or W package C Lead temperature,6 mm (/6 inch) from case for seconds: D, N, P, or PW package C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES:. All voltage values, except differential voltages, are with respect to the midpoint between VCC and VCC. 2. Differential voltages are at IN with respect to IN. 3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 5 V, whichever is less.. The output may be shorted to ground or to either supply. Temperature and /or supply voltages must be limited to ensure that the dissipation rating is not exceeded. PACKAGE TA 25 C POWER RATING DERATING FACTOR DISSIPATION RATING TABLE DERATE ABOVE TA TA = 7 C POWER RATING TA = 85 C POWER RATING POWER RATING D (8 pin) 68 mw 5.8 mw/ C 33 C 65 mw 378 mw N/A D ( pin) 68 mw 7.6 mw/ C 6 C 6 mw 9 mw N/A FK 68 mw. mw/ C 88 C 68 mw 68 mw 273 mw J 68 mw. mw/ C 88 C 68 mw 68 mw 273 mw JG 68 mw 8. mw/ C 69 C 672 mw 56 mw 2 mw N 68 mw 9.2 mw/ C 76 C 68 mw 597 mw N/A P 68 mw 8. mw/ C 65 C 6 mw 52 mw N/A PW (8 pin) 525 mw.2 mw/ C 7 C 525 mw N/A N/A PW ( pin) 7 mw 5.6 mw/ C 7 C 7 mw N/A N/A W 68 mw 8. mw/ C 65 C 6 mw 52 mw 2 mw POST OFFICE BOX DALLAS, TEXAS 75265

5 electrical characteristics, V CC± = ±5 V (unless otherwise noted) TL7C TL7AC TL7BC TL7I TL72C TL72AC TL72BC TL72I PARAMETER TEST CONDITIONS TA TL7C TL7AC TL7BC TL7I UNIT MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX 25 C VIO Input offset voltage VO =, RS =5Ω Ω mv Full range POST OFFICE BOX DALLAS, TEXAS αvio Temperature coefficient of input offset voltage IIO Input offset current VO = IIB Input bias current VO = VICR VOM AVD B Common-modemode input voltage range Maximum peak output voltage swing VO =, RS = 5 Ω Full range µv/ C 25 C pa Full range na 25 C pa Full range na 25 C ± to ± to ± to ± to RL = kω 25 C ±2 ±3.5 ±2 ±3.5 ±2 ±3.5 ±2 ±3.5 RL kω RL 2 kω Large-signal differential voltage VO = ± V, RL 2 kω amplification Unity-gain bandwidth Full range ±2 ±2 ±2 ±2 V ± ± ± ± 25 C Full range V V/mV 25 C MHz ri Input resistance 25 C Ω CMRR ksvr ICC Common-mode VIC = VICRmin, rejection ratio VO =, RS = 5 Ω Supply-voltage rejection ratio ( VCC ±/ VIO) Supply current (each amplifier) VCC = ±9 V to ±5 V, VO =, RS = 5 Ω 25 C db 25 C db VO =, No load 25 C ma VO/VO2 Crosstalk attenuation AVD = 25 C db All characteristics are measured under open-loop conditions with zero common-mode voltage unless otherwise specified. Full range is TA = C to 7 C for TL7_C,TL7_AC, TL7_BC and is TA = C to 85 C for TL7_I. Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive as shown in Figure. Pulse techniques must be used that maintain the junction temperature as close to the ambient temperature as possible. TL7, TL7A, TL7B, TL72

6 TL7, TL7A, TL7B, TL72 electrical characteristics, V CC± = ±5 V (unless otherwise noted) TL7M PARAMETER TEST CONDITIONS TA TL72M TL7M A MIN TYP MAX MIN TYP MAX 25 C VIO Input offset voltage VO =, RS =5Ω Ω mv Full range 9 5 αvio Temperature coefficient of input offset voltage IIO Input offset current VO = IIB Input bias current VO = VICR VOM AVD Common-mode input voltage range Maximum peak output t voltage swing Large-signal g differential voltage amplification UNIT VO =, RS = 5 Ω Full range 8 8 µv/ C 25 C 5 5 pa Full range 2 2 na 25 C pa 25 C ± 2 to na RL = kω 25 C ±2 ±3.5 ±2 ±3.5 RL kω RL 2 kω VO = ± V, RL 2kΩ Full range ± 2 to 5 ±2 ±2 V ± ± 25 C B Unity-gain bandwidth 3 3 MHz ri Input resistance 2 2 Ω CMRR Common-mode rejection VIC = VICRmin, ratio VO =, RS = 5 Ω Supply-voltage rejection VCC = ±9 V to ±5 V, ksvr ratio ( VCC ±/ VIO) VO =, RS = 5 Ω ICC Supply current (each amplifier) V V/mV 25 C db 25 C db VO =, No load 25 C ma VO/VO2 Crosstalk attenuation AVD = 25 C 2 2 db Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive as shown in Figure. Pulse techniques must be used that will maintain the junction temperature as close to the ambient temperature as possible. All characteristics are measured under open-loop conditions with zero common-mode voltage unless otherwise specified. Full range is TA = 55 C to 25 C. 6 POST OFFICE BOX DALLAS, TEXAS 75265

7 operating characteristics, V CC± = ±5 V, T A = 25 C TL7, TL7A, TL7B, TL72 SR tr Vn In THD PARAMETER Slew rate at unity gain VI = V, CL = pf, TEST CONDITIONS, See Figure TL7xM ALL OTHERS MIN TYP MAX MIN TYP MAX UNIT V/µs Rise time overshoot VI = 2 mv,,,.. µs factor CL = pf, See Figure 2% 2% Equivalent input noise voltage Equivalent input noise current Total harmonic distortion RS =2Ω Ω f = khz 8 8 nv/ Hz f = Hz to khz µv RS = 2 Ω, f = khz.. pa/ Hz VIrms = 6 V, RL 2 kω, f = khz AVD =, RS kω,.3%.3% PARAMETER MEASUREMENT INFORMATION kω VI CL = pf VO VI kω RL VO CL = pf Figure. Unity-Gain Amplifier Figure 2. Gain-of- Inverting Amplifier IN IN TL7 N kω N2 OUT.5 kω VCC Figure 3. Input Offset Voltage Null Circuit POST OFFICE BOX DALLAS, TEXAS

8 TL7, TL7A, TL7B, TL72 TYPICAL CHARACTERISTICS Table of Graphs FIGURE IIB Input bias current Free-air temperature VOM AVD Maximum output voltage Large-signal differential voltage amplification Frequency 5, 6, 7 Free-air temperature 8 Load resistance 9 Supply voltage Free-air temperature Frequency 2 Phase shift Frequency 2 Normalized unity-gain bandwidth Free-air temperature 3 Normalized phase shift Free-air temperature 3 CMRR Common-mode rejection ratio Free-air temperature ICC Supply current Supply voltage 5 Free-air temperature 6 PD Total power dissipation Free-air temperature 7 Normalized slew rate Free-air temperature 8 Vn Equivalent input noise voltage Frequency 9 THD Total harmonic distortion Frequency 2 Large-signal pulse response Time 2 VO Output voltage Elapsed time 22 8 POST OFFICE BOX DALLAS, TEXAS 75265

9 TL7, TL7A, TL7B, TL72 TYPICAL CHARACTERISTICS IIB Input Bias Current na. VCC± = ±5 V INPUT BIAS CURRENT FREE-AIR TEMPERATURE VOM V OM Maximum Peak Output Voltage V ±5 ±2.5 ± ±7.5 ±5 ±2.5 MAXIMUM PEAK OUTPUT VOLTAGE FREQUEY VCC ± = ±5 V ÎÎÎÎÎ VCC ± = ± V VCC ± = ±5 V RL = kω See Figure TA Free-Air Temperature C Figure k k k M M f Frequency Hz Figure 5 VOM V Maximum Peak Output Voltage V ±5 ±2.5 ± ±7.5 ±5 ±2.5 MAXIMUM PEAK OUTPUT VOLTAGE FREQUEY ÎÎÎÎÎ VCC ± = ±5 V VCC ± = ± V VCC ± = ±5 V See Figure 2 VOM V Maximum Peak Output Voltage V ±5 ±2.5 ± ±7.5 ±5 ±2.5 MAXIMUM PEAK OUTPUT VOLTAGE FREQUEY ÎÎÎÎ ÎÎÎÎ TA = 55 C VCC ± = ±5 V See Figure 2 k k k f Frequency Hz M M k k k k M M M f Frequency Hz Figure 6 Figure 7 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX DALLAS, TEXAS

10 TL7, TL7A, TL7B, TL72 TYPICAL CHARACTERISTICS VOM V Maximum Peak Output Voltage V ±5 ±2.5 ± ±7.5 ±5 ± MAXIMUM PEAK OUTPUT VOLTAGE FREE-AIR TEMPERATURE VCC ± = ±5 V See Figure 2 RL = kω ÎÎÎÎ VOM V Maximum Peak Output Voltage V ±5 ±2.5 ± ±7.5 ±5 ±2.5. MAXIMUM PEAK OUTPUT VOLTAGE LOAD RESISTAE VCC ± = ±5 V See Figure TA Free-Air Temperature C RL Load Resistance kω Figure 8 Figure 9 VOM V OM Maximum Peak Output Voltage V ±5 ±2.5 ± ±7.5 ±5 ±2.5 MAXIMUM PEAK OUTPUT VOLTAGE SUPPLY VOLTAGE RL = kω A AVD Large-Signal Differential Voltage Amplification V/mV LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION FREE-AIR TEMPERATURE VCC ± = ±5 V VO = ± V VCC ± Supply Voltage V TA Free-Air Temperature C Figure Figure Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX DALLAS, TEXAS 75265

11 A AVD Large-Signal Differential Voltage Amplification TL7, TL7A, TL7B, TL72 TYPICAL CHARACTERISTICS LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE SHIFT FREQUEY Phase Shift VCC± = ±5 V to ±5 V Differential Voltage Amplification Phase Shift k k k M f Frequency Hz Figure 2 8 M.3 NORMALIZED UNITY-GAIN BANDWIDTH AND PHASE SHIFT FREE-AIR TEMPERATURE.3 Normalized Unity-Gain Bandwidth.2 Unity-Gain Bandwidth Phase Shift VCC ± = ±5 V f = B for Phase Shift TA Free-Air Temperature C Figure Normalized Phase Shift Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX DALLAS, TEXAS 75265

12 TL7, TL7A, TL7B, TL72 TYPICAL CHARACTERISTICS CMRR Common-Mode Rejection Ratio db COMMON-MODE REJECTION RATIO FREE-AIR TEMPERATURE VCC ± = ±5 V RL = kω ICC ICC ± Supply Current Per Amplifier ma SUPPLY CURRENT PER AMPLIFIER SUPPLY VOLTAGE No Signal No Load TA Free-Air Temperature C VCC ± Supply Voltage V 6 Figure Figure 5 ICC ICC ± Supply Current Per Amplifier ma SUPPLY CURRENT PER AMPLIFIER FREE-AIR TEMPERATURE VCC ± = ±5 V No Signal No Load PD P D Total Power Dissipation mw TOTAL POWER DISSIPATION FREE-AIR TEMPERATURE ÎÎÎ TL72 TL7 VCC ± = ±5 V No Signal No Load TL TA Free-Air Temperature C TA Free-Air Temperature C 25 Figure 6 Figure 7 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 2 POST OFFICE BOX DALLAS, TEXAS 75265

13 TL7, TL7A, TL7B, TL72 TYPICAL CHARACTERISTICS Normalized Slew Rate V/µ s VCC ± = ±5 V CL = pf NORMALIZED SLEW RATE FREE-AIR TEMPERATURE 5 V Vn n Equivalent Input Noise Voltage nv/hz Hz 3 2 EQUIVALENT INPUT NOISE VOLTAGE FREQUEY VCC ± = ±5 V AVD = RS = 2 Ω TA Free-Air Temperature C 25 k k k k k f Frequency Hz Figure 8 Figure 9 THD Total Harmonic Distortion %..... TOTAL HARMONIC DISTORTION FREQUEY VCC ± = ±5 V AVD = VI(RMS) = 6 V V I and V O Input and Output Voltages V VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE Output ÎÎÎ Input VCC ± = ±5 V CL = pf. k k k k k f Frequency Hz t Time µs 3.5 Figure 2 Figure 2 POST OFFICE BOX DALLAS, TEXAS

14 TL7, TL7A, TL7B, TL72 TYPICAL CHARACTERISTICS 28 OUTPUT VOLTAGE ELAPSED TIME V VO O Output Voltage mv Overshoot % 9% tr VCC ± = ±5 V t Elapsed Time µs.7 Figure 22 POST OFFICE BOX DALLAS, TEXAS 75265

15 TL7, TL7A, TL7B, TL72 APPLICATION INFORMATION Table of Application Diagrams APPLICATION DIAGRAM PART NUMBER FIGURE.5-Hz square-wave oscillator TL7 23 High-Q notch filter TL7 2 Audio-distribution amplifier TL7 25 -khz quadrature oscillator TL72 26 AC amplifier TL7 27 RF = kω VCC CF = 3.3 µf f 2 R F C F 3.3 kω 5 V TL7 5 V 3.3 kω kω 9. kω Output Input R C R2 C3 VCC R3 C2 TL7 Output R R2 2R3.5 M pf C C2 C3 2 f O 2 R C khz Figure Hz Square-Wave Oscillator Figure 2. High-Q Notch Filter VCC MΩ VCC TL7 Output A VCC Input µf TL7 VCC kω VCC kω TL7 Output B µf kω kω VCC VCC VCC TL7 Output C VCC Figure 25. Audio-Distribution Amplifier POST OFFICE BOX DALLAS, TEXAS

16 TL7, TL7A, TL7B, TL72 APPLICATION INFORMATION 8 pf 6 sin ωt N8 8 pf kω 8 kω (see Note A) 5 V VCC 88. kω 8 pf TL72 VCC 88. kω TL72 VCC VCC kω 6 cos ωt N8 8 kω (see Note A) 5 V 88. kω NOTE A: These resistor values may be adjusted for a symmetrical output. Figure 26. -khz Quadrature Oscillator VCC. µf kω IN kω MΩ 5 Ω TL7 OUT IN N2. µf kω N kω Figure 27. AC Amplifier 6 POST OFFICE BOX DALLAS, TEXAS 75265

17 IMPORTANT NOTICE Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied on is current. TI warrants performance of its semiconductor products and related software to the specifications applicable at the time of sale in accordance with TI s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Certain applications using semiconductor products may involve potential risks of death, personal injury, or severe property or environmental damage ( Critical Applications ). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. Inclusion of TI products in such applications is understood to be fully at the risk of the customer. Use of TI products in such applications requires the written approval of an appropriate TI officer. Questions concerning potential risk applications should be directed to TI through a local SC sales office. In order to minimize risks associated with the customer s applications, adequate design and operating safeguards should be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Nor does TI warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. Copyright 996, Texas Instruments Incorporated

AVAILABLE OPTIONS CERAMIC DIP (J) CERAMIC DIP (JG) TL071CPWLE 6 mv TL071ACD TL071ACP 3 mv TL071BCD TL071BCP TL072CP

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