TL05x, TL05xA ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS

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1 TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 Direct Upgrades TL7x and TL8x BiFET Operational Amplifiers Faster Slew Rate (2 V/µs Typ) Without Increased Power Consumption On-Chip Offset-Voltage Trimming for Improved DC Performance and Precision Grades Are Available (1.5 mv, TL51A) TL51 D OR P PACKAGE (TOP VIEW) TL52 D, P, OR PS PACKAGE (TOP VIEW) TL5 D, DB, N, OR NS PACKAGE (TOP VIEW) OFFSET N1 IN IN V CC NC V CC OUT OFFSET N2 1OUT 1IN 1IN V CC V CC 2OUT 2IN 2IN 1OUT 1IN 1IN V CC 2IN 2IN 2OUT OUT IN IN V CC 3IN 3IN 3OUT description/ordering information The TL5x series of JFET-input operational amplifiers offers improved dc and ac characteristics over the TL7x and TL8x families of BiFET operational amplifiers. On-chip Zener trimming of offset voltage yields precision grades as low as 1.5 mv (TL51A) for greater accuracy in dc-coupled applications. Texas Instruments improved BiFET process and optimized designs also yield improved bandwidth and slew rate without increased power consumption. The TL5x devices are pin-compatible with the TL7x and TL8x and can be used upgrade existing circuits or for optimal performance in new designs. BiFET operational amplifiers offer the inherently higher input impedance of the JFET-input transisrs, without sacrificing the output drive associated with bipolar amplifiers. This makes them better suited for interfacing with high-impedance sensors or very low-level ac signals. They also feature inherently better ac response than bipolar or CMOS devices having comparable power consumption. The TL5x family was designed offer higher precision and better ac response than the TL8x, with the low noise floor of the TL7x. Designers requiring significantly faster ac response or ensured lower noise should consider the Excalibur TLE28x and TLE27x families of BiFET operational amplifiers. Because BiFET operational amplifiers are designed for use with dual power supplies, care must be taken observe common-mode input voltage limits and output swing when operating from a single supply. DC biasing of the input signal is required, and loads should be terminated a virtual-ground node at mid-supply. Texas Instruments TLE226 integrated virtual ground generar is useful when operating BiFET amplifiers from single supplies. The TL5x are fully specified at ±15 V and ±5 V. For operation in low-voltage and/or single-supply systems, Texas Instruments LinCMOS families of operational amplifiers (TLC-prefix) are recommended. When moving from BiFET CMOS amplifiers, particular attention should be paid the slew rate and bandwidth requirements, and also the output loading. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconducr products and disclaimers there appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 23, Texas Instruments Incorporated POST OFFICE BOX DALLAS, TEXAS

2 TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 ORDERING INFORMATION TA VIOmax AT 25 C PACKAGE ORDERABLE PART NUMBER TOP-SIDE MARKING C 7 C TL51ACP TL51ACP PDIP (P) Tube of 5 TL52ACP TL52ACP 8 µv Tube of 75 TL51ACD 51AC 1.5 mv SOIC (D) Tube of 75 TL52ACD Reel of 25 PDIP (P) Tube of 5 TL52ACDR TL51CP TL52CP 52AC TL51CP TL52CP PDIP (N) Tube of 25 TL5ACN TL5ACN SOIC (D) mv SOIC (D) 8 µv C 85 C 15mV 1.5 mv Tube of 75 Reel of 25 Tube of 75 Reel of 25 Tube of 5 Reel of 25 TL51CD TL51CDR TL52CD TL52CDR TL5ACD TL5ACDR TL51C TL52C TL5C SOP (PS) Reel of 2 TL52CPSR TL52 SSOP (DB) Reel of 2 TL5CDBR TL5 PDIP (N) Tube of 25 TL5CN TL5CN Tube of 5 Reel of 25 TL5CD TL5CDR TL5C SOP (NS) Reel of 2 TL5CNSR TL5 PDIP (P) Tube of 5 TL52AIP TL52AI SOIC (D) Tube of 75 Reel of 25 TL52AID TL52AIDR 52AI PDIP (N) Tube of 25 TL5AIN TL5AIN PDIP (P) Tube of 5 TL51IP TL52IP TL51IP TL52IP Tube of 75 TL51ID TL51I Tube of 75 TL52ID SOIC (D) Reel of 25 TL52IDR Tube of 5 Reel of 25 TL5AID TL5AIDR TL52I TL5AI PDIP (N) Tube of 25 TL5IN TL5IN SOIC (D) Tube of 5 Reel of 25 TL5ID TL5IDR TL5I Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at 2 POST OFFICE BOX DALLAS, TEXAS 75265

3 TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 symbol (each amplifier) IN IN OUT equivalent schematic (each amplifier) VCC Q1 Q2 Q3 Q7 Q15 JF3 Q6 Q16 Q11 Q13 See Note A IN IN JF1 OFFSET N1 OFFSET N2 R1 Q1 Q R2 R3 Q5 JF2 D1 C1 Q8 R R5 Q9 R6 Q12 R8 R7 R9 Q1 Q17 R1 D2 OUT VCC NOTE A: OFFSET N1 and OFFSET N2 are available only on the TL51x. ACTUAL DEVICE COMPONENT COUNT COMPONENT TL51 TL52 TL5 Transisrs Resisrs Diodes Capacirs 1 2 These figures include all four amplifiers and all ESD, bias, and trim circuitry. POST OFFICE BOX DALLAS, TEXAS

4 TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, V CC (see Note 1) V Supply voltage, V CC (see Note 1) V Differential input voltage (see Note 2) ±3 V Input voltage range, V I (any input, see Notes 1 and 3) ±15 V Input current, I I (each input) ±1 ma Output current, I O (each output) ±8 ma Total current in V CC ma Total current out of V CC ma Duration of short-circuit current at (or below) 25 C Unlimited Package thermal impedance, θ JA (see Notes and 5): D package (8 pin) C/W D package (1 pin) C/W DB package (1 pin) C/W N package (1 pin) C/W NS package (1 pin) C/W P package (8 pin) C/W PS package (8 pin) C/W Operating virtual junction temperature, T J C Lead temperature 1,6 mm (1/16inch) from case for 1 seconds C Srage temperature range C 15 C Stresses beyond those listed under absolute maximum ratings may cause permanent damage the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect the midpoint between VCC and VCC. 2. Differential voltages are at IN with respect IN. 3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less.. Maximum power dissipation is a function of TJ(max), θ JA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) TA)/θ JA. Operating at the absolute maximum TJ of 15 C can impact reliability. 5. The package thermal impedance is calculated in accordance with JESD recommended operating conditions C SUFFIX I SUFFIX UNIT MIN MAX MIN MAX VCC± Supply voltage ±5 ±15 ±5 ±15 V VIC Common-mode mode input voltage VCC± = ±5 V TA Operating free-air temperature 7 85 C V POST OFFICE BOX DALLAS, TEXAS 75265

5 TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 TL51C and TL51AC electrical characteristics at specified free-air temperature VIO IIO IIB TL51C, TL51AC PARAMETER TEST CONDITIONS TA VCC± = ±5 V UNIT Input offset voltage Temperature coefficient V IO of input offset voltage VICR VOM VOM AVD Input offset-voltage long-term drift Input offset current Input bias current Common-mode input voltage range Maximum positive peak output voltage swing Maximum negative peak output voltage swing Large-signal differential voltage amplification VO =, VIC =, RS = 5 Ω TL51C TL51AC TL51C TL51AC MIN TYP MAX MIN TYP MAX 25 C Full range C Full range C 7 C 25 C 7 C mv µv/ C 25 C.. µv/mo VO O =, VIC =, 25 C pa See Figure 5 7 C na VO O =, VIC =, 25 C pa See Figure 5 7 C.15.2 na RL =1kΩ RL =2kΩ RL =1kΩ RL =2kΩ 25 C Full range C Full range C Full range C Full range C Full range C C V/mV 7 C ri Input resistance 25 C Ω ci Input capacitance 25 C 1 12 pf CMRR ksvr Common-modemode VIC = VICRmin, rejection ratio VO =, RS =5Ω Ω Supply-voltage rejection ratio ( VCC±/ VIO) 25 C C db 7 C C VO =, RS = 5 Ω C db 7 C C ICC Supply current VO O =, No load C ma 7 C Full range is C 7 C. This parameter is tested on a sample basis for the TL51A. For other test requirements, please contact the facry. This statement has no bearing on testing or nontesting of other parameters. Typical values are based on the input offset-voltage shift observed through 168 hours of operating life test at TA = 15 C, extrapolated using the Arrhenius equation, and assuming an activation energy of.96 ev. For VCC± = ±5 V, VO = ±2.3 V, or for, VO = ±1 V. V V V POST OFFICE BOX DALLAS, TEXAS

6 TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 TL51C and TL51AC operating characteristics at specified free-air temperature SR SR TL51C, TL51AC PARAMETER TEST CONDITIONS TA VCC± = ±5 V UNIT MIN TYP MAX MIN TYP MAX 25 C Positive slew rate Full at unity gain , CL = 1 pf, range L V/µs See Figure 1 25 C Negative slew rate Full at unity gain range C tr Rise time C 5 55 tf Vn VN(PP) In THD B1 φm Fall time 7 C VI(PP) = ±1 mv, 25 C 55 57, C 5 56 CL = 1 pf, See Figures 1 and 2 7 C C 2 19 Overshoot facr C 2 19 % 7 C 2 19 Equivalent input noise f = 1 Hz 25 C voltage RS = 2 Ω, f = 1 khz 25 C nv/ Hz Peak--peak equivalent See Figure 3 f = 1 Hz 25 C µv input noise voltage 1 khz Equivalent input noise current Total harmonic disrtion Unity-gain bandwidth f = 1 khz 25 C.1.1 pa/ Hz RS = 1 kω, f = 1 khz, VI = 1 mv,, CL =25pF F, See Figure Phase margin at unity VI = 1 mv,, gain CL = 25 pf, See Figure 25 C.3.3 % 25 C ns C MHz 7 C C C deg 7 C Full range is C 7 C. For VCC± = ±5 V, VI(PP) = ±1 V; for, VI(PP) = ±5 V. This parameter is tested on a sample basis for the TL51A. For other test requirements, please contact the facry. This statement has no bearing on testing or nontesting of other parameters. For VCC± = ±5 V, VO(RMS) = 1 V; for, VO(RMS) = 6 V. 6 POST OFFICE BOX DALLAS, TEXAS 75265

7 TL51I and TL51AI electrical characteristics at specified free-air temperature VIO IIO IIB TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 TL51I, TL51AI PARAMETER TEST CONDITIONS TA VCC± = ±5 V UNIT A MIN TYP MAX MIN TYP MAX Input offset voltage Temperature coefficient of V IO input offset voltage VICR VOM VOM AVD Input offset-voltage long-term drift Input offset current Input bias current Common-mode input voltage range Maximum positive peak output voltage swing Maximum negative peak output voltage swing Large-signal differential voltage amplification VO =, VIC =, RS = 5 Ω TL51I TL51AI TL51I TL51AI 25 C Full range C Full range C 85 C 25 C 85 C mv µv/ C 25 C.. µv/mo VO O =, VIC =, 25 C pa See Figure 5 85 C na VO O =, VIC =, 25 C pa See Figure 5 85 C na RL =1kΩ RL =2kΩ RL =1kΩ RL =2kΩ 25 C Full range C Full range C Full range C Full range C Full range C C V/mV 85 C ri Input resistance 25 C Ω ci Input capacitance 25 C 1 12 pf CMRR ksvr Common-modemode rejection ratio Supply-voltage rejection VO =, ratio ( VCC±/ VIO) RS =5Ω Ω = 25 C VIC VICRmin, VO =, C db RS = 5 Ω 85 C C C db 85 C C ICC Supply current VO =, No load C ma 85 C Full range is C 85 C This parameter is tested on a sample basis for the TL51A. For other test requirements, please contact the facry. This statement has no bearing on testing or nontesting of other parameters. Typical values are based on the input offset-voltage shift observed through 168 hours of operating life test at TA = 15 C, extrapolated using the Arrhenius equation, and assuming an activation energy of.96 ev. For VCC± = ±5 V, VO = ±2.3 V, or for, VO = ±1 V. V V V POST OFFICE BOX DALLAS, TEXAS

8 TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 TL51I and TL51AI operating characteristics at specified free-air temperature SR SR TL51I, TL51AI PARAMETER TEST CONDITIONS TA VCC± = ±5 V UNIT MIN TYP MAX MIN TYP MAX 25 C Positive slew rate Full at unity gain 11, CL = 1 pf, range L V/µs See Figure 1 25 C Negative slew rate Full at unity gain 11 range 25 C tr Rise time C tf Vn VN(PP) In THD B1 φm Fall time 85 C 6 65 VI(PP) = ±1 mv, 25 C 55 57, Ω C CL = 1 pf, See Figures 1 and 2 85 C C 2 19 Overshoot facr C 2 19 % 85 C 2 19 Equivalent input noise f = 1 Hz 25 C voltage RS = 2 Ω, f = 1 khz 25 C nv/ Hz Peak--peak equivalent See Figure 3 f = 1 Hz 25 C µv input noise voltage 1 khz Equivalent input noise current Total harmonic disrtion Unity-gain bandwidth f = 1 khz 25 C.1.1 pa/ Hz RS = 1 kω, f = 1 khz, VI = 1 mv,, CL =25pF F, See Figure Phase margin at unity VI = 1 mv,, gain CL = 25 pf, See Figure 25 C.3.3 % 25 C ns C MHz 85 C C C deg 85 C Full range is C 85 C. For VCC± = ±5 V, VI(PP) = ±1 V; for, VI(PP) = ±5 V. This parameter is tested on a sample basis for the TL51A. For other test requirements, please contact the facry. This statement has no bearing on testing or nontesting of other parameters. For VCC± = ±5 V, VO(RMS) = 1 V; for, VO(RMS) = 6 V. 8 POST OFFICE BOX DALLAS, TEXAS 75265

9 TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 TL52C and TL52AC electrical characteristics at specified free-air temperature VIO TL52C, TL52AC PARAMETER TEST CONDITIONS TA VCC± = ±5 V UNIT A MIN TYP MAX MIN TYP MAX Input offset voltage Temperature coefficient V IO of input offset voltage Input offset-voltage long-term drift TL52C VO =, TL52AC VIC =, RS = 5 Ω TL52C VO =, RS = 5 Ω VO =, IIO Input offset current See Figure 5 VO =, IIB Input bias current See Figure 5 VICR VOM VOM AVD Common-mode input voltage range Maximum positive peak output voltage swing Maximum negative peak output voltage swing Large-signal differential voltage amplification RL =1kΩ RL =2kΩ RL =1kΩ RL =2kΩ TL52AC 25 C Full range C Full range C 7 C 25 C 7 C mv µv/ C VIC =, 25 C.. µv/mo VIC =, VIC =, 25 C pa 7 C na 25 C pa 7 C.15.2 na 25 C Full range C Full range C Full range C Full range C Full range C C V/mV 7 C ri Input resistance 25 C Ω ci Input capacitance 25 C 1 12 pf CMRR Common-mode mode VIC = VICRmin, rejection ratio VO =, 25 C RS = 5 Ω C db 7 C Full range is C 7 C. This parameter is tested on a sample basis. For other test requirements, please contact the facry. This statement has no bearing on testing or nontesting of other parameters. Typical values are based on the input offset-voltage shift observed through 168 hours of operating life test at TA = 15 C, extrapolated using the Arrhenius equation, and assuming an activation energy of.96 ev. For VCC± = ±5 V, VO = ±2.3 V; at, VO = ±1 V. V V V POST OFFICE BOX DALLAS, TEXAS

10 TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 TL52C and TL52AC electrical characteristics at specified free-air temperature (continued) ksvr ICC TL52C, TL52AC PARAMETER TEST CONDITIONS TA VCC± = ±5 V UNIT A MIN TYP MAX MIN TYP MAX Supply-voltage lt rejection ratio ( VCC±/ VIO) Supply current (two amplifiers) 25 C VO =, RS = 5 Ω C db 7 C C VO =, No load C ma 7 C VO1/VO2 Crosstalk attenuation AVD = 1 25 C db TL52C and TL52AC operating characteristics at specified free-air temperature SR SR TL52C, TL52AC PARAMETER TEST CONDITIONS TA VCC± = ±5 V UNIT A MIN TYP MAX MIN TYP MAX Slew rate at unity gain 25 C , CL = 1 pf, Full range 8 Negative slew rate See Figure 1 25 C at unity gain Full range 8 25 C tr Rise time C 5 55 tf Fall time 7 C VI(PP) = ±1 mv, 25 C 55 57, Ω C 5 56 CL = 1 pf, See Figures 1 and 2 7 C C 2 19 Overshoot facr C 2 19 % 7 C 2 19 Equivalent input noise f = 1 Hz 25 C Vn voltage RS = 2 Ω, f = 1 khz 25 C nv/ Hz Peak--peak equivalent See Figure 3 f = 1 Hz VN(PP) 25 C µv input noise current 1 khz In THD B1 φm Equivalent input noise current Total harmonic disrtion Unity-gain bandwidth V/µs f = 1 khz 25 C.1.1 pa/ Hz RS = 1 kω, f = 1 khz, VI = 1 mv,, CL =25pF F, See Figure Phase margin at unity VI = 1 mv,, gain CL = 25 pf, See Figure 25 C.3.3 % 25 C 3 3 ns C MHz 7 C C 6 63 C deg 7 C 6 63 Full range is C 7 C. For VCC± = ±5 V, VI(PP) = ±1 V; for, VI(PP) = ±5 V. This parameter is tested on a sample basis. For other test requirements, please contact the facry. This statement has no bearing on testing or nontesting of other parameters. For VCC± = ±5 V, VO(RMS) = 1 V; for, VO(RMS) = 6 V. 1 POST OFFICE BOX DALLAS, TEXAS 75265

11 TL52I and TL52AI electrical characteristics at specified free-air temperature VIO V IO TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 TL52I, TL52AI PARAMETER TEST CONDITIONS TA VCC± = ±5 V UNIT A MIN TYP MAX MIN TYP MAX Input offset voltage Temperature coefficient i Input offset-voltage long-term drift TL52I VO =, TL52AI VIC =, RS = 5 Ω TL52I VO =, RS = 5 Ω TL52AI 25 C Full range C Full range C 85 C 25 C 85 C mv µv/ C VIC =, 25 C.. µv/mo VO =, VIC =, 25 C pa IIO Input offset current See Figure 5 85 C na VO =, VIC =, 25 C pa IIB Input bias current See Figure 5 85 C na VICR Common-mode input voltage range RL =1kΩ Maximum positive peak VOM output voltage swing RL =2kΩ VOM AVD Maximum negative peak output voltage swing Large-signal differential voltage amplification RL =1kΩ RL =2kΩ 25 C Full range C Full range C Full range C Full range C Full range C C V/mV 85 C ri Input resistance 25 C Ω ci Input capacitance 25 C 1 12 pf CMRR Common-mode mode VIC = VICRmin, rejection ratio VO =, 25 C RS = 5 Ω C db 85 C Full range is C 85 C. This parameter is tested on a sample basis. For other test requirements, please contact the facry. This statement has no bearing on testing or nontesting of other parameters Typical values are based on the input offset-voltage shift observed through 168 hours of operating life test at TA = 15 C, extrapolated using the Arrhenius equation, and assuming an activation energy of.96 ev. At VCC± = ±5 V, VO = ±2.3 V; at, VO = ±1 V. V V V POST OFFICE BOX DALLAS, TEXAS

12 TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 TL52I and TL52AI electrical characteristics at specified free-air temperature (continued) ksvr ICC TL52I, TL52AI PARAMETER TEST CONDITIONS TA VCC± = ±5 V UNIT A MIN TYP MAX MIN TYP MAX Supply-voltage lt rejection ratio ( VCC±/ VIO) Supply current (two amplifiers) 25 C VO =, RS = 5 Ω C db 85 C C VO =, No load C ma 85 C VO1/VO2 Crosstalk attenuation AVD = 1 25 C db TL52I and TL52AI operating characteristics at specified free-air temperature TL52I, TL52AI PARAMETER TEST CONDITIONS TA VCC± = ±5 V UNIT A MIN TYP MAX MIN TYP MAX SR Slew rate at unity gain SR Negative slew rate at unity gain 25 C RL L = 2 kω,, CL L = 1 pf, Full range 8 See Figure 1 25 C Full range 8 25 C tr Rise time C tf Fall time 85 C C VI(PP) = ±1 mv,, CL = 1 pf, C See Figures 1 and 2 85 C C 2% 19% Overshoot facr C 2% 19% % 85 C 2% 19 Equivalent input noise f = 1 Hz 25 C Vn voltage RS = 2 Ω, f = 1 khz 25 C nv/ Hz Peak--peak equivalent See Figure 3 f = 1 Hz VN(PP) 25 C µv input noise current 1 khz In THD B1 φm Equivalent input noise current Total harmonic disrtion Unity-gain bandwidth V/µs f = 1 khz 25 C.1.1 pa/ Hz RS = 1 kω, f = 1 khz, VI = 1 mv,, CL =25pF F, See Figure Phase margin at unity VI = 1 mv,, gain CL = 25 pf, See Figure 25 C.3.3 % 25 C 3 3 ns C MHz 85 C C 6 63 C deg 85 C 6 63 Full range is C 85 C. For VCC± = ±5 V, VI(PP) = ±1 V; for, VI(PP) = ±5 V. This parameter is tested on a sample basis. For other test requirements, please contact the facry. This statement has no bearing on testing or nontesting of other parameters. For VCC± = ±5 V, VO(RMS) = 1 V; for, VO(RMS) = 6 V. 12 POST OFFICE BOX DALLAS, TEXAS 75265

13 TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 TL5C and TL5AC electrical characteristics at specified free-air temperature VIO V IO IIO IIB VICR VOM VOM AVD TL5C, TL5AC PARAMETER TEST CONDITIONS TA VCC± = ±5 V UNIT Input offset voltage Temperature coefficient of input offset voltage Input offset-voltage long-term drift Input offset current Input bias current Common-mode input voltage range Maximum positive peak output voltage swing Maximum negative peak output voltage swing Large-signal differential voltage amplification VO =, VIC =, RS = 5 Ω TL5C TL5AC TL5C TL5AC MIN TYP MAX MIN TYP MAX 25 C Full range C Full range C 7 C 25 C 7 C mv µv/ C 25 C.. µv/mo VO O =, VIC =, 25 C pa See Figure 5 7 C na VO O =, VIC =, 25 C pa See Figure 5 7 C.15.2 na RL =1kΩ RL =2kΩ RL =1kΩ RL =2kΩ 25 C Full range C Full range C Full range C Full range C Full range C C V/mV 7 C ri Input resistance 25 C Ω ci Input capacitance 25 C 1 12 pf CMRR ksvr ICC Common-modemode VIC = VICRmin, rejection ratio VO =, RS =5Ω Ω Supply-voltage rejection VCC± = ±5 V ±15 V, ratio ( VCC±/ VIO) VO =, RS =5Ω Ω Supply current (four amplifiers) 25 C C db 7 C C C db 7 C C VO =, No load C ma 7 C VO1/VO2 Crosstalk attenuation AVD = 1 25 C db Full range is C 7 C. Typical values are based on the input offset-voltage shift observed through 168 hours of operating life test at TA = 15 C, extrapolated using the Arrhenius equation, and assuming an activation energy of.96 ev. For VCC± = ±5 V, VO = ±2.3 V, at, VO = ±1 V.B V V V POST OFFICE BOX DALLAS, TEXAS

14 TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 TL5C and TL5AC operating characteristics at specified free-air temperature SR SR TL5C, TL5C PARAMETER TEST CONDITIONS TA VCC± = ±5 V UNIT MIN TYP MAX MIN TYP MAX Positive slew rate 25 C at unity gain C RL L = 2 kω, CL L = 1 pf, 7 C Negative slew rate at See Figure 1 and Note 7 25 C unity gain C C C tr Rise time C 5 55 tf Vn VN(PP) In THD B1 φm Fall time 7 C VI(PP) = ±1 mv, 25 C 55 57, C 5 56 CL = 1 pf, See Figures 1 and 2 7 C C 2% 19% Overshoot facr C 2% 19% % 7 C 2% 19 Equivalent input noise f = 1 Hz 25 C voltage RS = 2 Ω, f = 1 khz 25 C nv/ Hz Peak--peak equivalent See Figure 3 f = 1 Hz 25 C µv input noise voltage 1 khz Equivalent input noise current Total harmonic disrtion Unity-gain bandwidth V/µs f = 1 khz 25 C.1.1 pa/ Hz RS = 1 kω, f = 1 khz, VI = 1 mv,, CL =25pF F, See Figure Phase margin at VI =1mV mv, RL =2kΩ kω, unity gain CL = 25 pf, See Figure 25 C.3.3 % 25 C ns C 3 3 MHz 7 C C 61 6 C 6 6 deg 7 C Full range is C 7 C. For VCC± = ±5 V, VI(PP) = ±1 V; for, VI(PP) = ±5 V. This parameter is tested on a sample basis. For other test requirements, please contact the facry. This statement has no bearing on testing or nontesting of other parameters. For VCC± = ±5 V, VO(RMS) = 1 V; for, VO(RMS) = 6 V. 1 POST OFFICE BOX DALLAS, TEXAS 75265

15 TL5I and TL5AI electrical characteristics at specified free-air temperature VIO V IO IIO IIB VICR VOM VOM AVD TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 TL5I, TL5AI PARAMETER TEST CONDITIONS TA VCC± = ±5 V UNIT A MIN TYP MAX MIN TYP MAX Input offset voltage Temperature coefficient of input offset voltage Input offset voltage long-term drift Input offset current Input bias current Common-mode input voltage range Maximum positive peak output voltage swing Maximum negative peak output voltage swing Large-signal differential voltage amplification VO =, VIC =, RS = 5 Ω TL5I TL5AI TL5I TL5AI 25 C Full range C Full range C 85 C 25 C 85 C mv µv/ C 25 C.. µv/mo VO O =, VIC =, 25 C pa See Figure 5 85 C na VO O =, VIC =, 25 C pa See Figure 5 85 C na RL =1kΩ RL =2kΩ RL =1kΩ RL =2kΩ 25 C Full range C Full range C Full range C Full range C Full range C C V/mV 85 C ri Input resistance 25 C Ω ci Input capacitance 25 C 1 12 pf CMRR ksvr ICC Common-modemode VIC = VICRmin, rejection ratio VO =, RS =5Ω Ω Supply-voltage rejection VCC± = ±5 V ±15 V, ratio ( VCC±/ VIO) VO =, RS =5Ω Ω Supply current (four amplifiers) 25 C C db 85 C C C db 85 C C VO =, No load C ma 85 C VO1/VO2 Crosstalk attenuation AVD = 1 25 C db Full range is C 85 C. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 15 C, extrapolated using the Arrhenius equation, and assuming an activation energy of.96 ev. For VCC± = ±5 V, VO = ±2.3 V, at, VO = ±1 V. V V V POST OFFICE BOX DALLAS, TEXAS

16 TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 TL5I and TL5AI operating characteristics at specified free-air temperature SR SR TL5I, TL5AI PARAMETER TEST CONDITIONS TA VCC± = ±5 V UNIT A MIN TYP MAX MIN TYP MAX Positive slew rate 25 C at unity gain C RL L = 2 kω, CL L = 1 pf, 85 C Negative slew rate at See Figure 1 25 C unity gain C C C tr Rise time C tf Vn VN(PP) In THD B1 φm Fall time 85 C 6 65 VI(PP) = ±1 mv,, 25 C CL = 1 pf, C See Figures 1 and 2 85 C C 2 19 Overshoot facr C 2 19 % 85 C 2 19 Equivalent input noise f = 1 Hz 25 C voltage RS = 2 Ω, f = 1 khz 25 C nv/ Hz Peak--peak equivalent See Figure 3 f = 1 Hz 25 C µv input noise voltage 1 khz Equivalent input noise current Total harmonic disrtion Unity-gain bandwidth V/µs f = 1 khz 25 C.1.1 pa/ Hz RS = 1 kω, f = 1 khz, VI = 1 mv,, CL =25pF F, See Figure Phase margin at VI =1mV mv, RL =2kΩ kω, unity gain CL = 25 pf, See Figure 25 C.3%.3% % 25 C ns C MHz 85 C C 61 6 C deg 85 C 61 6 Full range is C 85 C. For VCC± = ±5 V, VI(PP) = ±1 V; for, VI(PP) = ±5 V. This parameter is tested on a sample basis. For other test requirements, please contact the facry. This statement has no bearing on testing or nontesting of other parameters. For VCC± = ±5 V, VO(RMS) = 1 V; for, VO(RMS) = 6 V. 16 POST OFFICE BOX DALLAS, TEXAS 75265

17 PARAMETER MEASUREMENT INFORMATION TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 VI VCC VO Overshoot 9% VCC CL (see Note A) RL 1% NOTE A: CL includes fixture capacitance. Figure 1. Slew Rate, Rise/Fall Time, and Overshoot Test Circuit Figure 2. Rise-Time and Overshoot Waveform tr 2 kω 1 kω VCC VCC RS RS VCC VO VI 1 Ω VCC CL (see Note A) RL VO Figure 3. Noise-Voltage Test Circuit NOTE A: CL includes fixture capacitance. Figure. Unity-Gain Bandwidth and Phase-Margin Test Circuit typical values Typical values, as presented in this data sheet represent the median (5% point) of device parametric performance. input bias and offset current Ground Shield pa pa VCC VCC At the picoamp-bias-current level typical of the TL5x and TL5xA, accurate measurement of the Figure 5. Input-Bias and Offset-Current Test Circuit bias current becomes difficult. Not only does this measurement require a picoammeter, but test-socket leakages easily can exceed the actual device bias currents. To accurately measure these small currents, Texas Instruments uses a two-step process. The socket leakage is measured using picoammeters with bias voltages applied, but with no device in the socket. The device then is inserted in the socket, and a second test that measures both the socket leakage and the device input bias current is performed. The two measurements then are subtracted algebraically determine the bias current of the device. noise Because of the increasing emphasis on low noise levels in many of day s applications, the input noise voltage density is sample tested at f = 1 khz. Texas Instruments also has additional noise-testing capability meet specific application requirements. Please contact the facry for details. POST OFFICE BOX DALLAS, TEXAS

18 TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 TYPICAL CHARACTERISTICS Table of Graphs FIGURE VIO Input offset voltage Distribution 6 11 IIB V IO Temperature coefficient of input offset voltage Distribution 12, 13, 1 Input bias current Common-mode input voltage Free-air temperature IIO Input offset current Free-air temperature 16 VIC Common-mode input voltage range limits Supply voltage Free-air temperature VO Output voltage Differential input voltage 19, 2 VOM Maximum peak output voltage Supply voltage Output current Free-air temperature , 26 27, 28 VO(PP) Maximum peak--peak output voltage Frequency 22, 23, 2 AVD CMRR Large-signal differential voltage amplification Common-mode rejection ratio Load resistance Frequency Free-air temperature Frequency Free-air temperature , 32, 33 3, zo Output impedance Frequency 37 ksvr Supply-voltage rejection ratio Free-air temperature 38 IOS ICC SR Short-circuit output current Supply current Slew rate Supply voltage Time Free-air temperature Supply voltage Free-air temperature Load resistance Free-air temperature , 3, 5, 6, Overshoot facr Load capacitance 6 Vn Equivalent input noise voltage Frequency 61, 62 THD Total harmonic disrtion Frequency 63 B1 φm Unity-gain bandwidth Phase margin Supply voltage Free-air temperature Supply voltage Load capacitance Free-air temperature 6, 65, 66 67, 68, 69 7, 71, 72 73, 7, 75 76, 77, 78 Phase shift Frequency 3 Voltage-follower small-signal pulse response Time 79 Voltage-follower large-signal pulse response Time 8 18 POST OFFICE BOX DALLAS, TEXAS 75265

19 TYPICAL CHARACTERISTICS TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 Percentage of Units % DISTRIBUTION OF TL51 INPUT OFFSET VOLTAGE 33 Units Tested From 1 Wafer Lot P Package Percentage of Units % DISTRIBUTION OF TL51A INPUT OFFSET VOLTAGE 393 Units Tested From 1 Wafer Lot ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ P Package VIO Input Offset Voltage mv Figure 6 VIO Input Offset Voltage µv Figure 7 Percentage of Amplifiers % DISTRIBUTION OF TL52 INPUT OFFSET VOLTAGE 76 Amplifiers Tested From 1 Wafer Lot P Package Percentage of Amplifiers % DISTRIBUTION OF TL52A INPUT OFFSET VOLTAGE 3 Amplifiers Tested From 1 Wafer Lot P Package VIO Input Offset Voltage mv Figure VIO Input Offset Voltage µv Figure 9 POST OFFICE BOX DALLAS, TEXAS

20 TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 TYPICAL CHARACTERISTICS Percentage of Amplifiers % DISTRIBUTION OF TL5 INPUT OFFSET VOLTAGE 11 Amplifiers Tested From 3 Wafer Lots N Package Percentage of Amplifiers % DISTRIBUTION OF TL5A INPUT OFFSET VOLTAGE 18 Amplifiers Tested From 3 Wafer Lots N Package VIO Input Offset Voltage mv Figure 1 VIO Input Offset Voltage mv Figure 11 Percentage of Units % DISTRIBUTION OF TL51 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT 12 Units Tested From 2 Wafer Lots 125 C P Package Percentage of Amplifiers % DISTRIBUTION OF TL52 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT ÎÎÎÎÎÎÎÎÎÎÎ 172 Amplifiers Tested From 2 Wafer Lots 125 C P Package Outlier: One Unit at 3.6 µv/ C V IO Temperature Coefficient µv/ C Figure V Temperature Coefficient µv/ C IO Figure POST OFFICE BOX DALLAS, TEXAS 75265

21 TYPICAL CHARACTERISTICS TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 Percentage of Amplifiers % DISTRIBUTION OF TL5 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT ÎÎÎÎÎÎÎÎÎÎÎÎ 32 Amplifiers Tested From 3 Wafer Lots 125 C N Package Input Bias Current na IB I INPUT BIAS CURRENT COMMON-MODE INPUT VOLTAGE V IO Temperature Coefficient µv/ C VIC Common-Mode Input Voltage V Figure 1 Figure 15 Input Bias and Offset Currents na IO I IB and I INPUT BIAS CURRENT AND INPUT OFFSET CURRENT FREE-AIR TEMPERATURE VO = VIC = IIB IIO TA Free-Air Temperature C Figure 16 Common-Mode Input Voltage V V IC COMMON-MODE INPUT VOLTAGE RANGE LIMITS SUPPLY VOLTAGE Positive Limit Negative Limit VCC± Supply Voltage V Figure 17 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX DALLAS, TEXAS

22 TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 TYPICAL CHARACTERISTICS V IC Common-Mode Input Voltage V COMMON-MODE INPUT VOLTAGE RANGE LIMITS FREE-AIR TEMPERATURE ÎÎÎÎÎ ÎÎÎÎÎ Positive Limit ÎÎÎÎÎ Negative Limit Output Voltage V V O 5 ÎÎÎÎ VCC± = ±5 V OUTPUT VOLTAGE DIFFERENTIAL INPUT VOLTAGE ÎÎÎÎ RL = 6 Ω ÎÎÎÎ RL = 1 kω ÎÎÎÎÎ RL = 1 kω TA Free-Air Temperature C Figure VID Differential Input Voltage µv Figure 19 V O Output Voltage V OUTPUT VOLTAGE DIFFERENTIAL INPUT VOLTAGE ÎÎÎÎÎ ÁÁÁÁ RL = 6 Ω ÁÁÁÁ ÎÎÎÎ RL = 1 kω ÁÁÁÁ RL = 1 kω 2 2 VID Differential Input Voltage µv Figure 2 Maximum Peak Output Voltage V V OM MAXIMUM PEAK OUTPUT VOLTAGE SUPPLY VOLTAGE RL = 1 kω RL = 1 kω VOM VOM VCC± Supply Voltage V Figure 21 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 22 POST OFFICE BOX DALLAS, TEXAS 75265

23 TYPICAL CHARACTERISTICS TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 Maximum Peak--Peak Output Voltage V V O(PP) MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE FREQUENCY k TA = 125 C VCC± = ±5 V TA = 55 C 1 k 1 M 1 M f Frequency Hz Figure 22 Maximum Peak--Peak Output Voltage V V O(PP) MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE FREQUENCY VCC± = ±5 V 1 k 1 k 1 M 1 M f Frequency Hz Figure 23 ÁÁÁÁ ÁÁÁÁ Maximum Peak--Peak Output Voltage V V O(PP) MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE FREQUENCY VCC± = ±5 V 1 k 1 k f Frequency Hz Figure 2 ÁÁÁÁ RL = 1 kω 1 M 1 M Maximum Peak Output Voltage V VOM MAXIMUM PEAK OUTPUT VOLTAGE OUTPUT CURRENT ÁÁÁ VOM ÁÁÁ VOM IO Output Current ma Figure 25 VCC± = ±5 V RL = 1 kω Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX DALLAS, TEXAS

24 TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 TYPICAL CHARACTERISTICS Maximum Peak Output Voltage V MAXIMUM PEAK OUTPUT VOLTAGE OUTPUT CURRENT ÁÁÁ VOM ÁÁÁÁ VOM RL = 1 kω Maximum Peak Output Voltage V MAXIMUM PEAK OUTPUT VOLTAGE FREE-AIR TEMPERATURE VOM ÁÁÁ V OM RL = 1 kω VCC± = ±5 V VOM IO Output Current ma Figure 26 VOM 5 75 RL = 1 kω TA Free-Air Temperature C Figure 27 Maximum Peak Output Voltage V VOM MAXIMUM PEAK OUTPUT VOLTAGE FREE-AIR TEMPERATURE ÁÁÁ VOM ÁÁÁ VOM RL = 1 kω RL = 1 kω TA Free-Air Temperature C Figure 28 Differential Voltage Amplification V/mV A VD LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION LOAD RESISTANCE VO = ±1 V VCC± = ±5 V RL Load Resistance kω Figure 29 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 2 POST OFFICE BOX DALLAS, TEXAS 75265

25 TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY TYPICAL CHARACTERISTICS LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE SHIFT FREQUENCY A VD Differential Voltage Amplification V/mV AVD Phase Shift CL = 25 pf 1 1 k 1 k 1 k 1 M f Frequency Hz Figure M φ m Phase Shift 1 TL51 AND TL52 LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION FREE-AIR TEMPERATURE 1 TL5 LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION FREE-AIR TEMPERATURE A VD Differential Voltage Amplification V/mV RL = 1 kω VCC± = ±5 V VO = ±2.3 V TA Free-Air Temperature C Figure A VD Differential Voltage Amplification V/mV RL = 1 kω VCC± = ±5 V VO = ±2.3 V TA Free-Air Temperature C Figure Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX DALLAS, TEXAS

26 TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 TYPICAL CHARACTERISTICS LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION FREE-AIR TEMPERATURE COMMON-MODE REJECTION RATIO FREQUENCY A VD Differential Voltage Amplification V/mV 1 RL = 1 kω VO = 1 V CMRR Common-Mode Rejection Ratio db VCC± = ±5 V 1 1 k 1 k 1 k 1 M 1 M TA Free-Air Temperature C f Frequency Hz Figure 33 Figure 3 COMMON-MODE REJECTION RATIO FREQUENCY COMMON-MODE REJECTION RATIO FREE-AIR TEMPERATURE 1 1 CMRR Common-Mode Rejection Ratio db CMRR Common-Mode Rejection Ratio db VCC± = ±5 V VIC = VICRMin k 1 k 1 k 1 M 1 M f Frequency Hz TA Free-Air Temperature C Figure 35 Figure 36 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 26 POST OFFICE BOX DALLAS, TEXAS 75265

27 TYPICAL CHARACTERISTICS TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 zo Output Impedance Ω k OUTPUT IMPEDANCE FREQUENCY AVD = 1 AVD = 1 AVD = 1 ro (open loop) 25 Ω 1 k 1 k f Frequency Hz Figure 37 1 M ÁÁk ksvr Supply-Voltage Rejection Ratio db ÁÁ SUPPLY-VOLTAGE REJECTION RATIO FREE-AIR TEMPERATURE VCC± = ±5 V ±15 V TA Free-Air Temperature C Figure IOS Short-Circuit Output Current ma ÁÁ SHORT-CIRCUIT OUTPUT CURRENT SUPPLY VOLTAGE VO = VID = 1 mv VID = 1 mv VCC± Supply Voltage V Figure 39 ÁÁIOS Short-Circuit Output Current ma ÁÁ SHORT-CIRCUIT OUTPUT CURRENT TIME VID = 1 mv t Time s Figure VID = 1 mv Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX DALLAS, TEXAS

28 TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 TYPICAL CHARACTERISTICS IOS Short-Circuit Output Current ma ÁÁ SHORT-CIRCUIT OUTPUT CURRENT FREE-AIR TEMPERATURE ÎÎÎÎÎ VID = 1 m V VO = VID = 1 m V VCC± = ±5 V VCC± = ±5 V TA Free-Air Temperature C Figure 1 ÁÁICC Supply Current ma ÁÁ TL51 SUPPLY CURRENT SUPPLY VOLTAGE VCC± Supply Voltage V Figure 2 TA = 55 C TA = 125 C VO = No Load 16 5 TL52 SUPPLY CURRENT SUPPLY VOLTAGE 1 TL5 SUPPLY CURRENT SUPPLY VOLTAGE ÁÁICC Supply Current ma ÁÁ TA = 55 C TA = 125 C ICC Supply Current ma ÁÁICC ÎÎÎÎÎ TA = 55 C TA = 125 C VO = No Load VCC± Supply Voltage V Figure 3 16 VO = No Load VCC± Supply Voltage V Figure 16 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 28 POST OFFICE BOX DALLAS, TEXAS 75265

29 TYPICAL CHARACTERISTICS TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 3 TL51 SUPPLY CURRENT FREE-AIR TEMPERATURE 5 TL52 SUPPLY CURRENT FREE-AIR TEMPERATURE ICC Supply Current ma ÁÁ VCC± = ±5 V TA Free-Air Temperature C Figure 5 VO = No Load 125 ÁÁICC Supply Current ma ÁÁ VCC± = ±5 V VO = No Load TA Free-Air Temperature C Figure TL5 SUPPLY CURRENT FREE-AIR TEMPERATURE ÎÎÎÎÎÎ 25 TL51 SLEW RATE LOAD RESISTANCE SR ICC Supply Current ma ÁÁ ÁÁ ÎÎÎÎÎÎ VCC± = ±5 V VO = No Load TA Free-Air Temperature C Figure µs SR Slew Rate V/ SR 1 RL Load Resistance kω Figure 8 VCC± = ±5 V CL = 1 pf See Figure 1 1 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX DALLAS, TEXAS

30 TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 TYPICAL CHARACTERISTICS 25 TL52 SLEW RATE LOAD RESISTANCE 25 TL5 SLEW RATE LOAD RESISTANCE SR 2 2 SR SR Slew Rate V/µs SR 1 RL Load Resistance kω Figure 9 VCC± = ±5 V CL = 1 pf See Figure 1 1 µs SR Slew Rate V/ SR 1 RL Load Resistance kω Figure 5 VCC± = ±5 V CL = 1 pf See Figure TL51 SLEW RATE LOAD RESISTANCE SR 25 TL52 SLEW RATE LOAD RESISTANCE SR SR Slew Rate V/µs SR CL = 1 pf See Figure 1 SR Slew Rate V/µs SR CL = 1 pf See Figure RL Load Resistance kω Figure RL Load Resistance kω Figure 52 3 POST OFFICE BOX DALLAS, TEXAS 75265

31 TYPICAL CHARACTERISTICS TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 TL5 SLEW RATE LOAD RESISTANCE TL51 SLEW RATE FREE-AIR TEMPERATURE SR 25 SR Slew Rate V/µs SR VCC± = ±5 V CL = 1 pf See Figure 1 SR Slew Rate V/µs SR SR VCC± = ±5 V RL Load Resistance kω TA Free-Air Temperature C Figure 53 Figure 5 TL52 SLEW RATE FREE-AIR TEMPERATURE TL5 SLEW RATE FREE-AIR TEMPERATURE SR 15 SR SR Slew Rate V/µs SR VCC± = ±5 V CL = 1 pf See Figure 1 SR Slew Rate V/µs 1 5 SR VCC± = ±5 V CL = 1 pf See Figure TA Free-Air Temperature C TA Free-Air Temperature C Figure 55 Figure 56 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX DALLAS, TEXAS

32 TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 TYPICAL CHARACTERISTICS 3 TL51 SLEW RATE FREE-AIR TEMPERATURE 25 TL52 SLEW RATE FREE-AIR TEMPERATURE 25 SR 2 SR SR Slew Rate V/µs SR CL = 1 pf See Figure TA Free-Air Temperature C Figure SR Slew Rate V/µs SR CL = 1 pf See Figure TA Free-Air Temperature C Figure TL5 SLEW RATE FREE-AIR TEMPERATURE SR 5 OVERSHOOT FACTOR LOAD CAPACITANCE SR Slew Rate V/µs SR CL = 1 pf See Figure TA Free-Air Temperature C Figure Overshoot Facr % ÎÎÎÎ VCC± = ±5 V ÎÎÎÎÎ VI(PP) = ±1 mv ÎÎÎÎÎ See Figure CL Load Capacitance pf Figure 6 3 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 32 POST OFFICE BOX DALLAS, TEXAS 75265

33 TYPICAL CHARACTERISTICS TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 nv/ Hz Vn Equivalent Input Noise Voltage TL51 EQUIVALENT INPUT NOISE VOLTAGE FREQUENCY 1 1 k 1 k 1 k f Frequency Hz Figure 61 RS = 2 Ω See Figure 3 nv/ Hz Vn Equivalent Input Noise Voltage TL52 AND TL5 EQUIVALENT INPUT NOISE VOLTAGE FREQUENCY RS = 2 Ω See Figure k 1 k 1 k f Frequency Hz Figure 62 THD Total Harmonic Disrtion % TOTAL HARMONIC DISTORTION FREQUENCY AVD = 1 VO(RMS) = 6 V B 1 Unity-Gain Bandwidth MHz TL51 UNITY-GAIN BANDWIDTH SUPPLY VOLTAGE VI = 1 mv CL = 25 pf See Figure k 1 k 1 k f Frequency Hz VCC± Supply Voltage V Figure 63 Figure 6 16 POST OFFICE BOX DALLAS, TEXAS

34 TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 TYPICAL CHARACTERISTICS 3.2 TL52 UNITY-GAIN BANDWIDTH SUPPLY VOLTAGE 2.9 TL5 UNITY-GAIN BANDWIDTH SUPPLY VOLTAGE Unity-Gain Bandwidth MHz B ÁÁÁÁ VI = 1 mv ÁÁÁÁ ÁÁÁÁ CL = 25 pf ÁÁÁÁ See Figure Unity-Gain Bandwidth MHz B ÎÎÎÎ VI = 1 mv ÎÎÎÎÎ CL = 25 pf ÎÎÎÎÎ ÎÎÎÎÎÎÎ See Figure VCC± Supply Voltage V Figure 65 VCC± Supply Voltage V Figure 66 TL51 UNITY-GAIN BANDWIDTH FREE-AIR TEMPERATURE TL52 UNITY-GAIN BANDWIDTH FREE-AIR TEMPERATURE B 1 Unity-Gain Bandwidth MHz VI = 1 mv CL = 25 pf See Figure VCC± = ±5 V B 1 Unity-Gain Bandwidth MHz VCC± = ±5 V ±15 V VI = 1 mv CL = 25 pf See Figure TA Free-Air Temperature C Figure TA Free-Air Temperature C Figure Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 3 POST OFFICE BOX DALLAS, TEXAS 75265

35 TYPICAL CHARACTERISTICS TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 TL5 UNITY-GAIN BANDWIDTH FREE-AIR TEMPERATURE 65 TL51 PHASE MARGIN SUPPLY VOLTAGE B 1 Unity-Gain Bandwidth MHz VCC± = ±5 V ±15 V VI = 1 mv CL = 25 pf See Figure TA Free-Air Temperature C Figure φ m Phase Margin VI = 1 mv CL = 25 pf See Figure VCC± Supply Voltage V Figure TL52 PHASE MARGIN SUPPLY VOLTAGE 65 TL5 PHASE MARGIN SUPPLY VOLTAGE φ m Phase Margin VI = 1 mv 57 CL = 25 pf See Figure φ m Phase Margin VI = 1 mv 57 CL = 25 pf See Figure VCC± Supply Voltage V Figure 71 VCC± Supply Voltage V Figure 72 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX DALLAS, TEXAS

36 TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 TYPICAL CHARACTERISTICS TL51 PHASE MARGIN LOAD CAPACITANCE TL52 PHASE MARGIN LOAD CAPACITANCE VI = 1 mv See Figure 65 VI = 1 mv See Figure φ m Phase Margin See Note A VCC± = ±5 V φ m Phase Margin 6 55 See Note A ÎÎÎÎÎ VCC± = ±5 V CL Load Capacitance pf CL Load Capacitance pf Figure 73 Figure TL5 PHASE MARGIN LOAD CAPACITANCE VI = 1 mv See Figure φ m Phase Margin 6 55 See Note A VCC± = ±5 V ÎÎÎÎÎ CL Load Capacitance pf Figure 75 Values of phase margin below a load capacitance of 25 pf were estimated. 36 POST OFFICE BOX DALLAS, TEXAS 75265

37 TYPICAL CHARACTERISTICS TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY VI = 1 mv CL = 25 pf See Figure 63 TL51 PHASE MARGIN FREE-AIR TEMPERATURE TL52 PHASE MARGIN FREE-AIR TEMPERATURE VI = 1 mv CL = 25 pf See Figure φ m Phase Margin VCC± = ±5 V φ m Phase Margin VCC± = ±5 V TA Free-Air Temperature C Figure TA Free-Air Temperature C Figure TL5 PHASE MARGIN FREE-AIR TEMPERATURE 63 φ m Phase Margin VCC± = ±5 V VI = 1 mv CL = 25 pf See Figure TA Free-Air Temperature C Figure 78 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX DALLAS, TEXAS

38 TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 TYPICAL CHARACTERISTICS 16 VOLTAGE-FOLLOWER SMALL-SIGNAL PULSE RESPONSE 8 VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE 12 6 Output Voltage mv V O 8 8 CL = 1 pf See Figure 1 V O Output Voltage V 2 2 CL = 1 pf See Figure t Time µs Figure t Time µs Figure POST OFFICE BOX DALLAS, TEXAS 75265

39 APPLICATION INFORMATION TL5x, TL5xA SLOS178A FEBRUARY REVISED FEBRUARY 23 output characteristics All operating characteristics (except bandwidth and phase margin) are specified with 1-pF load capacitance. The TL5x and TL5xA drive higher capacitive loads; however, as the load capacitance increases, the resulting response pole occurs at lower frequencies, causing ringing, peaking, or even oscillation. The value of the load capacitance at which oscillation occurs varies with production lots. If an application appears be sensitive oscillation due load capacitance, adding a small resistance in series with the load should alleviate the problem. Capacitive loads of 1 pf, and larger, may be driven if enough resistance is added in series with the output (see Figure 81 and Figure 82). (a) CL = 1 pf, R = (b) CL = 3 pf, R = (c) CL = 35 pf, R = (d) CL = 1 pf, R = (e) CL = 1 pf, R = 5 Ω (f) CL = 1 pf, R = 2 kω Figure 81. Effect of Capacitive Loads 15 V 5 V 5 V 15 V CL (see Note A) R VO 2 kω NOTE A: CL includes fixture capacitance. Figure 82. Test Circuit for Output Characteristics POST OFFICE BOX DALLAS, TEXAS