GENERAL-PURPOSE OPERATIONAL AMPLIFIERS

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1 查询 UA71 供应商 捷多邦, 专业 PCB 打样工厂, 小时加急出货 µa71, µa71y Short-Circuit Protection Offset-Voltage Null Capability Large Common-Mode and Differential Voltage Ranges No Frequency Compensation Required Low Power Consumption No Latch-Up Designed to Be Interchangeable With Fairchild µa71 IN IN+ V CC µa71m...j PACKAGE (TOP VIEW) V CC + OFFSET N description symbol The µa71 is a general-purpose operational amplifier featuring offset-voltage null capability. The high common-mode input voltage range and the absence of latch-up make the amplifier ideal for voltage-follower applications. The device is short-circuit protected and the internal frequency compensation ensures stability without external components. A low value potentiometer may be connected between the offset null inputs to null out the offset voltage as shown in Figure. The µa71c is characterized for operation from C to 7 C. The µa71i is characterized for operation from C to 5 C.The µa71m is characterized for operation over the full military temperature range of 55 C to 15 C. µa71m...jg PACKAGE µa71c, µa71i... D, P, OR PW PACKAGE (TOP VIEW) IN IN+ V CC IN IN+ V CC µa71m...u PACKAGE (TOP VIEW) 9 7 µa71m... FK PACKAGE (TOP VIEW) V CC+ OFFSET N V CC + OFFSET N IN + IN OFFSET N + IN IN V CC + V CC OFFSET N No internal connection PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright, Texas Instruments Incorporated

2 µa71, µa71y TA SMALL LINE (D) CHIP CARRIER (FK) AVAILABLE OPTIONS CERAMIC DIP (J) PACKAGED DEVICES CERAMIC DIP (JG) PLASTIC DIP (P) TSSOP (PW) FLAT PACK (U) CHIP FORM (Y) C to 7 C µa71cd µa71cp µa71cpw µa71y C to 5 C µa71id µa71ip 55 C to 15 C µa71mfk µa71mj µa71mjg µa71mu The D package is available taped and reeled. Add the suffix R (e.g., µa71cdr). schematic VCC+ IN IN+ OFFSET N VCC Component Count Transistors Resistors 11 Diode 1 Capacitor 1

3 µa71, µa71y µa71y chip information This chip, when properly assembled, displays characteristics similar to the µa71c. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS () (7) () IN + IN OFFSET N (3) () (1) (5) + VCC+ (7) () VCC () 5 (5) (1) () CHIP THICKNESS: 15 TYPICAL BONDING PADS: MINIMUM () (3) TJmax = 15 C. TOLERAES ARE ±%. 3 ALL DIMENSIONS ARE IN MILS.

4 µa71, µa71y absolute maximum ratings over operating free-air temperature range (unless otherwise noted) µa71c µa71i µa71m UNIT Supply voltage, VCC+ (see Note 1) 1 V Supply voltage, VCC (see Note 1) 1 V Differential input voltage, VID (see Note ) ±15 ±3 ±3 V Input voltage, VI any input (see Notes 1 and 3) ±15 ±15 ±15 V Voltage between offset null (either or OFFSET N) and VCC ±15 ±.5 ±.5 V Duration of output short circuit (see Note ) unlimited unlimited unlimited Continuous total power dissipation See Dissipation Rating Table Operating free-air temperature range, TA to 7 to 5 55 to 15 C Storage temperature range 5 to 15 5 to 15 5 to 15 C Case temperature for seconds FK package C Lead temperature 1, mm (1/1 inch) from case for seconds J, JG, or U package 3 C Lead temperature 1, mm (1/1 inch) from case for seconds D, P, or PW package C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, unless otherwise noted, are with respect to the midpoint between VCC+ and VCC.. Differential voltages are at IN+ with respect to IN. 3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less.. The output may be shorted to ground or either power supply. For the µa71m only, the unlimited duration of the short circuit applies at (or below) 15 C case temperature or 75 C free-air temperature. PACKAGE TA 5 C POWER RATING DERATING FACTOR DISSIPATION RATING TABLE DERATE ABOVE TA TA = 7 C POWER RATING TA = 5 C POWER RATING TA = 15 C POWER RATING D 5 mw 5. mw/ C C mw 377 mw N/A FK 5 mw 11. mw/ C 5 C 5 mw 5 mw 75 mw J 5 mw 11. mw/ C 5 C 5 mw 5 mw 75 mw JG 5 mw. mw/ C 9 C 5 mw 5 mw mw P 5 mw N/A N/A 5 mw 5 mw N/A PW 55 mw. mw/ C 5 C 33 mw N/A N/A U 5 mw 5. mw/ C 57 C 3 mw 351 mw 135 mw

5 µa71, µa71y electrical characteristics at specified free-air temperature, V CC± = ±15 V (unless otherwise noted) PARAMETER VIO Input offset voltage VO = TEST CONDITIONS µa71c µa71i, µa71m TA MIN TYP MAX MIN TYP MAX 5 C Full range 7.5 VIO(adj) Offset voltage adjust range VO = 5 C ±15 ±15 mv IIO Input offset current VO = IIB Input bias current VO = VICR VOM AVD 5 C Full range C 5 5 Full range 15 Common-mode input 5 C ±1 ±13 ±1 ±13 voltage range Full range ±1 ±1 RL = kω 5 C ±1 ±1 ±1 ±1 Maximum peak output RL kω Full range ±1 ±1 voltage swing RL = kω 5 C ± ±13 ± ±13 RL kω Full range ± ± Large-signal g differential RL kω 5 C 5 voltage amplification VO = ± V Full range 15 5 ri Input resistance 5 C.3.3 MΩ ro Output resistance VO =, See Note 5 5 C Ω Ci Input capacitance 5 C pf CMRR ksvs Common-mode rejection ratio Supply voltage sensitivity ( VIO / VCC) VIC = VICRmin 5 C Full range 7 7 UNIT mv na na V V V/mV 5 C VCC = ±9 Vto±15 V µv/v Full range IOS Short-circuit output current 5 C ±5 ± ±5 ± ma ICC Supply current VO =, No load PD Total power dissipation VO =, No load 5 C Full range C Full range All characteristics are measured under open-loop conditions with zero common-mode input voltage unless otherwise specified. Full range for the µa71c is C to 7 C, the µa71i is C to 5 C, and the µa71m is 55 C to 15 C. NOTE 5: This typical value applies only at frequencies above a few hundred hertz because of the effects of drift and thermal feedback. operating characteristics, V CC± = ±15 V, T A = 5 C PARAMETER TEST CONDITIONS µa71c µa71i, µa71m MIN TYP MAX MIN TYP MAX tr Rise time VI = mv, RL = kω,,.3.3 µs Overshoot factor CL = pf, See Figure 1 5% 5% SR Slew rate at unity gain VI = V, CL = pf, RL = kω, See Figure 1 db ma mw UNIT.5.5 V/µs

6 µa71, µa71y electrical characteristics at specified free-air temperature, V CC± = ±15 V, T A = 5 C (unless otherwise noted) PARAMETER TEST CONDITIONS µa71y MIN TYP MAX VIO Input offset voltage VO = 1 mv VIO(adj) Offset voltage adjust range VO = ±15 mv IIO Input offset current VO = na IIB Input bias current VO = 5 na VICR Common-mode input voltage range ±1 ±13 V VOM Maximum peak output voltage swing RL = kω ±1 ±1 RL = kω ± ±13 AVD Large-signal differential voltage amplification RL kω V/mV ri Input resistance.3 MΩ ro Output resistance VO =, See Note 5 75 Ω Ci Input capacitance 1. pf CMRR Common-mode rejection ratio VIC = VICRmin 7 9 db ksvs Supply voltage sensitivity ( VIO / VCC) VCC = ±9 V to ±15 V 3 15 µv/v IOS Short-circuit output current ±5 ± ma ICC Supply current VO =, No load 1.7. ma PD Total power dissipation VO =, No load 5 5 mw All characteristics are measured under open-loop conditions with zero common-mode voltage unless otherwise specified. NOTE 5: This typical value applies only at frequencies above a few hundred hertz because of the effects of drift and thermal feedback. operating characteristics, V CC ± = ±15 V, T A = 5 C PARAMETER TEST CONDITIONS µa71y MIN TYP MAX tr Rise time VI = mv, RL = kω,,.3 µs Overshoot factor CL = pf, See Figure 1 5% SR Slew rate at unity gain VI = V, CL = pf, RL = kω, See Figure 1 UNIT V UNIT.5 V/µs

7 µa71, µa71y PARAMETER MEASUREMENT INFORMATION VI V INPUT VOLTAGE WAVEFDORM IN + CL = pf RL = kω TEST CIRCUIT Figure 1. Rise Time, Overshoot, and Slew Rate APPLICATION INFORMATION Figure shows a diagram for an input offset voltage null circuit. IN + IN + OFFSET N kω To VCC Figure. Input Offset Voltage Null Circuit

8 µa71, µa71y TYPICAL CHARACTERISTICS Input Offset Current na IO I ÏÏÏÏÏ ÏÏÏÏÏ VCC = 15 V INPUT OFFSET CURRENT FREE-AIR TEMPERATURE Input Bias Current na IB I ÏÏÏÏÏ VCC = 15 V INPUT BIAS CURRENT FREE-AIR TEMPERATURE 5 TA Free-Air Temperature C TA Free-Air Temperature C Figure 3 Figure Maximum Peak Output Voltage V OM V ±1 ±13 ±1 ±11 ± ±9 ± ±7 ± ±5 MAXIMUM PEAK PUT VOLTAGE LOAD RESISTAE VCC = 15 V TA = 5 C ± RL Load Resistance kω 7 Figure 5 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

9 µa71, µa71y TYPICAL CHARACTERISTICS V OM Maximum Peak Output Voltage V ± ±1 ±1 ±1 ±1 ± ± ± ± ± MAXIMUM PEAK PUT VOLTAGE FREQUEY VCC = 15 V RL = kω TA = 5 C A VD Open-Loop Signal Differential Voltage Amplification V/mV OPEN-LOOP SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION SUPPLY VOLTAGE VO = ± V RL = kω TA = 5 C 1k k k 1M f Frequency Hz VCC ± Supply Voltage V Figure Figure 7 A VD Open-Loop Signal Differential Voltage Amplification db OPEN-LOOP LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION FREQUEY 1k k k f Frequency Hz VCC = 15 V VO = ± V RL = kω TA = 5 C 1M M

10 µa71, µa71y TYPICAL CHARACTERISTICS CMRR Common-Mode Rejection Ratio db COMMON-MODE REJECTION RATIO FREQUEY k 1M M f Frequency Hz VCC = 15 V BS = kω TA = 5 C Output Voltage mv V O 1 1 % 9% PUT VOLTAGE ELAPSED TIME tr t Time µs VCC = 15 V RL = kω CL = pf TA = 5 C.5 Figure Figure 9 Input and Output Voltage V VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE VO VI VCC = 15 V RL = kω CL = pf TA = 5 C t Time µs Figure

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