LM111, LM211, LM311, LM311Y DIFFERENTIAL COMPARATORS WITH STROBES
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- Beverley Harrington
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1 Fast Response Times Strobe Capability Maximum Input Bias Current...3 na Maximum Input Offset Current...7 na Can Operate From Single -V Supply Designed Be Interchangeable With National Semiconducr LM, LM, and LM3 description The LM, LM, and LM3 are single high-speed voltage comparars. These devices are designed operate from a wide range of power supply voltages, including ± -V supplies for operational amplifiers and -V supplies for logic systems. The output levels are compatible with most TTL and MOS circuits. These comparars are capable of driving lamps or relays and switching voltages up V at ma. All inputs and outputs can be isolated from system ground. The outputs can drive loads referenced ground, V CC+ or V CC. Offset balancing and strobe capabilities are available, and the outputs can be wire-or connected. If the strobe is low, the output will be in the off state regardless of the differential input. The LM is characterized for operation over the full military range of C C. The LM is characterized for operation from 4 C 8 C, and the LM3 is characterized for operation from C 7 C. functional block diagram BALAE IN+ IN + COL OUT EMIT OUT EMIT OUT IN+ IN V CC BALAE EMIT OUT IN+ IN V CC LM...J PACKAGE V CC + COL OUT LM...JG PACKAGE LM, LM3... D, DB, P, OR PW PACKAGE (TOP VIEW) EMIT OUT IN+ IN V CC IN+ IN LM...U PACKAGE (TOP VIEW) LM...FK PACKAGE (TOP VIEW) EMIT OUT (TOP VIEW) 3 4 V CC BALAE V CC + V CC + COL OUT BALAE V CC + COL OUT BALAE COL OUT PRODUCTION DATA information is current as of publication date. Products conform specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 99, Texas Instruments Incorporated POST OFFICE BOX 633 DALLAS, TEXAS 76
2 TA C 7 C 4 C 8 C VIOmax at C SMALL OUTLINE (D) SSOP (DB) CHIP CARRIER (FK) AVAILABLE OPTIONS PACKAGED DEVICES CERAMIC DIP (J) CERAMIC DIP (JG) PLASTIC DIP (P) TSSOP (PW) FLATPACK (U) CHIP FORM (Y) 7. mv LM3D LM3DBLE LM3P LM3PWLE LM3Y 3 mv LMD LMP C C 3 mv LMFK LMJ LMJG LMU The D package is available taped and reeled. Add the suffix R (e.g., LM3DR). The DB and PW packages are only available left-end taped and reeled. schematic BALAE 3 Ω 3 Ω VCC +.3 kω.3 kω 7 Ω 7 Ω 6 Ω. kω IN +. kω 4 kω IN COL OUT 6 Ω 4 Ω 4 Ω 3 Ω 6 Ω Ω Ω kω 4 Ω EMIT OUT VCC All resisr values shown are nominal. Component Count Resisrs Diodes Epifet Transisrs POST OFFICE BOX 633 DALLAS, TEXAS 76
3 LM3Y chip information This chip, when properly assembled, displays characteristics similar the LM3. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS () (8) () (7) BALAE IN+ IN () () (3) + (8) COL OUT (7) 6 (6) (4) VCC () EMIT OUT (3) CHIP THICKNESS: TYPICAL (4) () (6) BONDING PADS: 4 4 MINIMUM TJ max = C TOLERAES ARE ±%. ALL DIMENSIONS ARE IN MILS. POST OFFICE BOX 633 DALLAS, TEXAS 76 3
4 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, V CC+ (see Note ) V Supply voltage, V CC (see Note ) V Supply voltage, V CC+ V CC V Differential input voltage, V ID (see Note ) ±3 V Input voltage, V I (either input, see Notes and 3) ± V Voltage from emitter output V CC V Voltage from collecr output V CC : LM V LM V LM V Duration of output short circuit (see Note 4) s Continuous tal dissipation See Dissipation Rating Table Operating free-air temperature range, T A : LM C C LM C 8 C LM C 7 C Srage temperature range C C Case temperature for 6 seconds: FK package C Lead temperature,6 mm (/6 inch) from case for seconds: J, JG, or U package C Lead temperature,6 mm (/6 inch) from case for 6 seconds: D, DB, P, or PW package C Stresses beyond those listed under absolute maximum ratings may cause permanent damage the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES:. All voltage values, unless otherwise noted, are with respect the midpoint between and VCC.. Differential voltages are at IN+ with respect IN. 3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or ± V, whichever is less. 4. The output may be shorted ground or either power supply. PACKAGE TA C POWER RATING DERATING FACTOR DISSIPATION RATING TABLE DERATE ABOVE TA TA = 7 C POWER RATING TA = 8 C POWER RATING TA = C POWER RATING D mw.8 mw/ C 64 C 464 mw 377 mw DB or PW mw 4. mw/ C 3 C 336 mw FK mw. mw/ C C mw mw 7 mw J mw. mw/ C C mw mw 7 mw JG mw 8.4 mw/ C 9 C mw mw mw P mw 8. mw/ C 88 C mw mw U mw.4 mw/ C 7 C 43 mw 3 mw 3 mw recommended operating conditions MIN MAX UNIT Supply voltage, VCC + VCC 3. 3 V Input voltage ( VCC± V) VCC +.. V LM Operating free-air temperature range, TA LM 4 8 C LM3 7 4 POST OFFICE BOX 633 DALLAS, TEXAS 76
5 electrical characteristics at specified free-air temperature, V CC± = ± V (unless otherwise noted) LM, LM LM3 PARAMETER TEST CONDITIONS TA MIN TYP MAX MIN TYP MAX VIO Input offset voltage See Note IIO Input offset current See Note IIB Input bias current VO = V 4 V IIL(S) VICR AVD IOH VOL ICC + ICC Low-level strobe current (see Note 6) Common-mode input voltage range Large-signal differential voltage amplification High-level l (collecr) output current C Full range 4 C 4 6 Full range 7 C 7 Full range 3 V(strobe) =.3 V, VID mv C 3 3 ma Full range UNIT VO = V 3 V, RL = C 4 4 V/mV I(strobe) = 3 ma, C. na VID = mv, VOH = 3 V Full range. µa VID = mv, VOH = 3 V C. na VID = mv C.7. IOL =ma Low-level VID = mv C.7. (collecr--emitter) = 4. V, output VID = 6 mv Full range.3.4 voltage VCC =, IOL = 8 ma VID = mv Full range.3.4 Supply current from, output low Supply current from VCC, output high VID = mv, No load C ma VID = mv, No load C ma Unless otherwise noted, all characteristics are measured with BALAE and open and the emitter output grounded. Full range for LM is C C, for LM is 4 C 8 C, and for LM3 is C 7 C. All typical values are at TA = C. NOTES:. The offset voltages and offset currents given are the maximum values required drive the collecr output up 4 V or down V with a pullup resisr of 7. kω VCC +. These parameters actually define an error band and take in account the worst-case effects of voltage gain and input impedance. 6. The strobe should not be shorted ground; it should be current driven at 3 ma ma (see Figures 3 and 7). switching characteristics, V CC± = ± V, T A = C PARAMETER Response time, low--high-level output Response time, high--low-level output NOTE 7: TEST CONDITIONS RC = Ω V V, CL =pf pf, See Note 7 LM, LM, LM3 MIN TYP MAX mv na na V V UNIT ns 6 ns The response time specified is for a -mv input step with -mv overdrive and is the interval between the input step function and the instant when the output crosses.4 V. POST OFFICE BOX 633 DALLAS, TEXAS 76
6 electrical characteristics at V CC± = ± V (unless otherwise noted) PARAMETER TEST CONDITIONS LM3Y MIN TYP MAX VIO Input offset voltage See Note 7. mv IIO Input offset current See Note 6 na IIB Input bias current VO = V 4 V na IIL(S) Low-level strobe current (see Note 6) V(strobe) =.3 V, VID mv 3 ma VICR Common-mode input voltage range AVD Large-signal differential voltage amplification VO = V 3 V, RL = 4 V/mV IOH High-level (collecr) output current Istrobe = 3 ma, VID = mv, VOH = 3 V. na VOL Low-level (collecr--emitter) output voltage IOL = ma, VID = mv.7. V ICC+ Supply current from, output low VID = mv, No load. 7. ma ICC Supply current from VCC, output low VID = mv, No load 4. ma Unless otherwise noted, all characteristics are measured with BALAE and open and the emitter output grounded. NOTES:. The offset voltages and offset currents given are the maximum values required drive the collecr output up 4 V or down V with a pullup resisr of 7. kω VCC +. These parameters actually define an error band and take in account the worst-case effects of voltage gain and input impedance. 6. The strobe should not be shorted ground; it should be current driven at 3 ma ma (see Figures 3 and 7). switching characteristics, V CC± = ± V, T A = C PARAMETER Response time, low--high-level output Response time, high--low-level output NOTE 7: TEST CONDITIONS RC = Ω V V, CL =pf pf, See Note 7 LM3Y MIN TYP MAX UNIT V UNIT ns 6 ns The response time specified is for a -mv input step with -mv overdrive and is the interval between the input step function and the instant when the output crosses.4 V. 6 POST OFFICE BOX 633 DALLAS, TEXAS 76
7 TYPICAL CHARACTERISTICS INPUT OFFSET CURRENT vs FREE-AIR TEMPERATURE INPUT BIAS CURRENT vs FREE-AIR TEMPERATURE Input Offset Current na IIO LM LM Condition LM LM LM3 LM VCC± = ± V VO = V 4 V See Note A Condition 8 4 Input Bias Current na IIB LM LM LM3 LM3 Condition LM LM VCC± = ± V VO = V 4 V See Note A Condition 8 4 TA Free-Air Temperature C TA Free-Air Temperature C Figure Figure NOTE A: Condition is with BALAE and open. Condition is with BALAE and connected. 6 VOLTAGE TRANSFER CHARACTERISTICS = 3 V VCC = TA = C LM LM VID = 3 V VI = V (LM, LM) 4 V (LM3) Voltage V 4 3 Emitter RL = 6 Ω LM3 Collecr RL = VCC COLLECTOR OUTPUT TRANSFER CHARACTERISTIC TEST CIRCUIT FOR FIGURE 3 = 3 V V O. VID Differential Input Voltage mv. VID VCC 6 Ω EMITTER OUTPUT TRANSFER CHARACTERISTIC TEST CIRCUIT FOR FIGURE 3 Figure 3 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 633 DALLAS, TEXAS 76 7
8 TYPICAL CHARACTERISTICS OUTPUT RESPONSE FOR VARIOUS INPUT OVERDRIVES OUTPUT RESPONSE FOR VARIOUS INPUT OVERDRIVES Differential Input Voltage V O Voltage V 4 3 mv mv mv t Time ns VCC± = ± V RC = Ω V TA = C mv 3 3 Differential Input Voltage V O Voltage V 4 3 mv mv mv t Time ns VCC± = ± V RC = Ω V TA = C mv 3 3 Figure 4 Figure VCC + = V V Ω VID VO VCC = V TEST CIRCUIT FOR FIGURES 4 AND 8 POST OFFICE BOX 633 DALLAS, TEXAS 76
9 TYPICAL CHARACTERISTICS OUTPUT RESPONSE FOR VARIOUS INPUT OVERDRIVES OUTPUT RESPONSE FOR VARIOUS INPUT OVERDRIVES Differential Input Voltage V O Voltage V mv mv mv t Time ns VCC± = ± V RE = kω V TA = C mv Differential Input Voltage V O Voltage V mv mv mv mv t Time ns VCC± = ± V RE = kω V TA = C Figure 6 Figure 7 VCC + = V VID VO kω VCC = V TEST CIRCUIT FOR FIGURES 6 AND 7 POST OFFICE BOX 633 DALLAS, TEXAS 76 9
10 TYPICAL CHARACTERISTICS OUTPUT CURRENT AND DISSIPATION vs OUTPUT VOLTAGE POSITIVE SUPPLY CURRENT vs POSITIVE SUPPLY VOLTAGE I O Current ma VCC± = ± V t s VID = mv TA = C PO (right scale) IO (left scale) P O Dissipation mw ICC+ Positive Supply Current ma TA = C No Load VID = mv VID = mv VO Voltage V Positive Supply Voltage V Figure 8 Figure 9 I CC Negative Supply Current ma NEGATIVE SUPPLY CURRENT vs NEGATIVE SUPPLY VOLTAGE VID = mv or mv TA = C No Load VCC Negative Supply Voltage V Figure POST OFFICE BOX 633 DALLAS, TEXAS 76
11 APPLICATION INFORMATION Figure through Figure 9 show various applications for the LM, LM, and LM3 comparars. kω kω pf Square Wave (fanout two Series 4 gates or equivalent) 3 kω BALAE 3 kω BAL/ STRB kω 39 kω Figure. -khz Free-Running Multivibrar Figure. Offset Balancing Input kω TTL Strobe N VCC Figure 3. Strobing Figure 4. Zero-Crossing Detecr V Input 4 kω 8 kω TTL 47 kω 8 kω Resisr values shown are for a --3-V logic swing and a -V threshold. May be added control speed and reduce susceptibility noise spikes. Figure. TTL Interface With High-Level Logic POST OFFICE BOX 633 DALLAS, TEXAS 76
12 APPLICATION INFORMATION kω kω V khz pf 4. kω kω TTL kω. µf kω Magnetic Transducer Figure 6. Detecr for Magnetic Transducer Figure 7. -khz Crystal Oscillar From D/A Network kω Analog Input BALAE Input TIP3 Sample. µf N TTL Strobe Typical input current is pa with inputs strobed off. Figure 8. Comparar and Solenoid Driver Figure 9. Strobing Both Input and Stages Simultaneously 3.9 kω Ω VCC + = V 3 kω kω 3 kω N378 BALAE BAL/ STRB Input MOS +. µf kω N VCC = V Figure. Low-Voltage Adjustable Reference Supply Figure. Zero-Crossing Detecr Driving MOS Logic POST OFFICE BOX 633 DALLAS, TEXAS 76
13 APPLICATION INFORMATION 3.9 kω = V 3 kω N378 N94 N94 +. µf N Input From TTL N.7 kω N Ω. kω Adjust set clamp level Figure. Precision Squarer V = V TIL kω From TTL Gate Ω TTL kω. µf Figure 3. Digital Transmission Isolar VCC + = V Input kω TL8 MΩ VCC = V kω +. µf + Figure 4. Positive-Peak Detecr POST OFFICE BOX 633 DALLAS, TEXAS 76 3
14 VCC + = V APPLICATION INFORMATION Input MΩ TL8 kω kω + + µf VCC = V Figure. Negative-Peak Detecr 3.9 kω VCC + = V N378 N7 TTL N R 3 kω R sets the comparison level. At comparison, the phodiode has less than mv across it decreasing dark current by an order of magnitude. Figure 6. Precision Phodiode Comparar VCC + Inputs TTL Strobe N378 VCC Transient voltage and inductive kickback protection Figure 7. Relay Driver With Strobe 4 POST OFFICE BOX 633 DALLAS, TEXAS 76
15 APPLICATION INFORMATION VCC + 3 Ω 6 Ω TIP3 kω kω Input kω TIP9. µf 47 Ω 3 Ω 6 Ω VCC Figure 8. Switching Power Amplifier 39 kω 6 Ω 3 kω 6 Ω TIP3 Reference kω. µf VCC V+ 6 Ω TIP9 s Input Ω kω Ω 6 Ω TIP9 39 kω 3 kω VCC 6 Ω 6 Ω TIP3 Figure 9. Switching Power Amplifiers POST OFFICE BOX 633 DALLAS, TEXAS 76
16 IMPORTANT NOTICE Texas Instruments (TI) reserves the right make changes its products or discontinue any semiconducr product or service without notice, and advises its cusmers obtain the latest version of relevant information verify, before placing orders, that the information being relied on is current. TI warrants performance of its semiconducr products and related software the specifications applicable at the time of sale in accordance with TI s standard warranty. Testing and other quality control techniques are utilized the extent TI deems necessary support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Certain applications using semiconducr products may involve potential risks of death, personal injury, or severe property or environmental damage ( Critical Applications ). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. Inclusion of TI products in such applications is undersod be fully at the risk of the cusmer. Use of TI products in such applications requires the written approval of an appropriate TI officer. Questions concerning potential risk applications should be directed TI through a local SC sales office. In order minimize risks associated with the cusmer s applications, adequate design and operating safeguards should be provided by the cusmer minimize inherent or procedural hazards. TI assumes no liability for applications assistance, cusmer product design, software performance, or infringement of patents or services described herein. Nor does TI warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating any combination, machine, or process in which such semiconducr products or services might be or are used. Copyright 996, Texas Instruments Incorporated
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Eight High-Current Latches in a Single Package High-Current -State True s Can Drive up to LSTTL Loads Full Parallel Access for Loading Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline
More informationSN54HC245, SN74HC245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
High-Current -State s Drive Bus Lines Directly or up to LSTTL Loads Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), Thin Shrink Small-Outline (PW), and Ceramic Flat (W) Packages,
More informationSN54HC373, SN74HC373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
Eight High-Current Latches in a Single Package High-Current -State True s Can Drive up to LSTTL Loads Full Parallel Access for Loading Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline
More informationNE556, SA556, SE556, SE556C DUAL PRECISION TIMERS
Two Precision Timing Circuits per Package Astable or Monostable Operation TTL-Compatible Output Can Sink or Source Up to 50 ma Active Pullup or Pulldown Designed to be Interchangeable With Signetics SE556,
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SLOS8C FEBRUARY 977 REVISED SEPTEMBER 996 2 DEVICES COVER COMMERCIAL, INDUSTRIAL, AND MILITARY TEMPERATURE RANGES Low Power Consumption High Input Impedance...JFET-Input Stage Wide Common-Mode and Differential
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Package Options Include Plastic Small-Outline (D), Thin Shrink Small-Outline (PW), and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 00-mil DIPs description
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ULNA THRU ULNA SLRS D, DECEMBER REVISED APRIL HIGH-VOLTAGE HIGH-CURRENT -ma Rated Collector Current (Single ) High-Voltage s... V Clamp Diodes Inputs Compatible With Various Types of Logic Relay Driver
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Meets or Exceeds the Requirement of TIA/EIA-232-F and ITU Recommendation V.28 Withstands Sustained Output Short Circuit to Any Low-Impedance Voltage Between 25 V and 25 V 2-µs Maximum Transition Time Through
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SNALS0, SNAS0, SN7ALS0, SN7AS0 Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 00-mil DIPs description These devices contain
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High-Current -State s Drive Bus Lines Directly or up to LSTTL Loads Bus-Structured Pinout Package Options Include Plastic Small-Outline (DW) and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and
More informationMC3486 QUADRUPLE DIFFERENTIAL LINE RECEIVER WITH 3-STATE OUTPUTS
Meets or Exceeds the Requirements of ANSI Standards EIA/TIA-422-B and EIA/TIA-423-B and ITU Recommendations V.10 and V.11 3-State, TTL-Compatible s Fast Transition Times Operates From Single 5-V Supply
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Complete PWM Power Control Circuitry Uncommitted Outputs for 200-mA Sink or Source Current Output Control Selects Single-Ended or Push-Pull Operation Internal Circuitry Prohibits Double Pulse at Either
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Package Optio Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 00-mil DIPs TYPE TYPICAL MAXIMUM CLOCK FREUEY (CL = 0 pf) (MHz) TYPICAL POWER
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SN Meets or Exceeds the Requirements of ANSI Standards EIA/TIA--B and RS-8 and ITU Recommendation V.. Designed for Multipoint Transmission on Long Bus Lines in Noisy Environments -State s Common-Mode Voltage
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Inputs Are TTL-Voltage Compatible EPIC (Enhanced-Performance Implanted CMOS) Process Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), Thin Very Small-Outline (DGV), Thin Shrink
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High-Current -State s Drive Bus Lines, Buffer Memory Address Registers, or Drive up to LSTTL Loads True s Package Options Include Plastic Small-Outline (D) and Ceramic Flat (W) Packages, Ceramic Chip Carriers
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Contain Four Flip-Flops With Double-Rail Outputs Applications Include: Buffer/Storage Registers Shift Registers Pattern Generators Package Options Include Plastic Small-Outline (D), Thin Shrink Small-Outline
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Short-Circuit Protection Offset-Voltage Null Capability Large Common-Mode and Differential Voltage Ranges No Frequency Compensation Required Low Power Consumption No Latch-Up Designed to Be Interchangeable
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Operation From Very Slow Input Transitions Temperature-Compensated Threshold Levels High Noise Immunity Same Pinouts as HC00 Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB),
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Meet or Exceed the Requirements of ANSI EIA/TIA-232-E and ITU Recommendation V.28 Very Low Power Consumption 5 mw Typ Wide Driver Supply Voltage Range ±4.5 V to ±15 V Driver Output Slew Rate Limited to
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Eight Flip-Flops With Single-Rail Outputs Clock Enable Latched to Avoid False Clocking Applications Include: Buffer/Storage Registers Shift Registers Pattern Generators Package Options Include Plastic
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3-State Buffer-Type Outputs Drive Bus Lines Directly Bus-Structured Pinout Package Optio Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Plastic (NT) and Ceramic (JT) DIPs
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AM6LS SLLSG JANUARY 979 REVISED FEBRUARY Meets or Exceeds the Requirements of ANSI TIA/EIA--B and ITU Recommendation V. Operates From a Single -V Supply TTL Compatible Complementary Outputs High Output
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SLOS19 FEBRUARY 1997 Output Swing Includes Both Supply Rails Low Noise...9 nv/ Hz Typ at f = 1 khz Low Input Bias Current...1 pa Typ Fully Specified for Both Single-Supply and Split-Supply Operation Common-Mode
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Complete PWM Power-Control Circuitry Uncommitted Outputs for 200-mA Sink or Source Current Output Control Selects Single-Ended or Push-Pull Operation Internal Circuitry Prohibits Double Pulse at Either
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Low r DS(on)... 0.18 Ω at V GS = 10 V 3-V Compatible Requires No External V CC TTL and CMOS Compatible Inputs V GS(th) = 1.5 V Max ESD Protection Up to 2 kv per MIL-STD-883C, Method 3015 1SOURCE 1GATE
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Timing From Microseconds to Hours Astable or Monostable Operation Adjustable Duty Cycle TTL-Compatible Output Can Sink or Source up to 00 ma Designed To Be Interchangeable With Signetics NE, SA, and SE
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Wide Range of Supply oltages: Single Supply...3 to 30 (LM2904 and LM2904Q...3 to 26 ) or Dual Supplies Low Supply-Current Drain Independent of Supply oltage... 0.7 Typ Common-Mode Input oltage Range Includes
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Low Power Consumption Wide Common-Mode and Differential Voltage Ranges Low Input Bias and Offset Currents Output Short-Circuit Protection Low Total Harmonic Distortion.3% Typ TL7, TL7A, TL7B, TL72 Low
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Meet or Exceed the Requirements of TIA/EIA-232-F and ITU Recommendation V.28 Very Low Power Consumption... 5 mw Typ Wide Driver Supply Voltage Range... ±4.5 V to ±15 V Driver Output Slew Rate Limited to
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±1% Output Tolerance at ±2% Output Tolerance Over Full Operating Range Thermal Shutdown description Internal Short-Circuit Current Limiting Pinout Identical to µa7800 Series Improved Version of µa7800
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SLRSB DECEMBER REVISED SEPTEMBER HIGH-VOLTAGE HIGH-CURRENT -ma Rated Collector Current (Single ) High-Voltage s... V Clamp Diodes Inputs Compatible With Various Types of Logic Relay Driver Applications
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Package Optio Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 00-mil DIPs TYPE TYPICAL MAXIMUM CLOCK FREUEY (CL = 0 pf) (MHz) TYPICAL POWER
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HIGH-VOLTAGE, HIGH-CURRENT 500-mA-Rated Collector Current (Single ) High-Voltage s...50 V Clamp Diodes Inputs Compatible With Various Types of Logic Relay Driver Applications Compatible With ULN2800A-Series
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Eight D-Type Flip-Flops in a Single Package -State Bus Driving True s Full Parallel Access for Loading Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin V CC and
More information54ACT11109, 74ACT11109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET
Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin V CC and GND Configuratio Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-µm
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Operates With Single -V Power Supply LinBiCMOS Process Technology Two Drivers and Two Receivers ± 0-V Input Levels Low Supply Current...8 ma Typical Meets or Exceeds TIA/EIA-22-F and ITU Recommendation
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Low Noise 10 Hz... 15 n/ Hz 1 khz... 10.5 n/ Hz 10 000-pF Load Capability 20-mA Min Short-Circuit Output Current 27-/µs Min Slew Rate High Gain-Bandwidth Product... 5.9 MHz Low IO... 500 µ Max at 25 C
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Complete PWM Power Control Function Totem-Pole Outputs for 200-mA Sink or Source Current Output Control Selects Parallel or Push-Pull Operation Internal Circuitry Prohibits Double Pulse at Either Output
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3-State Buffer-Type Outputs Drive Bus Lines Directly Bus-Structured Pinout Package Optio Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Plastic (NT) and Ceramic (JT) DIPs
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ULNA, ULNA, ULNA, ULNA SLRS DECEMBER REVISED APRIL HIGH-VOLTAGE HIGH-CURRENT -ma Rated Collector Current (Single ) High-Voltage s... V Clamp Diodes Inputs Compatible With Various Types of Logic Relay Driver
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-State Buffer-Type s Drive Bus Lines Directly Bus-Structured Pinout Package Optio Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), Standard Plastic (N) and Ceramic (J) 00-mil DIPs,
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Featuring Unitrode L and LD Products Now From Texas Instruments Wide Supply-Voltage Range:.5 V to V Separate Input-Logic Supply Internal ESD Protection Thermal Shutdown High-Noise-Immunity Inputs Functional
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ac or dc Signal Coupling Wide Bandwidth...>200 khz High Transfer-Gain Stability...±0.0%/ C 00 V Peak Isolation UL Approval Pending Applications Power-Supply Feedback Medical-Sensor Isolation Opto Direct-Access
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Direct Upgrades for the TL6x Low-Power BiFETs Low Power Consumption... 6.5 mw/channel Typ On-Chip Offset-Voltage Trimming for Improved DC Performance (1.5 mv, TL31A) Higher Slew Rate and Bandwidth Without
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Equivalent Full-Range Temperature Coefficient... 0 ppm/ C 0.-Ω Typical Output Impedance Sink-Current Capability...1 ma to 100 ma Low Output Noise Adjustable Output Voltage...V ref to 6 V Available in a
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Functionally Equivalent to AMD s AM2982 Improved I OH Specificatio Multiple Output Enables Allow Multiuser Control of the Interface Outputs Have Undershoot-Protection Circuitry Power-Up High-Impedance
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Single Down/Up Count-Control Line Look-Ahead Circuitry Enhances Speed of Cascaded Counters Fully Synchronous in Count Modes Asynchronously Presettable With Load Control Package Options Include Plastic
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Inputs Are TTL-Voltage Compatible Eight High-Current Latches in a Single Package High-Current -State True s Can Drive up to LSTTL Loads Full Parallel Access for Loading Package Optio Include Plastic Small-Outline
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SLRS28 SEPTEMBER 1988 Quadruple Circuits Capable of Driving High-Capacitance Loads at High Speeds Output Supply Voltage Range From 5 V to 24 V Low Standby Power Dissipation V CC3 Supply Maximizes Output
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Low Noise 1 Hz...15 n/ Hz 1 khz...1.5 n/ Hz 1 -pf Load Capability 2-mA Min Short-Circuit Output Current 27-/µs Min Slew Rate High Gain-Bandwidth Product...5.9 MHz Low IO... 5 µ Max at 25 C Single or Split
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SLCS8A OCTOBER 979 REVISED OCTOBER 99 Fast Response Times Improved Gain and Accuracy Fanout to Series 5/7 TTL Loads Strobe Capability Short-Circuit and Surge Protection Designed to Be Interchangeable With
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Inputs Are TTL Compatible EPIC (Enhanced-Performance Implanted CMOS) -µm Process Package Optio Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), Thin Shrink Small-Outline (PW), and DIP (N)
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Equivalent Full-Range Temperature Coefficient... 30 ppm/ C 0.2-Ω Typical Output Impedance Sink-Current Capability...1 ma to 100 ma Low Output Noise Adjustable Output Voltage...V ref to 36 V Available in
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Package Optio Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 00-mil DIPs description These devices contain four independent 2-input exclusive-or
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Fully Matches Parameters for SCSI Alternative 2 Active Termination Fixed 2.85-V Output ±1.5% Maximum Output Tolerance at T J = 25 C 1-V Maximum Dropout Voltage 500-mA Output Current ±3% Absolute Output
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