MC3487 QUADRUPLE DIFFERENTIAL LINE DRIVER
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1 Meets or Exceeds Requirements of ANSI EIA/TIA-422-B and ITU Recommendation V. -State, TTL-Compatible s Fast Transition Times High-Impedance Inputs Single -V Supply Power-Up and Power-Down Protection Designed to Be Interchangeable With Motorola MC487 A Y Z,2EN 2Z 2Y 2A GND D OR N PACKAGE (TOP VIEW) V CC 4A 4Y 4Z,4EN Z Y A description The MC487 offers four independent differential line drivers designed to meet the specifications of ANSI EIA/TIA-422-B and ITU Recommendation V.. Each driver has a TTL-compatible input buffered to reduce current and minimize loading. The driver outputs utilize -state circuitry to provide high-impedance states at any pair of differential outputs when the appropriate output enable is at a low logic level. Internal circuitry is provided to ensure a high-impedance state at the differential outputs during power-up and power-down transition times provided the output enable is low. The outputs are capable of source or sink currents of 48 ma. The MC487 is designed for optimum performance when used with the MC486 quadruple line receiver. It is supplied in a 6-pin dual-in-line package and operates from a single -V supply. The MC487 is characterized for operation from 0 C to 70 C. logic symbol logic diagram (positive logic),2en A 2A,4EN EN EN 2 6 Y Z 2Y 2Z,2EN A 2A Y Z 2Y 2Z A 4A Y Z 4Y 4Z,4EN A Y Z This symbol is in accordance with ANSI/IEEE Std and IEC Publication A 4 4Y 4Z Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 99, Texas Instruments Incorporated POST OFFICE BOX 60 DALLAS, TEXAS 726
2 schematics of inputs and outputs FUNCTION TABLE (each driver) INPUT OUTPUT OUTPUTS ENABLE Y Z H H H L L H L H X L Z Z H = TTL high level, L = TTL low level, X = irrelevant, Z = High impedance VCC EQUIVALENT OF EACH INPUT TYPICAL OF ALL OUTPUTS VCC Input 9 Ω NOM absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, V CC (see Note ) V Input voltage, V I V voltage, V O V Continuous total power dissipation See Dissipation Rating Table Operating free-air temperature range, T A C to 70 C Storage temperature range, T stg C to 0 C Lead temperature,6 mm (/6 inch) from case for 0 seconds: D or N package C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE : All voltage values, except differential output voltage, VOD, are with respect to the network ground terminal. PACKAGE DISSIPATION RATING TABLE TA 2 C DERATING FACTOR TA = 70 C POWER RATING ABOVE TA = 2 C POWER RATING D 90 mw 7.6 mw/ C 608 mw N 0 mw 9.2 mw/ C 76 mw 2 POST OFFICE BOX 60 DALLAS, TEXAS 726
3 recommended operating conditions MIN NOM MAX UNIT Supply voltage, VCC V High-level input voltage, VIH 2 V Low-level input voltage, VIL 0.8 V Operating free-air temperature, TA 0 70 C electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS MIN MAX UNIT VIK Input clamp voltage II = 8 ma High-level output voltage VIL = 0.8 V, VIH = 2 V, IOH = 20 ma 2. V Low-level output voltage VIL = 0.8 V, VIH = 2 V, IOL = 48 ma 0. V VOD Differential output voltage RL = 00 Ω, See Figure 2 VOD Change in magnitude of 4 differential output voltage RL = 00 Ω, See Figure ±0.4 V VOC Common-mode output voltage RL = 00 Ω, See Figure VOC Change in magnitude of 4 common-mode output voltage RL = 00 Ω, See Figure ±0.4 V IO current with power off VCC = 0 VO = 6 V 00 VO = 0.2 V 00 impedance V O = 2.7 V 00 IOZ High-impedance-state output current enables at 0.8 V V O = 0. V 00 II Input current at maximum input voltage VI =. V 00 µa IIH High-level input current VI = 2.7 V 0 µa IIL Low-level input current VI = 0. V 400 µa IOS Short-circuit output current VI = 2 V ma s disabled 0 ICC Supply current (all drivers) ma s enabled, No load 8 VOD and VOC are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from a high level to a low level. In ANSI Standard EIA/TIA-422-B, VOC, which is the average of the two output voltages with respect to ground, is called output offset voltage, VOS. Only one output at a time should be shorted, and duration of the short circuit should not exceed one second. switching characteristics over recommended operating free-air temperature range, V CC = V PARAMETER TEST CONDITIONS MIN MAX UNIT tplh Propagation delay time, low- to high-level output 20 ns tphl Propagation delay time, high- to low-level output CL = pf, See Figure 2 20 ns Skew time 6 ns tt(od) Differential-output transition time CL = pf, See Figure 20 ns tpzh enable time to high level 0 ns tpzl enable time to low level 0 ns CL =0pF F, See Figure 4 tphz disable time from high level 2 ns tplz disable time from low level 0 ns µa µa POST OFFICE BOX 60 DALLAS, TEXAS 726
4 PARAMETER MEASUREMENT INFORMATION VOD VOC Generator (see Note A) Figure. Differential and Common-Mode Voltages TEST CIRCUIT SW CL = pf (see Note B) 200 Ω See Note C V Input tplh Y Z Skew tphl tplh TAGE WAVEFORMS tphl Skew NOTES: A. The input pulse is supplied by a generator having the following characteristics: tr ns, tf ns, PRR MHz, duty cycle = 0%, ZO =. B. CL includes probe and stray capacitance. C. All diodes are N96 or N064. Figure 2. Test Circuit and Voltage Waveforms Generator (see Note A) CL RL = 00 Ω CL = pf (see Note B) Input tt(od) 90% 0% tt(od) TEST CIRCUIT TAGE WAVEFORMS NOTES: A. The input pulse is supplied by a generator having the following characteristics: tr ns, tf ns, PRR MHz, duty cycle = 0%, ZO =. B. CL includes probe and stray capacitance. Figure. Test Circuit and Voltage Waveforms 4 POST OFFICE BOX 60 DALLAS, TEXAS 726
5 PARAMETER MEASUREMENT INFORMATION or SW SW V 200 Ω Generator (see Note A) CL = pf (see Note B) kω See Note C SW2 TEST CIRCUIT Enable Input tphz tplz 0. V 0. V SW Closed SW2 Closed SW Closed SW2 Closed Enable Input tpzl tpzh SW Closed SW2 Open SW Open SW2 Closed TAGE WAVEFORMS NOTES: A. The input pulse is supplied by a generator having the following characteristics: tr ns, tf ns, PRR MHz, duty cycle = 0%, ZO =. B. CL includes probe and stray capacitance. C. All diodes are N96 or N064. Figure 4. Driver Test Circuit and Voltage Waveforms POST OFFICE BOX 60 DALLAS, TEXAS 726
6 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ( CRITICAL APPLICATIONS ). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER S RISK. In order to minimize risks associated with the customer s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI s publication of information regarding any third party s products or services does not constitute TI s approval, warranty or endorsement thereof. Copyright 998, Texas Instruments Incorporated
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HIGH-VOLTAGE, HIGH-CURRENT 500-mA-Rated Collector Current (Single ) High-Voltage s...50 V Clamp Diodes Inputs Compatible With Various Types of Logic Relay Driver Applications Compatible With ULN2800A-Series
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Member of Texas Instruments Widebus Family Latch-Up Performance Exceeds 250 ma Per JESD 17 description This 16-bit (dual-octal) noninverting bus transceiver contains two separate supply rails; B port has
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Member of the Texas Itruments idebus Family Load Clock and Unload Clock Can Be Asynchronous or Coincident 256 ords by 18 Bits Low-Power Advanced CMOS Technology Full, Empty, and Half-Full Flags Programmable
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4.5-V to 5.5-V V CC Operation Fanout (Over Temperature Range) Standard s... 0 LSTTL Loads Bus-Driver s... 5 LSTTL Loads Wide Operating Temperature Range of 55 C to 25 C Balanced Propagation Delays and
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WITH CLEA SDAS2A APIL 2 EVISED DECEMBE 4 Contain Eight Flip-Flops With Single-ail Outputs Buffered Clock and Direct-Clear Inputs Individual Data Input to Each Flip-Flop Applications Include: Buffer/Storage
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HIH-SPEED DIFFERENTIAL LINE DRIVER Designed for Signaling Rates Up to 5 Mbps Low-Voltage Differential Signaling With Typical Output Voltage of 7 mv and a -Ω Load Propagation Delay Time of. ns, Typical
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Low Skew, Low Pulse Skew for Clock-Distribution and Clock-Generation pplications Operates at 3.3-V LVTTL-Compatible Inputs and s Supports Mixed-Mode Signal Operation (-V Input and Voltages With 3.3-V )
More information74AC11873 DUAL 4-BIT D-TYPE LATCH WITH 3-STATE OUTPUTS SCAS095 JANUARY 1990 REVISED APRIL 1993
3-State Buffer-Type s Drive Bus Lines Directly Bus-Structured Pinout Flow-Through Architecture Optimizes PCB Layout Center-Pin V CC and Configuratio Minimize High-Speed Switching Noise EPIC (Enhanced-Performance
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Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin V CC and GND Configuratio Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-µm
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SNALS2C, SNAS2A, SNALS2C, SNAS2A SDAS2C JUL 9 REISED AUGUST 99 -State Outputs Drive Bus Lines or Buffer Memory Address Registers pnp Inputs Reduce dc Loading Package Optio Include Plastic Small-Outline
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SLRSB DECEMBER REVISED SEPTEMBER HIGH-VOLTAGE HIGH-CURRENT -ma Rated Collector Current (Single ) High-Voltage s... V Clamp Diodes Inputs Compatible With Various Types of Logic Relay Driver Applications
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WITH SELECTBLE POLRITY ND -STTE OUTPUTS SCS4 DECEMBER 99 REVISED NOVEMBER 99 Low Skew for Clock-Distribution and Clock-Generation pplicatio TTL-Compatible Inputs and s Distributes One Clock Input to Six
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Featuring Unitrode L and LD Products Now From Texas Instruments Wide Supply-Voltage Range:.5 V to V Separate Input-Logic Supply Internal ESD Protection Thermal Shutdown High-Noise-Immunity Inputs Functional
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5A1533, 7A1533 TAL D-TYPE TRANSPARENT LATHES SAS00 D257, JULY 187 REVISED APRIL 13 8-Latches in a Single Package 3-State Bus-Driving Inverting s Full Parallel Access for Loading Buffered ontrol Inputs
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8-Bit Resolution Linearity... ±1/2 LSB Maximum Differential Nonlinearity...±1/2 LSB Maximum Conversion Rate...60 MHz Min Nominal Output Signal Operating Range V CC to V CC 1 V TTL Digital Input Voltage
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Operates With Single 5-V Power Supply LinBiCMOS Process Technology Two Drivers and Two Receivers ± 30-V Input Levels Low Supply Current...8 ma Typical Meets or Exceeds TIA/EIA-232-F and ITU Recommendation
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Bidirectional Transceivers Meet or Exceed the Requirements of ANSI Standards TIA/EIA--B and TIA/EIA-8-A and ITU Recommendations V. and X.7 Designed for Multipoint Transmission on Long Bus Lines in Noisy
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Convert TTL Voltage Levels to MOS Levels High Sink-Current Capability Clamping Diodes Simplify System Design Open-Collector Driver for Indicator Lamps and Relays description These hex buffers/drivers feature
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Dual Versions of Highly Stable SN542 and SN742 One Shots SN5422 and SN7422 Demonstrate Electrical and Switching Characteristics That Are Virtually Identical to the SN542 and SN742 One Shots Pinout Is Identical
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Dependable Texas Instruments Quality and Reliability description These devices contain six independent inverters. SN5404, SN54LS04, SN54S04, SN5404... J PACKAGE SN54LS04, SN54S04... J OR W PACKAGE SN7404...
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ULNA THRU ULNA SLRS D, DECEMBER REVISED APRIL HIGH-VOLTAGE HIGH-CURRENT -ma Rated Collector Current (Single ) High-Voltage s... V Clamp Diodes Inputs Compatible With Various Types of Logic Relay Driver
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Convert TTL Voltage Levels to MOS Levels High Sink-Current Capability Clamping Diodes Simplify System Design Open-Collector Driver for Indicator Lamps and Relays s Fully Compatible With Most TTL Circuits
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SN54LS373, SN54LS374, SN54S373, SN54S374, Choice of Eight Latches or Eight D-Type Flip-Flops in a Single Package 3-State Bus-Driving s Full Parallel Access for Loading Buffered Control s Clock-Enable Has
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Complete PWM Power Control Circuitry Uncommitted Outputs for 00-mA Sink or Source Current Output Control Selects Single-Ended or Push-Pull Operation Internal Circuitry Prohibits Double Pulse at Either
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