SN54LS06, SN74LS06, SN74LS16 HEX INVERTER BUFFERS/DRIVERS WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS

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1 Convert TTL Voltage Levels to MOS Levels High Sink-Current Capability Clamping Diodes Simplify System Design Open-Collector Driver for Indicator Lamps and Relays s Fully Compatible With Most TTL Circuits description/ordering information SNLS0... J PACKAGE SN7LS0, SN7LS... D, DB, N, OR NS PACKAGE (TOP VIEW) V CC A Y A Y A Y These hex inverter buffers/drivers feature high-voltage open-collector outputs to interface with high-level circuits (such as MOS), or for driving high-current loads, and also are characterized for use as inverter buffers for driving TTL inputs. The LS0 devices have a rated output voltage of, and the SN7LS has a rated output voltage of V. The maximum sink current for the SNLS0 is 0 ma, and for the SN7LS0 and SN7LS it is 0 ma. These devices are compatible with most TTL families. s are diode-clamped to minimize transmission effects, which simplifies design. Typical power dissipation is 7 mw, and average propagation delay time is ns. SNLS0... FK PACKAGE (TOP VIEW) Y V CC A A No internal connection Y A Y TA 0 C to 70 C C to 2 C ORDERING INFORMATION PACKAGE ORDERABLE PART NUMBER TOP-SIDE MARKING PDIP N Tube SN7LS0N SN7LS0N Tube SN7LS0D SOIC D LS0 Tape and reel SN7LS0DR SOP NS Tape and reel SN7LS0NSR 7LS0 SSOP DB Tape and reel SN7LS0DBR LS0 CDIP J Tube SNLS0J SNLS0J Tube SNJLS0J SNJLS0J LCCC FK Tube SNJLS0FK SNJLS0FK Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 200, Texas Instruments Incorporated On products compliant to MIL-PRF-, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFICE BOX 0 DALLAS, TEXAS 72

2 logic diagram (positive logic) 2 A 9 Y A 0 Y A 2 Y Pin numbers shown are for the D, DB, J, N, and NS packages. schematic (each gate) 9 kω 2. kω kω kω 2. kω 2 kω 2 kω Resistor values shown are nominal. 2 POST OFFICE BOX 0 DALLAS, TEXAS 72

3 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, V CC V voltage, V I (see Note ) V voltage, V O (see Notes and 2): SNLS0, SN7LS SN7LS V Package thermal impedance, θ JA (see Note ): D package C/W DB package C/W N package C/W NS package C/W Storage temperature range, T stg C to 0 C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES:. All voltage values are with respect to. 2. This is the maximum voltage that should be applied to any output when it is in the off state.. The package thermal impedance is calculated in accordance with JESD -7. recommended operating conditions (see Note ) SNLS0 SN7LS0 SN7LS UNIT MIN NOM MAX MIN NOM MAX Supply voltage V VIH High-level input voltage 2 2 V VIL Low-level input voltage V High-level output voltage LS0 0 0 SN7LS IOL Low-level output current 0 0 ma TA Operating free-air temperature C NOTE : All unused inputs of the device must be held at or to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS s, literature number SCBA00. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS SN7LS0 SNLS0 SN7LS MIN TYP MAX MIN TYP MAX VIK = MIN, II = 2 ma.. V IOH = MIN, VIL =0V 0. LS0, = SN7LS, = V 0.2 IOL = ma = MIN, VIH = 2 V IOL = 0 ma 0.7 V IOL = 0 ma 0.7 II = MAX, VI = 7 V ma IIH = MAX, VI = 2. V µa IIL = MAX, VI = 0. V ma ICCH = MAX ma IC = MAX 0 0 ma For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. All typical values are at = V, and TA = 2 C. V UNIT ma POST OFFICE BOX 0 DALLAS, TEXAS 72

4 switching characteristics, V CC = V, T A = 2 C (see Figure ) PARAMETER FROM (INPUT) TO (OUTPUT) TEST CONDITIONS MIN MAX UNIT A Y =0Ω Ω, =pf ns POST OFFICE BOX 0 DALLAS, TEXAS 72

5 PARAMETER MEASUREMENT INFORMATION From (see Note B) From From kω S (see Note B) S2 FOR 2-STATE TOTEM-POLE OUTPUTS FOR OPEN-COLLECTOR OUTPUTS FOR -STATE OUTPUTS High-Level Pulse Low-Level Pulse. V. V tw. V. V PULSE DURATIONS Timing Data tsu. V th. V. V SETUP AND HOLD TIMES V V. V. V V Control (low-level enabling) tpzl. V. V tplz V In-Phase (see Note D) Out-of-Phase (see Note D) PROPAGATION DELAY TIMES. V. V. V. V Waveform (see Notes C and D) Waveform 2 (see Notes C and D) NOTES: A. includes probe and jig capacitance. B. All diodes are N0 or equivalent. C. Waveform is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. D. S and S2 are closed for,, tphz, and tplz; S is open and S2 is closed for tpzh; S is closed and S2 is open for tpzl. E. Phase relationships between inputs and outputs have been chosen arbitrarily for these examples. F. All input pulses are supplied by generators having the following characteristics: PRR MHz, ZO 0 Ω, tr. ns, tf 2. ns. G. The outputs are measured one at a time with one input transition per measurement. tpzh Figure. Load Circuits and Voltage Waveforms. V. V + 0. V tphz. V 0. V. V ENABLE AND DISABLE TIMES, -STATE OUTPUTS POST OFFICE BOX 0 DALLAS, TEXAS 72

SN54LS07, SN74LS07, SN74LS17 HEX BUFFERS/DRIVERS WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS

SN54LS07, SN74LS07, SN74LS17 HEX BUFFERS/DRIVERS WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS Convert TTL Voltage Levels to MOS Levels High Sink-Current Capability Clamping Diodes Simplify System Design Open-Collector Driver for Indicator Lamps and Relays description These hex buffers/drivers feature