24 DEVICES COVER COMMERCIAL, INDUSTRIAL, AND MILITARY TEMPERATURE RANGES. High Input Impedance...JFET-Input Stage Wide Common-Mode and Differential

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1 SLOS8C FEBRUARY 977 REVISED SEPTEMBER DEVICES COVER COMMERCIAL, INDUSTRIAL, AND MILITARY TEMPERATURE RANGES Low Power Consumption High Input Impedance...JFET-Input Stage Wide Common-Mode and Differential Latch-Up-Free Operation Voltage Ranges High Slew Rate...3 V/µs Typ Low Input Bias and Offset Currents Common-Mode Input Voltage Range Output Short-Circuit Protection Includes V CC Low Total Harmonic Distortion....3% Typ description The TL8x JFET-input operational amplifier family is designed to offer a wider selection than any previously developed operational amplifier family. Each of these JFET-input operational amplifiers incorporates well-matched, high-voltage JFET and bipolar transistors in a monolithic integrated circuit. The devices feature high slew rates, low input bias and offset currents, and low offset voltage temperature coefficient. Offset adjustment and external compensation options are available within the TL8x family. The C-suffix devices are characterized for operation from C to 7 C. The I-suffix devices are characterized for operation from C to 85 C. The M-suffix devices are characterized for operation over the full military temperature range of 55 C to 25 C. symbols OFFSET N TL8 TL82 (EACH AMPLIFIER) TL8 (EACH AMPLIFIER) IN IN OUT IN IN OUT OFFSET N2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 996, Texas Instruments Incorporated On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFICE BOX DALLAS, TEXAS 75265

2 SLOS8C FEBRUARY 977 REVISED SEPTEMBER 996 TL8, TL8A, TL8B U PACKAGE (TOP VIEW) TL82, TL82A, TL82B U PACKAGE (TOP VIEW) OFFSET N IN IN V CC V CC OUT OFFSET N2 OUT IN IN V CC V CC 2OUT 2IN 2IN TL8, TL8A, TL8B D, JG, P, OR PW PACKAGE (TOP VIEW) TL82, TL82A, TL82B D, JG, P, OR PW PACKAGE (TOP VIEW) OFFSET N IN IN V CC V CC OUT OFFSET N2 OUT IN IN V CC V CC 2OUT 2IN 2IN TL8M... FK PACKAGE (TOP VIEW) TL82M... FK PACKAGE (TOP VIEW) IN IN OFFSET N V CC OFFSET N2 V CC OUT IN IN V CC OUT 2IN V CC TL8M... FK PACKAGE (TOP VIEW) 2OUT 2IN TL8, TL8A, TL8B D, J, N, PW, OR W PACKAGE (TOP VIEW) IN OUT OUT IN OUT IN IN V CC 2IN 2IN 2OUT OUT IN IN V CC 3IN 3IN 3OUT IN V CC 2IN IN 2OUT 3OUT 3IN IN VCC 3IN No internal connection 2 POST OFFICE BOX DALLAS, TEXAS 75265

3 SLOS8C FEBRUARY 977 REVISED SEPTEMBER 996 TA VIOmax AT 25 C SMALL OUTLINE (D8) SMALL OUTLINE (D) CHIP CARRIER (FK) CERAMIC DIP (J) AVAILABLE OPTIONS PACKAGED DEVICES CERAMIC DIP (JG) PLASTIC DIP (N) PLASTIC DIP (P) TSSOP (PW) FLAT PACK (U) FLAT PACK (W) CHIP FORM (Y) 5 mv 6 mv 3 mv TL8CD TL8ACD TL8BCD TL8CP TL8ACP TL8BCP TL8CPW C to 7 C 5 mv 6 mv 3 mv TL82CD TL82ACD TL82BCD TL82CP TL82ACP TL82BCP TL82CPW TL82Y 5 mv 6 mv 3 mv TL8CD TL8ACD TL8BCD TL8CN TL8ACN TL8BCN TL8CPW TL8Y C to 85 C 55 C to 25 C 6 mv 6 mv 6 mv 6 mv 6 mv 9 mv TL8ID TL82ID TL8ID TL8ID TL8MFK TL82MFK TL8MFK TL8MJ The D package is available taped and reeled. Add R suffix to the device type (e.g., TL8CDR). TL8IN TL8MJG TL82MJG TL8IP TL82IP TL8MU TL82MU TL8MW POST OFFICE BOX DALLAS, TEXAS

4 SLOS8C FEBRUARY 977 REVISED SEPTEMBER 996 schematic (each amplifier) VCC IN IN 6 Ω 28 Ω OUT C 6 Ω VCC 8 Ω 8 Ω OFFSET N OFFSET N2 Component values shown are nominal. TL8 Only POST OFFICE BOX DALLAS, TEXAS 75265

5 SLOS8C FEBRUARY 977 REVISED SEPTEMBER 996 TL82Y chip information These chips, when properly assembled, display characteristics similar to the TL82. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS (7) (6) (5) IN IN 2OUT VCC (8) (3) () (2) OUT (5) (7) 2IN (6) 2IN 6 (8) () () VCC CHIP THICKNESS: 5 TYPICAL BONDING PADS: MINIMUM TJmax = 5 C TOLERAES ARE ±%. () 6 (2) (3) ALL DIMENSIONS ARE IN MILS. PIN () IS INTERNALLY CONNECTED TO BACKSIDE OF CHIP. POST OFFICE BOX DALLAS, TEXAS

6 SLOS8C FEBRUARY 977 REVISED SEPTEMBER 996 TL8Y chip information These chips, when properly assembled, display characteristics similar to the TL8. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform. 62 BONDING PAD ASSIGNMENTS (3) (2) () () (9) () (8) () (7) (2) (3) () (6) 5 IN IN 2OUT 3IN 3IN OUT CHIP THICKNESS: 5 TYPICAL BONDING PADS: MINIMUM TJmax = 5 C VCC () (3) () (2) OUT (5) (7) 2IN () (9) () TOLERAES ARE ±%. (6) ALL DIMENSIONS ARE IN MILS. PIN () IS INTERNALLY CONNECTED TO BACKSIDE OF CHIP. () VCC (8) (2) (3) 2IN 3OUT IN IN 6 POST OFFICE BOX DALLAS, TEXAS 75265

7 SLOS8C FEBRUARY 977 REVISED SEPTEMBER 996 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) TL8_C TL8_AC TL8_I TL8_M UNIT TL8_BC Supply voltage, VCC (see Note ) V Supply voltage VCC (see Note ) V Differential input voltage, VID (see Note 2) ± 3 ± 3 ± 3 V Input voltage, VI (see Notes and 3) ±5 ±5 ±5 V Duration of output short circuit (see Note ) unlimited unlimited unlimited Continuous total power dissipation See Dissipation Rating Table Operating free-air temperature range, TA to 7 to to 25 C Storage temperature range, Tstg 65 to 5 65 to 5 65 to 5 C Case temperature for 6 seconds, TC FK package 26 C Lead temperature,6 mm (/6 inch) from case for 6 seconds J or JG package 3 C Lead temperature,6 mm (/6 inch) from case for seconds D, N, P, or PW package C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES:. All voltage values, except differential voltages, are with respect to the midpoint between VCC and VCC. 2. Differential voltages are at IN with respect to IN. 3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 5 V, whichever is less.. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the dissipation rating is not exceeded. PACKAGE TA 25 C POWER RATING DERATING FACTOR DISSIPATION RATING TABLE DERATE ABOVE TA TA = 7 C POWER RATING TA = 85 C POWER RATING POWER RATING D (8 pin) 68 mw 5.8 mw/ C 32 C 6 mw 373 mw N/A D ( pin) 68 mw 7.6 mw/ C 6 C 6 mw 9 mw N/A FK 68 mw. mw/ C 88 C 68 mw 68 mw 273 mw J 68 mw. mw/ C 88 C 68 mw 68 mw 273 mw JG 68 mw 8. mw/ C 69 C 672 mw 56 mw 2 mw N 68 mw 9.2 mw/ C 76 C 68 mw 597 mw N/A P 68 mw 8. mw/ C 65 C 6 mw 52 mw N/A PW (8 pin) 525 mw.2 mw/ C 25 C 336 mw N/A N/A PW ( pin) 7 mw 5.6 mw/ C 25 C 8 mw N/A N/A U 675 mw 5. mw/ C 25 C 32 mw 35 mw 35 mw W 68 mw 8. mw/ C 65 C 6 mw 52 mw 2 mw POST OFFICE BOX DALLAS, TEXAS

8 Template Release Date: 79 TL8, TL8A, TL8B, TL82, TL82A, TL82B SLOS8C FEBRUARY 977 REVISED SEPTEMBER 996 electrical characteristics, V CC± = ±5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA TL8C TL82C TL8C TL8AC TL82AC TL8AC TLO8BC TL82BC TL8BC TL8I TL82I TL8I UNIT MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX 25 C VIO Input offset voltage VO =, RS = 5 Ω mv Full range α VIO Temperature coefficient of input offset voltage VO =, RS = 5 Ω Full range µv/ C IIO Input offset current VO = IIB Input bias current VO = VICR Common-mode input voltage range Maximum peak output VOM OM voltage swing AVD Large-signal differential 25 C pa Full range na 25 C pa Full range na 25 C ± 2 to 5 RL = kω 25 C ±2 ±3.5 ±2 ±3.5 ±2 ±3.5 ±2 ±3.5 RL kω RL 2 kω VO = ± V, RL 2 kω voltage amplification VO = ± V, RL 2 kω Full range ± 2 to 5 ± ±2 ±2 ±2 ±2 V ± ±2 ± ±2 ± ±2 ± ±2 25 C Full range to 5 ± 2 to 5 V V/mV B Unity-gain bandwidth 25 C MHz ri Input resistance 25 C Ω CMRR Common-mode mode VIC = VICRmin, rejection ratio VO =, RS = 5 Ω 25 C db ksvr Supply voltage rejection VCC = ±5 V to ± 9 V, ratio ( VCC± / VIO) VO =, RS = 5 Ω 25 C db ICC Supply current (per amplifier) VO =, No load 25 C ma VO/VO2 Crosstalk attenuation AVD = 25 C db All characteristics are measured under open-loop conditions with zero common-mode voltage unless otherwise specified. Full range for TA is C to 7 C for TL8_C, TL8_AC, TL8_BC and C to 85 C for TL8_I. Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive as shown in Figure 7. Pulse techniques must be used that maintain the junction temperature as close to the ambient temperature as possible. 8 POST OFFICE BOX DALLAS, TEXAS 75265

9 electrical characteristics, V CC ± = ±5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA VIO Input offsetvoltage VO =, RS=5Ω Ω αvio Temperature coefficient of input offset voltage IIO Input offset current VO = IIB Input bias current VO = VICR VOM AVD Common-mode input voltage range Maximum peak output voltage swing Large-signal differential voltage amplification TL8, TL8A, TL8B, TL82, TL82A, TL82B SLOS8C FEBRUARY 977 REVISED SEPTEMBER 996 TL8M, TL82M TL8M MIN TYP MAX MIN TYP MAX 25 C C to 25 C 9 5 UNIT VO =, RS = 5 Ω 55 C to 25 C 8 8 µv/ C mv 25 C 5 5 pa 25 C 2 2 na 25 C pa 25 C 5 5 na 25 C ± ± 2 to 5 ± ± 2 to 5 RL = kω 25 C ±2 ±3.5 ±2 ±3.5 RL kω RL 2 kω VO = ± V, RL 2 kω VO = ± V, RL 2 kω 55 C to25 C ±2 ±2 V ± ±2 ± ±2 25 C C to 25 C 5 5 B Unity-gain bandwidth 25 C 3 3 MHz ri Input resistance 25 C 2 2 Ω CMRR ksvr ICC Common-mode rejection ratio Supply voltage rejection ratio ( VCC ±/ VIO) Supply current (per amplifier) VIC = VICRmin, VO =, RS = 5 Ω VCC = ±5 V to ±9 V, VO =, RS = 5 Ω V V/mV 25 C db 25 C db VO =, No load 25 C ma VO/VO2 Crosstalk attenuation AVD = 25 C 2 2 db All characteristics are measured under open-loop conditions with zero common-mode input voltage unless otherwise specified. Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive as shown in Figure 7. Pulse techniques must be used that maintain the junction temperatures as close to the ambient temperature as is possible. operating characteristics, V CC± = ±5 V, T A = 25 C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SR Slew rate at unity gain VI = V, RL = 2 kω, TA = 55 C to 25 C, tr Rise time Overshoot factor Vn Equivalent input noise voltage RS =2Ω Ω VI = V, RL = 2 kω, CL = pf, See Figure 8 3 CL = pf, See Figure VI =2mV mv, RL =2kΩ kω, CL = pf, See Figure 5 V/µs.5 µs 2% f = khz 8 nv/ Hz f = Hz to khz µv In Equivalent input noise current RS = 2 Ω, f = khz. pa/ Hz THD Total harmonic distortion VO(rms) = V, RS kω, RL 2 kω, f = khz.3% On products compliant to MIL-PRF-38535, this parameter is not production tested. POST OFFICE BOX DALLAS, TEXAS

10 SLOS8C FEBRUARY 977 REVISED SEPTEMBER 996 electrical characteristics, V CC± = ±5 V, T A = 25 C (unless otherwise noted) PARAMETER TEST CONDITIONS TL82Y, TL8Y MIN TYP MAX VIO Input offset voltage VO =, RS = 5 Ω, 3 5 mv α VIO Temperature coefficient of input offset voltage VO =, RS = 5 Ω, 8 µv/ C IIO Input offset current VO =, 5 2 pa IIB Input bias current VO =, 3 pa VICR Common-mode input voltage range ± 2 to V 5 VOM Maximum peak output voltage swing RL = kω, ±2 ±3.5 V AVD Large-signal differential voltage amplification VO = ± V, RL 2 kω 25 2 V/mV B Unity-gain bandwidth 3 MHz ri Input resistance 2 Ω CMRR ksvr Common-mode rejection ratio Supply voltage rejection ratio ( VCC± / VIO) UNIT VIC = VICRmin, VO =, 7 86 db RS = 5 Ω 7 86 db VCC = ±5 V to ± 9 V, 7 86 db VO =, RS = 5 Ω 7 86 db ICC Supply current (per amplifier) VO =, No load. 2.8 ma VO/VO2 Crosstalk attenuation AVD = 2 db All characteristics are measured under open-loop conditions with zero common-mode voltage unless otherwise specified. Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive as shown in Figure 7. Pulse techniques must be used that maintain the junction temperature as close to the ambient temperature as possible. operating characteristics, V CC± = ±5 V, T A = 25 C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SR Slew rate at unity gain VI = V, RL = 2 kω, CL = pf, See Figure 8 3 V/µs tr Rise time Overshoot factor Vn Equivalent input noise voltage RS =2Ω Ω VI =2mV mv, RL =2kΩ kω, CL= pf, See Figure.5 µs 2% f = khz 8 nv/ Hz f = Hz to khz µv In Equivalent input noise current RS = 2 Ω, f = khz. pa/ Hz THD Total harmonic distortion VO(rms) = V, RS kω, RL 2 kω, f = khz.3% POST OFFICE BOX DALLAS, TEXAS 75265

11 SLOS8C FEBRUARY 977 REVISED SEPTEMBER 996 PARAMETER MEASUREMENT INFORMATION kω VI CL = pf OUT RL = 2 kω VI kω RL OUT CL = pf Figure Figure 2 kω C2 IN TL8 OUT C 5 pf IN N N2 IN N kω OUT.5 kω VCC Figure 3 Figure POST OFFICE BOX DALLAS, TEXAS 75265

12 SLOS8C FEBRUARY 977 REVISED SEPTEMBER 996 VOM AVD Maximum peak output voltage Large-signal differential voltage amplification TYPICAL CHARACTERISTICS Table of Graphs FIGURE Frequency 5, 6, 7 Free-air temperature 8 Load resistance 9 Supply voltage Free-air temperature Frequency 2 Differential voltage amplification Frequency with feed-forward compensation 3 PD Total power dissipation Free-air temperature ICC Supply current Free-air temperature 5 Supply voltage 6 IIB Input bias current Free-air temperature 7 Large-signal pulse response Time 8 VO Output voltage Elapsed time 9 CMRR Common-mode rejection ratio Free-air temperature 2 Vn Equivalent input noise voltage Frequency 2 THD Total harmonic distortion Frequency 22 Maximum Peak Output Voltage V V OM ±5 ±2.5 ± ±7.5 ±5 ±2.5 MAXIMUM PEAK OUTPUT VOLTAGE FREQUEY VCC ± = ±5 V VCC ± = ± V VCC ± = ±5 V RL = kω See Figure 2 V OM Maximum Peak Output Voltage V ±5 ±2.5 ± ±7.5 ±5 ±2.5 MAXIMUM PEAK OUTPUT VOLTAGE FREQUEY VCC ± = ±5 V VCC ± = ± V VCC ± = ±5 V RL = 2 kω See Figure 2 k k k M M f Frequency Hz Figure 5 k k k M M f Frequency Hz Figure 6 2 POST OFFICE BOX DALLAS, TEXAS 75265

13 SLOS8C FEBRUARY 977 REVISED SEPTEMBER 996 TYPICAL CHARACTERISTICS V OM Maximum Peak Output Voltage V ±5 ±2.5 ± ±7.5 ±5 ±2.5 MAXIMUM PEAK OUTPUT VOLTAGE FREQUEY k k k k M M M Figure 7 TA = 55 C f Frequency Hz VCC ± = ±5 V RL = 2 kω See Figure 2 V OM Maximum Peak Output Voltage V ±5 ±2.5 ± ±7.5 ±5 MAXIMUM PEAK OUTPUT VOLTAGE FREE-AIR TEMPERATURE ÎÎÎÎ RL = kω ±2.5 VCC ± = ± 5 V See Figure Figure 8 RL = 2 kω TA Free-Air Temperature C V OM Maximum Peak Output Voltage V ±5 ±2.5 ± ±7.5 ±5 ±2.5 MAXIMUM PEAK OUTPUT VOLTAGE LOAD RESISTAE VCC ± = ±5 V See Figure 2 V OM Maximum Peak Output Voltage V ±5 ±2.5 ± ±7.5 ±5 ±2.5 MAXIMUM PEAK OUTPUT VOLTAGE SUPPLY VOLTAGE RL = kω RL Load Resistance kω VCC ± Supply Voltage V 6 Figure 9 Figure Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX DALLAS, TEXAS

14 SLOS8C FEBRUARY 977 REVISED SEPTEMBER 996 TYPICAL CHARACTERISTICS 7 LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION FREE-AIR TEMPERATURE A VD Large-Signal Differential Voltage Amplification V/mV VCC ± = ±5 V VO = ± V RL = 2 kω TA Free-Air Temperature C Figure LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION FREQUEY VCC ± = ±5 V to ±5 V RL = kω A VD Large-Signal Differential Voltage Amplification V/mV 3 2 Phase Shift (right scale) Differential Voltage Amplification (left scale) Phase Shift k k k M 8 M f Frequency Hz Figure 2 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX DALLAS, TEXAS 75265

15 SLOS8C FEBRUARY 977 REVISED SEPTEMBER 996 TYPICAL CHARACTERISTICS DIFFERENTIAL VOLTAGE AMPLIFICATION FREQUEY WITH FEED-FORWARD COMPENSATION 6 A VD Differential Voltage Amplification V/mV VCC ± = ±5 V C2 = 3 pf See Figure 3 k k k M M f Frequency With Feed-Forward Compensation Hz Total Power Dissipation mw PD TOTAL POWER DISSIPATION FREE-AIR TEMPERATURE VCC ± = ±5 V No Signal No Load TA Free-Air Temperature C TL8, TL85 TL82, TL83 TL8 25 Figure 3 Figure Supply Current ma I CC ± SUPPLY CURRENT PER AMPLIFIER FREE-AIR TEMPERATURE VCC ± = ±5 V No Signal No Load Supply Current ma I CC ± No Signal No Load SUPPLY CURRENT SUPPLY VOLTAGE TA Free-Air Temperature C VCC ± Supply Voltage V 6 Figure 5 Figure 6 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX DALLAS, TEXAS

16 SLOS8C FEBRUARY 977 REVISED SEPTEMBER 996 TYPICAL CHARACTERISTICS Input Bias Current na IIB. V CC ± = ± 5 V INPUT BIAS CURRENT FREE-AIR TEMPERATURE Input and Output Voltages V VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE Output Input VCC ± = ±5 V RL = 2 k Ω CL = pf TA Free-Air Temperature C t Time µ s Figure 7 Figure 8 Output Voltage mv V O OUTPUT VOLTAGE ELAPSED TIME VCC ± = ±5 V RL = 2 k Ω CL = pf See Figure t Elapsed Time µ s.2 CMRR Common-Mode Rejection Ratio db COMMON-MODE REJECTION RATIO FREE-AIR TEMPERATURE VCC ± = ±5 V RL = kω TA Free-Air Temperature C 25 Figure 9 Figure 2 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 6 POST OFFICE BOX DALLAS, TEXAS 75265

17 SLOS8C FEBRUARY 977 REVISED SEPTEMBER 996 TYPICAL CHARACTERISTICS Vn Equilvalent Input Noise Voltage nv/ Hz EQUIVALENT INPUT NOISE VOLTAGE FREQUEY f Frequency Hz VCC ± = ±5 V AVD = RS = 2 Ω k k k k k THD Total Harmonic Distortion % TOTAL HARMONIC DISTORTION FREQUEY VCC ± = ±5 V AVD = VI(RMS) = 6 V k k k k k f Frequency Hz Figure 2 Figure 22 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. APPLICATION INFORMATION RF = kω VCC CF = 3.3 µf 3.3 kω 5 V TL8 kω Output Input R R2 TL8 C3 VCC Output f = 2π R F CF 5 V 3.3 kω 9. kω C R3 C2 R = R2 = 2(R3) =.5 MΩ C = C2 = C3 2 = pf fo = 2π R C = khz Figure 23 Figure 2 POST OFFICE BOX DALLAS, TEXAS

18 SLOS8C FEBRUARY 977 REVISED SEPTEMBER 996 APPLICATION INFORMATION MΩ VCC VCC TL8 Output A Input µf TL8 kω kω kω µf kω VCC VCC TL8 VCC TL8 Output B Output C Figure 25. Audio-Distribution Amplifier 8 pf 6 sin ωt N8 8 pf kω 8 kω (see Note A) 5 V VCC 88. kω 8 pf /2 TL82 VCC 88. kω /2 TL82 VCC VCC kω 6 cos ωt 88. kω N8 8 kω (see Note A) 5 V NOTE A: These resistor values may be adjusted for a symmetrical output. Figure 26. -KHz Quadrature Oscillator 8 POST OFFICE BOX DALLAS, TEXAS 75265

19 SLOS8C FEBRUARY 977 REVISED SEPTEMBER 996 APPLICATION INFORMATION 6 kω 6 kω 22 pf 22 pf 3 kω 3 kω 3 kω 3 kω 3 kω Input VCC 22 pf VCC 22 pf / 3 kω 3 kω TL8 / TL8.5 kω VCC.5 kω VCC VCC / TL8 VCC 3 kω / TL8 VCC VCC Output B Output A Output A Output B 2 khz/div Second-Order Bandpass Filter fo = khz, Q = 3, GAIN = Figure 27. Positive-Feedback Bandpass Filter 2 khz/div Cascaded Bandpass Filter fo = khz, Q = 69, GAIN = 6 POST OFFICE BOX DALLAS, TEXAS

20 IMPORTANT NOTICE Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied on is current. TI warrants performance of its semiconductor products and related software to the specifications applicable at the time of sale in accordance with TI s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Certain applications using semiconductor products may involve potential risks of death, personal injury, or severe property or environmental damage ( Critical Applications ). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. Inclusion of TI products in such applications is understood to be fully at the risk of the customer. Use of TI products in such applications requires the written approval of an appropriate TI officer. Questions concerning potential risk applications should be directed to TI through a local SC sales office. In order to minimize risks associated with the customer s applications, adequate design and operating safeguards should be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Nor does TI warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. Copyright 996, Texas Instruments Incorporated