TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS

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1 TLx, TLxA, TLxY Direct Upgrades TL7x and TL8x BiFET Operational Amplifiers Faster Slew Rate (2 /µs Typ) Without Increased Power Consumption On-Chip Offset oltage Trimming for Improved DC Performance and Precision Grades Are Available (1. m, TL1A) Available in TSSOP for Small Form-Facr Designs description The TLx series of JFET-input operational amplifiers offers improved dc and ac characteristics over the TL7x and TL8x families of BiFET operational amplifiers. On-chip zener trimming of offset voltage yields precision grades as low as 1. m (TL1A) for greater accuracy in dc-coupled applications. Texas Instruments improved BiFET process and optimized designs also yield improved bandwidth and slew rate without increased power consumption. The TLx devices are pin-compatible with the TL7x and TL8x and can be used upgrade existing circuits or for optimal performance in new designs. BiFET operational amplifiers offer the inherently higher input impedance of the JFET-input transisrs, without sacrificing the output drive associated with bipolar amplifiers. This makes them better suited for interfacing with high-impedance sensors or very low-level ac signals. They also feature inherently better ac response than bipolar or CMOS devices having comparable power consumption. The TLx family was designed offer higher precision and better ac response than the TL8x with the low noise floor of the TL7x. Designers requiring significantly faster ac response or ensured lower noise should consider the Excalibur TLE28x and TLE27x families of BiFET operational amplifiers. TA C 7 C C 8 C C 12 C IOmax AT 2 C 8 µ 1. m SMALL OUTLINE (D) TL1ACD TL2ACD TL1CD TL2CD TLACD AAILABLE OPTIONS PACKAGED DEICES CHIP CARRIER (FK) CERAMIC DIP (J) CERAMIC DIP (JG) PLASTIC DIP (N) PLASTIC DIP (P) TL1ACP TL2ACP TLACN TL1CP TL2CP m TLCD TLCN 8 µ 1. m TL1AID TL2AID TL1ID TL2ID TLAID TLAIN TL1AIP TL2AIP TL1IP TL2IP m TLID TLIN 8 µ 1. m TL1AMD TL2AMD TL1MD TL2MD TLAMD TL1AMFK TL2AMFK TL1MFK TL2MFK TLAMFK TLAMJ TL1AMJG TL2AMJG TL1MJG TL2MJG TLAMN TL1AMP TL2AMP TL1MP TL2MP m TLMD TLMFK TLMJ TLMN The D packages are available taped and reeled. Add R suffix device type (e.g., TLCDR). Chip forms are tested at 2 C. CHIP FORM (Y) TL1Y TL2Y TLY Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconducr products and disclaimers there appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 1997, Texas Instruments Incorporated POST OFFICE BOX 633 DALLAS, TEXAS 726 1

2 TLx, TLxA, TLxY description (continued) Because BiFET operational amplifiers are designed for use with dual power supplies, care must be taken observe common-mode input voltage limits and output swing when operating from a single supply. DC biasing of the input signal is required and loads should be terminated a virtual-ground node at midsupply. Texas Instruments TLE226 integrated virtual ground generar is useful when operating BiFET amplifiers from single supplies. The TLx are fully specified at ±1 and ±. For operation in low-voltage and/or single-supply systems, Texas Instruments LinCMOS families of operational amplifiers (TLC-prefix) are recommended. When moving from BiFET CMOS amplifiers, particular attention should be paid the slew rate and bandwidth requirements, and also the output loading. TL1 D, JG, OR P PACKAGE (TOP IEW) TL2 D, JG, OR P PACKAGE (TOP IEW) TL D, J, OR N PACKAGE (TOP IEW) OFFSET N1 IN IN CC NC CC OUT OFFSET N2 1OUT 1IN 1IN CC CC 2OUT 2IN 2IN 1OUT 1IN 1IN CC 2IN 2IN 2OUT OUT IN IN CC 3IN 3IN 3OUT TL1 FK PACKAGE (TOP IEW) TL2 FK PACKAGE (TOP IEW) TL FK PACKAGE (TOP IEW) NC IN NC IN NC NC OFFSET N1 NC NC CC NC OFFSET N2 NC NC NC NC CC NC OUT NC NC 1IN NC 1IN NC NC NC CC 1OUT NC NC 2IN CC NC NC NC 2OUT NC 2IN NC 1IN NC CC NC 2IN 1IN 1OUT NC OUT 3OUT 3IN IN IN 2OUT NC IN NC CC NC 3IN NC No internal connection 2 POST OFFICE BOX 633 DALLAS, TEXAS 726

3 TLx, TLxA, TLxY symbol (each amplifier) IN IN OUT equivalent schematic (each amplifier) CC Q1 Q2 Q3 Q7 Q1 JF3 Q6 Q16 Q11 Q13 See Note A IN IN JF1 OFFSET N1 OFFSET N2 R1 Q1 R2 Q R3 Q JF2 D1 C1 Q8 R R Q9 R6 Q12 R8 R7 R9 Q1 Q17 R1 D2 OUT CC NOTE A: OFFSET N1 and OFFSET N2 are only available on the TL1x. ACTUAL DEICE COMPONENT COUNT COMPONENT TL1 TL2 TL Transisrs Resisrs Diodes 2 3 Capacirs 1 2 These figures include all four amplifiers and all ESD, bias, and trim circuitry. POST OFFICE BOX 633 DALLAS, TEXAS 726 3

4 TLx, TLxA, TLxY TL1Y chip information This chip, when properly assembled, displays characteristics similar the TL1. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS (7) (6) IN IN (3) (2) CC (7) (6) OUT OFFSET N1 OFFSET N2 (1) () CC () 63 () () CHIP THICKNESS: 1 MILS TYPICAL BONDING PADS: MILS MINIMUM TJmax = 1 C (1) (2) (3) TOLERANCES ARE ±1%. ALL DIMENSIONS ARE IN MILS. PIN () IS INTERNALLY CONNECTED TO BACKSIDE OF CHIP. 3 POST OFFICE BOX 633 DALLAS, TEXAS 726

5 TLx, TLxA, TLxY TL2Y chip information This chip, when properly assembled, displays characteristics similar the TL2. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS (7) (6) () 1IN 1IN 2OUT CC (8) (3) (1) (2) 1OUT () (7) 2IN (6) 2IN () CC 72 (8) () (1) (2) (3) CHIP THICKNESS: 1 MILS TYPICAL BONDING PADS: MILS MINIMUM TJmax = 1 C TOLERANCES ARE ±1%. ALL DIMENSIONS ARE IN MILS. PIN () IS INTERNALLY CONNECTED TO BACKSIDE OF CHIP. 66 POST OFFICE BOX 633 DALLAS, TEXAS 726

6 TLx, TLxA, TLxY TL chip information This chip, when properly assembled, displays characteristics similar the TLC. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. These chips may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS (2) (3) (1) (1) (13) (12) 1IN 1IN 2OUT 3IN 3IN OUT CC () (3) (1) (2) 1OUT () (7) 2IN (1) (9) (1) (11) (6) (8) (12) (13) 2IN 3OUT IN IN CC 122 () (11) () (6) (1) (9) CHIP THICKNESS: 1 MILS TYPICAL BONDING PADS: MILS MINIMUM TJmax = 1 C TOLERANCES ARE ±1%. ALL DIMENSIONS ARE IN MILS. PIN (11) IS INTERNALLY CONNECTED TO BACKSIDE OF THE CHIP. (7) (8) (6) (7) (8) (9) 71 6 POST OFFICE BOX 633 DALLAS, TEXAS 726

7 TLx, TLxA, TLxY absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, CC (see Note 1) Supply voltage, CC (see Note 1) Differential input voltage (see Note 2) ± 3 Input voltage range, I (any input, see Notes 1 and 3) ±1 Input current, I I (each input) ±1 ma Output current, I O (each output) ±8 ma Total current in CC ma Total current out of CC ma Duration of short-circuit current at (or below) 2 C (see Note ) unlimited Continuous tal power dissipation See Dissipation Rating Table Operating free-air temperature range, T A : C suffix C 7 C I suffix C 8 C M suffix C 12 C Srage temperature range C 1 C Case temperature for 6 seconds: FK package C Lead temperature 1,6 mm (1/16inch) from case for 1 seconds: D, N, or P package C Lead temperature 1,6 mm (1/16inch) from case for 6 seconds: J or JG package C Stresses beyond those listed under absolute maximum ratings may cause permanent damage the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect the midpoint between CC and CC. 2. Differential voltages are at IN with respect IN. 3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 1, whichever is less.. The output may be shorted either supply. Temperature and/or supply voltages must be limited ensure that the maximum dissipation rating is not exceeded. PACKAGE TA 2 C POWER RATING DISSIPATION RATING TABLE DERATING FACTOR ABOE TA = 7 C POWER RATING TA = 8 C POWER RATING TA = 12 C POWER RATING D8 72 mw.8 mw/ C 6 mw 377 mw 1 mw D1 9 mw 7.6 mw/ C 68 mw 9 mw 19 mw FK 137 mw 11. mw/ C 88 mw 71 mw 27 mw J 137 mw 11. mw/ C 88 mw 71 mw 27 mw JG 1 mw 8. mw/ C 672 mw 6 mw 21 mw N 17 mw 12.6 mw/ C 18 mw 819 mw 31 mw P 1 mw 8. mw/ C 6 mw 2 mw 2 mw recommended operating conditions C SUFFIX I SUFFIX M SUFFIX MIN MAX MIN MAX MIN MAX Supply voltage, CC± ± ±1 ± ±1 ± ±1 Common-mode mode input voltage, IC CC ± = ± Operating free-air temperature, TA C UNIT POST OFFICE BOX 633 DALLAS, TEXAS 726 7

8 TLx, TLxA, TLxY TL1C and TL1AC electrical characteristics at specified free-air temperature IO αio IIO IIB ICR OM OM AD TL1C, TL1AC PARAMETER TEST CONDITIONS TA CC ± = ± CC ± = ± 1 UNIT Input offset voltage Temperature coefficient of input offset voltage Input offset voltage long-term drift Input offset current Input bias current Common-mode input voltage range Maximum positive peak output voltage swing Maximum negative peak output voltage swing Large-signal differential voltage amplification O =, IC =, RS = Ω TL1C TL1AC TL1C TL1AC MIN TYP MAX MIN TYP MAX 2 C Full range C Full range C 7 C 2 C 7 C m µ / C 2 C.. µ/mo O O =, IC =, 2 C 1 1 pa See Figure 7 C na O O =, IC =, 2 C pa See Figure 7 C.1.2 na RL =1kΩ RL =2kΩ RL =1kΩ RL =2kΩ 2 C Full range C Full range C Full range C Full range C Full range C C /m 7 C ri Input resistance 2 C Ω ci Input capacitance 2 C 1 12 pf CMRR ksr Common-modemode IC = ICRmin, rejection ratio O =, RS =Ω Ω Supply-voltage rejection ratio ( CC ± / IO) 2 C C db 7 C C O =, RS = Ω C db 7 C C ICC Supply current O O =, No load C ma 7 C Full range is C 7 C. This parameter is tested on a sample basis for the TL1A. For other test requirements, please contact the facry. This statement has no bearing on testing or nontesting of other parameters. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 1 C extrapolated using the Arrhenius equation and assuming an activation energy of.96 e. For CC ± = ±, O = ±2.3, or for, O = ±1. 8 POST OFFICE BOX 633 DALLAS, TEXAS 726

9 TLx, TLxA, TLxY TL1C and TL1AC operating characteristics at specified free-air temperature SR SR TL1C, TL1AC PARAMETER TEST CONDITIONS TA CC ± = ± UNIT MIN TYP MAX MIN TYP MAX 2 C Positive slew rate Full at unity gain , CL = 1 pf, range /µs See Figure 1 2 C Negative e slew rate Full at unity gain range C 6 tr Rise time C tf n N(PP) In THD B1 φm Fall time 7 C I(PP) = ±1 m, 2 C 7, C 6 CL = 1 pf, See Figures 1 and 2 7 C C 2% 19% Overshoot facr C 2% 19% 7 C 2% 19% Equivalent input noise f = 1 Hz 2 C 7 7 voltage RS = 2 Ω, f = 1 khz 2 C n/ Hz Peak--peak equivalent See Figure 3 f = 1 Hz 2 C µ input noise voltage 1 khz Equivalent input noise current Total harmonic disrtion Unity-gain bandwidth f = 1 khz 2 C.1.1 pa/ Hz RS = 1 kω, f = 1 khz, I = 1 m,, CL =2pF F, See Figure Phase margin at unity I = 1 m,, gain CL =2pF F, See Figure 2 C.3%.3% 2 C ns C MHz 7 C C 9 62 C C 9 62 Full range is C 7 C. For CC ± = ±, I(PP) = ±1 ; for, I(PP) = ±. This parameter is tested on a sample basis for the TL1A. For other test requirements, please contact the facry. This statement has no bearing on testing or nontesting of other parameters. For CC ± = ±, Orms = 1 ; for, Orms = 6. POST OFFICE BOX 633 DALLAS, TEXAS 726 9

10 TLx, TLxA, TLxY TL1I and TL1AI electrical characteristics at specified free-air temperature IO αio IIO IIB ICR OM OM AD TL1I, TL1AI PARAMETER TEST CONDITIONS TA CC ± = ± UNIT A MIN TYP MAX MIN TYP MAX Input offset voltage Temperature coefficient of input offset voltage Input offset voltage long-term drift Input offset current Input bias current Common-mode input voltage range Maximum positive peak output voltage swing Maximum negative peak output voltage swing Large-signal differential voltage amplification O =, IC =, RS = Ω TL1I TL1AI TL1I TL1AI 2 C Full range C Full range C 8 C 2 C 8 C m µ/ C 2 C.. µ/mo O O =, IC =, 2 C 1 1 pa See Figure 8 C na O O =, IC =, 2 C pa See Figure 8 C na RL =1kΩ RL =2kΩ RL =1kΩ RL =2kΩ 2 C Full range C Full range C Full range C Full range C Full range C C /m 8 C ri Input resistance 2 C Ω ci Input capacitance 2 C 1 12 pf CMRR ksr Common-modemode rejection ratio Supply-voltage rejection O =, ratio ( CC±/ IO) RS =Ω Ω = 2 C IC ICRmin, O =, C db RS = Ω 8 C C C db 8 C C ICC Supply current O =, No load C ma 8 C Full range is C 8 C This parameter is tested on a sample basis for the TL1A. For other test requirements, please contact the facry. This statement has no bearing on testing or nontesting of other parameters. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 1 C extrapolated using the Arrhenius equation and assuming an activation energy of.96 e. For CC ± = ±, O = ±2.3, or for, O = ±1. 1 POST OFFICE BOX 633 DALLAS, TEXAS 726

11 TL1I and TL1AI operating characteristics at specified free-air temperature SR SR TLx, TLxA, TLxY TL1I, TL1AI PARAMETER TEST CONDITIONS TA CC ± = ± UNIT MIN TYP MAX MIN TYP MAX 2 C Positive slew rate Full at unity gain 11, CL = 1 pf, range /µs See Figure 1 2 C Negative e slew rate Full at unity gain 11 range 2 C 6 tr Rise time C 2 3 tf n N(PP) In THD B1 Fall time 8 C 6 6 I(PP) = ±1 m, 2 C 7, Ω C 1 3 CL = 1 pf, See Figures 1 and 2 8 C C 2% 19% Overshoot facr C 2% 19% 8 C 2% 19% Equivalent input noise f = 1 Hz 2 C 7 7 voltage RS = 2 Ω, f = 1 khz 2 C n/ Hz Peak--peak equivalent See Figure 3 f = 1 Hz 2 C µ input noise voltage 1 khz Equivalent input noise current Total harmonic disrtion Unity-gain bandwidth f = 1 khz 2 C.1.1 pa/ Hz RS = 1 kω, f = 1 khz, I = 1 m,, CL =2pF F, See Figure 2 C.3%.3% 2 C ns C MHz 8 C C 9 62 Phase margin at unity I = 1 m,, φm C 8 61 gain CL =2pF F, See Figure 8 C 9 62 Full range is C 8 C. For CC ± = ±, I(PP) = ±1 ; for, I(PP) = ±. This parameter is tested on a sample basis for the TL1A. For other test requirements, please contact the facry. This statement has no bearing on testing or nontesting of other parameters. For CC ± = ±, Orms = 1 ; for, Orms = 6. POST OFFICE BOX 633 DALLAS, TEXAS

12 TLx, TLxA, TLxY TL1M and TL1AM electrical characteristics at specified free-air temperature IO αio IIO IIB ICR TL1M, TL1AM PARAMETER TEST CONDITIONS TA CC ± = ± CC ± = ± 1 UNIT A MIN TYP MAX MIN TYP MAX Input offset voltage Temperature coefficient of input offset voltage Input offset voltage long-term drift Input offset current Input bias current Common-mode input voltage range O =, IC =, RS = Ω RL =1kΩ Maximum positive peak OM output voltage swing RL =2kΩ OM AD Maximum negative peak output voltage swing Large-signal differential voltage amplification TL1M 2C Full range C TL1AM Full range TL1M TL1AM 2 C 12 C 2 C 12 C m µ/ C 2 C.. µ/mo O O =, IC =, 2 C 1 1 pa See Figure 12 C na O O =, IC =, 2 C pa See Figure 12 C 1 2 na RL =1kΩ RL =2kΩ 2 C Full range C Full range C Full range C Full range C Full range C C /m 12 C ri Input resistance 2 C Ω ci Input capacitance 2 C 1 12 pf CMRR ksr Common-mode mode rejection ratio Supply-voltage rejection ratio ( CC±/ IO) = 2 C IC ICRmin, O =, C db RS = Ω 12 C C O =, RS = Ω C db 12 C C ICC Supply current O O =, No load C ma 12 C Full range is C 12 C. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 1 C extrapolated using the Arrhenius equation and assuming an activation energy of.96 e. For CC ± = ±, O = ± 2.3, or for, O = ±1. 12 POST OFFICE BOX 633 DALLAS, TEXAS 726

13 TLx, TLxA, TLxY TL1M and TL1AM operating characteristics at specified free-air temperature SR SR TL1M, TL1AM PARAMETER TEST CONDITIONS TA CC± = ± CC± = ±1 UNIT A MIN TYP MAX MIN TYP MAX Positive slew rate at unity gain Negative slew rate at unity gain, CL L = 1 pf, See Figure 1 2 C C C 6 tr Rise time C 1 2 tf n N(PP) In THD B1 Fall time 12 C I(PP) = ±1 m, 2 C 7, Ω C 1 2 CL = 1 pf, See Figures 1 and 2 12 C C 2% 19% Overshoot facr C 2% 19% 12 C 2% 19% Equivalent input noise f = 1 Hz 2 C 7 7 n/ Hz voltage RS = 2 Ω, f = 1 khz 2 C Peak--peak equivalent See Figure 3 f = 1 Hz 2 C µ input noise voltage 1 khz Equivalent input noise current Total harmonic disrtion Unity-gain bandwidth /µ s f = 1 khz 2 C.1.1 pa/ Hz RS = 1 kω, f = 1 khz RL = 2kΩ, I = 1 m,, CL =2pF F, See Figure 2 C.3%.3% 2 C ns C MHz 12 C C 9 62 Phase margin at unity I = 1 m,, φm C 7 61 gain CL =2pF F, See Figure 12 C 9 62 For CC ± = ±, I(PP) = ±1 ; for, I(PP) = ±. This parameter is tested on a sample basis for the TL1A. For other test requirements, please contact the facry. This statement has no bearing on testing or nontesting of other parameters. For CC ± = ±, Orms = 1 ; for, Orms = 6. POST OFFICE BOX 633 DALLAS, TEXAS

14 TLx, TLxA, TLxY TL1Y electrical characteristics, T A = 2 C TL1Y PARAMETER TEST CONDITIONS CC ± = ± CC ± = ± 1 UNIT O =, IC =, IO Input offset voltage RS = Ω O =, IC =, IIO Input offset current O See Figure O =, IC =, IIB Input bias current See Figure ICR OM OM AD Common-mode input voltage range MIN TYP MAX MIN TYP MAX m pa 2 3 pa Maximum positive peak output voltage RL = 1 kω swing Maximum negative peak output voltage RL = 1 kω swing Large-signal differential voltage amplification 9 1 /m ri Input resistance Ω ci Input capacitance 1 12 pf CMRR ksr Common-mode rejection ratio Supply-voltage rejection ratio ( CC ± / IO) IC = ICRmin, O =, RS = Ω 8 93 db O =, RS = Ω db ICC Supply current O =, No load ma For CC ± = ±, O = ±2.3, or for CC ± = ± 1, O = ±1. 1 POST OFFICE BOX 633 DALLAS, TEXAS 726

15 TLx, TLxA, TLxY TL1Y operating characteristics, T A = 2 C SR SR TL1Y PARAMETER TEST CONDITIONS CC± = ± CC± = ±1 UNIT Positive slew rate at unity gain Negative slew rate at unity gain MIN TYP MAX MIN TYP MAX, CL = 1 pf, 16 2 See Figure tr Rise time I(PP) = ±1 m, 6 Ω tf Fall time, ns 7 CL = 1 pf, Overshoot facr See Figures 1 and 2 2% 19% f = 1 Hz 7 7 n Equivalent input noise voltage n/ Hz RS = 2 Ω, f = 1 khz Peak--peak equivalent input See Figure 3 f = 1 Hz N(PP) µ noise voltage 1 khz In Equivalent input noise current f = 1 khz.1.1 pa/ Hz THD B1 φm Total harmonic disrtion Unity-gain bandwidth Phase margin at unity gain RS = 1 kω, f = 1 khz, I = 1 m,, CL = 2 pf, See Figure I = 1 m,, CL = 2 pf, See Figure.3%.3% /µs MHz 9 62 For CC ± = ±, I(PP) = ±1 ; for, I(PP) = ±. This parameter is tested on a sample basis for the TL1A. For other test requirements, please contact the facry. This statement has no bearing on testing or nontesting of other parameters. For CC ± = ±, Orms = 1 ; for, Orms = 6. POST OFFICE BOX 633 DALLAS, TEXAS 726 1

16 TLx, TLxA, TLxY TL2C and TL2AC electrical characteristics at specified free-air temperature IO αio TL2C, TL2AC PARAMETER TEST CONDITIONS TA CC± = ± CC± = ±1 UNIT A MIN TYP MAX MIN TYP MAX Input offset voltage Temperature coefficient of input offset voltage Input offset voltage longterm drift TL2C O =, TL2AC IC =, RS = Ω TL2C O =, RS = Ω O =, IIO Input offset current See Figure O =, IIB Input bias current See Figure ICR Common-mode input voltage range RL =1kΩ Maximum positive peak OM output voltage swing RL =2kΩ OM AD Maximum negative peak output voltage swing Large-signal differential voltage amplification RL =1kΩ RL =2kΩ TL2AC 2 C Full range C Full range C 7 C 2 C 7 C m µ/ C IC =, 2 C.. µ/mo IC =, IC =, 2 C 1 1 pa 7 C na 2 C pa 7 C.1.2 na 2 C Full range C Full range C Full range C Full range C Full range C C /m 7 C ri Input resistance 2 C Ω ci Input capacitance 2 C 1 12 pf CMRR Common-mode mode IC = ICRmin, rejection ratio O =, 2 C RS = Ω C db 7 C Full range is C 7 C. This parameter is tested on a sample basis. For other test requirements, please contact the facry. This statement has no bearing on testing or nontesting of other parameters. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 1 C extrapolated using the Arrhenius equation and assuming an activation energy of.96 e. For CC ± = ±, O = ±2.3 ; at, O = ±1. 16 POST OFFICE BOX 633 DALLAS, TEXAS 726

17 TLx, TLxA, TLxY TL2C and TL2AC electrical characteristics at specified free-air temperature (continued) ksr ICC TL2C, TL2AC PARAMETER TEST CONDITIONS TA CC± = ± CC± = ±1 UNIT A MIN TYP MAX MIN TYP MAX Supply-voltage lt rejection ratio ( CC ±/ IO) Supply current (two amplifiers) 2 C O =, RS = Ω C db 7 C C O =, No load C ma 7 C O1/O2 Crosstalk attenuation AD = 1 2 C db TL2C and TL2AC operating characteristics at specified free-air temperature SR SR TL2C, TL2AC PARAMETER TEST CONDITIONS TA CC ± = ± CC ± = ± 1 UNIT A MIN TYP MAX MIN TYP MAX Slew rate at unity gain 2 C , CL = 1 pf, Full range 8 Negative slew rate See Figure 1 2 C at unity gain Full range 8 2 C 6 tr Rise time C tf n N(PP) In THD B1 φm Fall time 7 C I(PP) = ±1 m, 2 C 7, Ω C 6 CL = 1 pf, See Figures 1 and 2 7 C C 2% 19% Overshoot facr C 2% 19% 7 C 2% 19% Equivalent input noise f = 1 Hz 2 C voltage RS = 2 Ω, f = 1 khz 2 C n/ Hz t input noise current 1 khz Peak--peak equivalent See Figure 3 f = 1 Hz 2 C µ Equivalent input noise current Total harmonic disrtion Unity-gain bandwidth /µs f = 1 khz 2 C.1.1 pa/ Hz RS = 1 kω, f = 1 khz, I = 1 m,, CL =2pF F, See Figure Phase margin at unity I = 1 m,, gain CL = 2 pf, See Figure 2 C.3%.3% 2 C 3 3 ns C MHz 7 C C 6 63 C C 6 63 Full range is C 7 C. For CC ± = ±, I(PP) = ±1 ; for, I(PP) = ±. This parameter is tested on a sample basis. For other test requirements, please contact the facry. This statement has no bearing on testing or nontesting of other parameters. For CC ± = ±, O(RMS) = 1 ; for CC ± = ± 1, O(RMS) = 6. POST OFFICE BOX 633 DALLAS, TEXAS

18 TLx, TLxA, TLxY TL2I and TL2AI electrical characteristics at specified free-air temperature IO αio TL2I, TL2AI PARAMETER TEST CONDITIONS TA CC± = ± CC± = ±1 UNIT A MIN TYP MAX MIN TYP MAX Input offset voltage Temperature re coefficient Input offset voltage longterm drift TL2I O =, TL2AI IC =, RS = Ω TL2I O =, RS = Ω TL2AI 2 C Full range C Full range C 8 C 2 C 8 C m µ/ C IC =, 2 C.. µ/mo O =, IC =, 2 C 1 1 pa IIO Input offset current See Figure 8 C na O =, IC =, 2 C pa IIB Input bias current See Figure 8 C na ICR Common-mode input voltage range RL =1kΩ Maximum positive peak OM output voltage swing RL =2kΩ OM AD Maximum negative peak output voltage swing Large-signal differential voltage amplification RL =1kΩ RL =2kΩ 2 C Full range C Full range C Full range C Full range C Full range C C /m 8 C ri Input resistance 2 C Ω ci Input capacitance 2 C 1 12 pf CMRR Common-mode mode IC = ICRmin, rejection ratio O =, 2 C RS = Ω C db 8 C Full range is C 8 C. This parameter is tested on a sample basis. For other test requirements, please contact the facry. This statement has no bearing on testing or nontesting of other parameters Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 1 C extrapolated TA = 2 C using the Arrhenius equation and assuming an activation energy of.96 e. At CC ± = ±, O = ± 2.3 ; at, O = ±1. 18 POST OFFICE BOX 633 DALLAS, TEXAS 726

19 TLx, TLxA, TLxY TL2I and TL2AI electrical characteristics at specified free-air temperature (continued) ksr ICC TL2I, TL2AI PARAMETER TEST CONDITIONS TA CC± = ± CC± = ±1 UNIT A MIN TYP MAX MIN TYP MAX Supply-voltage lt rejection ratio ( CC±/ IO) Supply current (two amplifiers) 2 C O =, RS = Ω C db 8 C C O =, No load C ma 8 C O1/O2 Crosstalk attenuation AD = 1 2 C db TL2I and TL2AI operating characteristics at specified free-air temperature TL2I, TL2AI PARAMETER TEST CONDITIONS TA CC ± = ± CC ± = ± 1 UNIT A MIN TYP MAX MIN TYP MAX SR Slew rate at unity gain SR Negative slew rate at unity gain 2 C RL L = 2 kω,, CL L = 1 pf, Full range 8 See Figure 1 2 C Full range 8 2 C 6 tr Rise time C 2 3 tf Fall time 8 C C 7 I(PP) = ±1 m,, CL = 1 pf, C 1 3 See Figures 1 and 2 8 C C 2% 19% Overshoot facr C 2% 19% 8 C 2% 19% Equivalent input noise f = 1 Hz 2 C n voltage RS = 2 Ω, f = 1 khz 2 C Peak--peak equivalent See Figure 3 1 Hz N(PP) f = 2 C µ input noise current 1 khz In THD B1 φm Equivalent input noise current Total harmonic disrtion Unity-gain bandwidth /µs f = 1 khz 2 C.1.1 pa/ Hz RS = 1 kω, f = 1 khz, I = 1 m,, CL =2pF F, See Figure Phase margin at unity I = 1 m,, gain CL = 2 pf, See Figure 2 C.3%.3% 2 C 3 3 ns C MHz 8 C C 6 63 C C 6 63 Full range is C 8 C. For CC ± = ±, I(PP) = ±1 ; for, I(PP) = ±. This parameter is tested on a sample basis. For other test requirements, please contact the facry. This statement has no bearing on testing or nontesting of other parameters. For CC ± = ±, O(RMS) = 1 ; for CC ± = ± 1, O(RMS) = 6. POST OFFICE BOX 633 DALLAS, TEXAS

20 TLx, TLxA, TLxY TL2M and TL2AM electrical characteristics at specified free-air temperature IO αio IIO IIB ICR OM OM AD TL2M, TL2AM PARAMETER TEST CONDITIONS TA CC ± = ± CC ± = ± 1 UNIT A MIN TYP MAX MIN TYP MAX Input offset voltage Temperature coefficient of input offset voltage Input offset voltage longterm drift Input offset current Input bias current Common-mode input voltage range Maximum positive peak output voltage swing Maximum negative peak output voltage swing Large-signal differential voltage amplification TL2M O =, TL2AM IC =, RS = Ω TL2M O =, RS = Ω TL2AM IC =, 2 C Full range C Full range C 12 C 2 C 12 C m µ/ C 2 C.. µ/mo O O =, IC =, 2 C 1 1 pa See Figure 12 C na O O =, IC =, 2 C pa See Figure 12 C 1 2 na RL =1kΩ RL =2kΩ RL =1kΩ RL =2kΩ 2 C Full range C Full range C Full range C Full range C Full range C C /m 12 C ri Input resistance 2 C Ω ci Input capacitance 2 C 1 12 pf CMRR ksr ICC Common-modemode rejection ratio Supply-voltage rejection ratio ( CC±/ IO) Supply current (two amplifiers) = 2 C IC ICRmin, O =, C db RS = Ω 12 C C O =, RS = Ω C db 12 C C O =, No load C ma 12 C O1/O2 Crosstalk attenuation AD = 1 2 C db Full range is C 12 C. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 1 C extrapolated using the Arrhenius equation and assuming an activation energy of.96 e. For CC ± = ±, O = ± 2.3 ; at, O = ±1. 2 POST OFFICE BOX 633 DALLAS, TEXAS 726

21 TLx, TLxA, TLxY TL2M and TL2AM operating characteristics at specified free-air temperature SR SR TL2M, TL2AM PARAMETER TEST CONDITIONS TA CC ± = ± CC ± = ± 1 UNIT A MIN TYP MAX MIN TYP MAX Positive slew rate 2 C at unity gain, Full range 8 CL = 1 pf, Negative slew rate See Figure 1 2 C at unity gain Full range 8 2 C 6 tr Rise time C 1 2 tf n N(PP) In THD B1 φm Fall time 12 C I(PP) = ± 1 m, 2 C 7, Ω C 1 2 CL = 1 pf, See Figures 1 and 2 12 C C 2% 19% Overshoot facr C 2% 19% 12 C 2% 19% Equivalent input noise f = 1 Hz 2 C voltage f = 1 khz 2 C RS =2Ω Ω, Peak--peak See Figure 3 f = 1 Hz equivalent input noise current 1 khz Equivalent input noise current Total harmonic disrtion Unity-gain bandwidth /µs ns n/ Hz 2 C µ f = 1 khz 2 C.1.1 pa/ Hz RS = 1 kω, f = 1 khz, I = 1 m,, CL =2pF F, See Figure Phase margin at unity I = 1 m,, gain CL =2pF F, See Figure 2 C.3%.3% 2 C 3 3 C MHz 12 C C 6 63 C C 6 63 Full range is C 12 C. For CC ± = ±, I(PP) = ±1 ; for, I(PP) = ±. This parameter is tested on a sample basis. For other test requirements, please contact the facry. This statement has no bearing on testing or nontesting of other parameters. For CC ± = ±, O(RMS) = 1 ; for CC ± = ± 1, O(RMS) = 6. POST OFFICE BOX 633 DALLAS, TEXAS

22 TLx, TLxA, TLxY TL2Y electrical characteristics, T A = 2 C IO IIO IIB ICR TL2Y PARAMETER TEST CONDITIONS CC ± = ± CC ± = ± 1 UNIT Input offset voltage Input offset voltage long-term drift Input offset current Input bias current Common-mode input voltage range O =, RS = Ω O =, See Figure O =, See Figure IC =, IC =, IC =, MIN TYP MAX MIN TYP MAX.73.6 m.. µ/mo pa 2 3 pa Maximum positive peak RL = 1 kω OM output voltage swing OM AD Maximum negative peak output RL = 1 kω voltage swing Large-signal differential voltage amplification 9 1 /m ri Input resistance Ω ci Input capacitance 1 12 pf CMRR ksr Common-mode rejection ratio Supply-voltage rejection ratio ( CC± / IO) IC = ICRmin, O =, RS = Ω 8 93 db O =, RS = Ω db ICC Supply current (two amplifiers) O =, No load.6.8 ma O1/O2 Crosstalk attenuation AD = db For CC ± = ±, O = ±2.3 ; at, O = ±1. 22 POST OFFICE BOX 633 DALLAS, TEXAS 726

23 TLx, TLxA, TLxY TL2Y operating characteristics, T A = 2 C SR SR tr tf TL2Y PARAMETER TEST CONDITIONS CC± = ± CC± = ±1 UNIT Positive slew rate at unity gain Negative slew rate at unity gain Rise time Fall time,, CL L = 1 pf, See Figure 1 MIN TYP MAX MIN TYP MAX I(PP) = ±1 m,, CL = 1 pf, 7 Overshoot facr See Figures 1 and 2 2% 19% Equivalent input noise f = 1 Hz n n/ Hz voltage RS = 2 Ω, f = 1 khz Peak--peak equivalent input See Figure 3 N(PP) f = 1 Hz 1 khz µ noise current In THD B1 φm Equivalent input noise current Total harmonic disrtion Unity-gain bandwidth Phase margin at unity gain /µs f = 1 khz.1.1 pa/ Hz RS = 1 kω, f = 1 khz I = 1 m, CL = 2 pf, I = 1 m, CL = 2 pf,,, See Figure, See Figure.3%.3% ns 3 3 MHz 6 63 This parameter is tested on a sample basis. For other test requirements, please contact the facry. This statement has no bearing on testing or nontesting of other parameters. For CC ± = ±, I(PP) = ±1 ; for, I(PP) = ±. For CC ± = ±, O(RMS) = 1 ; for CC ± = ± 1, O(RMS) = 6. POST OFFICE BOX 633 DALLAS, TEXAS

24 TLx, TLxA, TLxY TLC and TLAC electrical characteristics at specified free-air temperature IO αio IIO IIB ICR OM OM AD TLC, TLAC PARAMETER TEST CONDITIONS TA CC ± = ± CC ± = ± 1 UNIT Input offset voltage Temperature coefficient of input offset voltage Input offset voltage long-term drift Input offset current Input bias current Common-mode input voltage range Maximum positive peak output voltage swing Maximum negative peak output voltage swing Large-signal differential voltage amplification O =, IC =, RS = Ω TLC TLAC TLC TLAC MIN TYP MAX MIN TYP MAX 2 C.6..6 Full range C Full range C 7 C 2 C 7 C m µ / C 2 C.. µ/mo O O =, IC =, 2 C 1 1 pa See Figure 7 C na O O =, IC =, 2 C pa See Figure 7 C.1.2 na RL =1kΩ RL =2kΩ RL =1kΩ RL =2kΩ 2 C Full range C Full range C Full range C Full range C Full range C C /m 7 C ri Input resistance 2 C Ω ci Input capacitance 2 C 1 12 pf CMRR ksr ICC Common-modemode IC = ICRmin, rejection ratio O =, RS =Ω Ω Supply-voltage rejection CC ± = ± ±1, ratio ( CC± ± / IO) O =, RS =Ω Ω Supply current (four amplifiers) 2 C C db 7 C C C db 7 C C O =, No load C ma 7 C O1/O2 Crosstalk attenuation AD = 1 2 C db Full range is C 7 C. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 1 C extrapolated using the Arrhenius equation and assuming an activation energy of.96 e. For CC ± = ±, O = ±2.3, at, O = ±1.B 2 POST OFFICE BOX 633 DALLAS, TEXAS 726

25 TLx, TLxA, TLxY TLC and TLAC operating characteristics at specified free-air temperature SR SR TLC, TLC PARAMETER TEST CONDITIONS TA CC ± = ± UNIT MIN TYP MAX MIN TYP MAX Positive slew rate 2 C at unity gain C RL L = 2 kω, CL L = 1 pf, 7 C Negative slew rate at See Figure 1 and Note 7 2 C unity gain C C C 6 tr Rise time C tf n N(PP) In THD B1 φm Fall time 7 C I(PP) = ±1 m, 2 C 7 RL = 2kΩ kω, C 6 CL = 1 pf, See Figures 1 and 2 7 C C 2% 19% Overshoot facr C 2% 19% 7 C 2% 19% Equivalent input noise f = 1 Hz 2 C 7 7 voltage RS = 2 Ω, f = 1 khz 2 C n/ Hz Peak--peak equivalent See Figure 3 f = 1 Hz 2 C µ input noise voltage 1 khz Equivalent input noise current Total harmonic disrtion Unity-gain bandwidth /µs f = 1 khz 2 C.1.1 pa/ Hz RS = 1 kω, f = 1 khz, I = 1 m,, CL =2pF F, See Figure Phase margin at I =1m m, RL =2kΩ kω, unity gain CL = 2 pf, See Figure 2 C.3%.3% 2 C ns C 3 3 MHz 7 C C 61 6 C C Full range is C 7 C. For CC ± = ±, I(PP) = ±1 ; for, I(PP) = ±. This parameter is tested on a sample basis. For other test requirements, please contact the facry. This statement has no bearing on testing or nontesting of other parameters. For CC ± = ±, o(rms) = 1 ; for, o(rms) = 6. POST OFFICE BOX 633 DALLAS, TEXAS 726 2

26 TLx, TLxA, TLxY TLI and TLAI electrical characteristics at specified free-air temperature IO αio IIO IIB ICR OM OM AD TLI, TLAI PARAMETER TEST CONDITIONS TA CC ± = ± UNIT A MIN TYP MAX MIN TYP MAX Input offset voltage Temperature coefficient of input offset voltage Input offset voltage long-term drift Input offset current Input bias current Common-mode input voltage range Maximum positive peak output voltage swing Maximum negative peak output voltage swing Large-signal differential voltage amplification O =, IC =, RS = Ω TLI TLAI TLI TLAI 2 C.6..6 Full range C Full range C 8 C 2 C 8 C m µ/ C 2 C.. µ/mo O O =, IC =, 2 C 1 1 pa See Figure 8 C na O O =, IC =, 2 C pa See Figure 8 C na RL =1kΩ RL =2kΩ RL =1kΩ RL =2kΩ 2 C Full range C Full range C Full range C Full range C Full range C C /m 8 C ri Input resistance 2 C Ω ci Input capacitance 2 C 1 12 pf CMRR ksr ICC Common-modemode IC = ICRmin, rejection ratio O =, RS =Ω Ω Supply-voltage rejection CC ± = ± ±1, ratio ( CC±/ IO) O =, RS =Ω Ω Supply current (four amplifiers) 2 C C db 8 C C C db 8 C C O =, No load C ma 8 C O1/O2 Crosstalk attenuation AD = 1 2 C db Full range is C 8 C. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 1 C extrapolated using the Arrhenius equation and assuming an activation energy of.96 e. For CC ± = ±, O = ±2.3, at, O = ±1. 26 POST OFFICE BOX 633 DALLAS, TEXAS 726

27 TLI and TLAI operating characteristics at specified free-air temperature SR SR TLx, TLxA, TLxY TLI, TLAI PARAMETER TEST CONDITIONS TA CC ± = ± UNIT A MIN TYP MAX MIN TYP MAX Positive slew rate 2 C at unity gain C RL L = 2 kω, CL L = 1 pf, 8 C Negative slew rate at See Figure 1 2 C unity gain C C C 6 tr Rise time C 2 3 tf n N(PP) In THD B1 φm Fall time 8 C 6 6 I(PP) = ±1 m,, 2 C 7 CL = 1 pf, C 1 3 See Figures 1 and 2 8 C C 2% 19% Overshoot facr C 2% 19% 8 C 2% 19% Equivalent input noise f = 1 Hz 2 C 7 7 voltage RS = 2 Ω, f = 1 khz 2 C n/ Hz Peak--peak equivalent See Figure 3 f = 1 Hz 2 C µ input noise voltage 1 khz Equivalent input noise current Total harmonic disrtion Unity-gain bandwidth /µs f = 1 khz 2 C.1.1 pa/ Hz RS = 1 kω, f = 1 khz, I = 1 m,, CL =2pF F, See Figure Phase margin at I =1m m, RL =2kΩ kω, unity gain CL = 2 pf, See Figure 2 C.3%.3% 2 C ns C MHz 8 C C 61 6 C C 61 6 Full range is C 8 C. For CC ± = ±, I(PP) = ±1 ; for, I(PP) = ±. This parameter is tested on a sample basis. For other test requirements, please contact the facry. This statement has no bearing on testing or nontesting of other parameters. For CC ± = ±, o(rms) = 1 ; for, o(rms) = 6. POST OFFICE BOX 633 DALLAS, TEXAS

28 TLx, TLxA, TLxY TLM and TLAM electrical characteristics at specified free-air temperature IO αio IIO IIB ICR OM OM AD TLM, TLAM PARAMETER TEST CONDITIONS TA CC ± = ± UNIT A MIN TYP MAX MIN TYP MAX Input offset voltage Temperature coefficient of input offset voltage Input offset voltage long-term drift Input offset current Input bias current Common-mode input voltage range Maximum positive peak output voltage swing Maximum negative peak output voltage swing Large-signal differential voltage amplification O =, IC =, RS = Ω TLM 2 C.6..6 Full range C TLAM Full range TLM TLAM 2 C 8 C 2 C 8 C m µ/ C 2 C.. µ/mo O O =, IC =, 2 C 1 1 pa See Figure 12 C na O O =, IC =, 2 C pa See Figure 12 C 1 2 na RL =1kΩ RL =2kΩ RL =1kΩ RL =2kΩ 2 C Full range C Full range C Full range C Full range C Full range C C /m 12 C ri Input resistance 2 C Ω ci Input capacitance 2 C 1 12 pf CMRR ksr ICC Common-modemode rejection ratio Supply-voltage rejection ratio ( CC±/ IO) Supply current (four amplifiers) IC = ICRmin, 2 C O =, C db RS = Ω 12 C CC ± = ± ±1, 2 C O =, C db RS = Ω 8 C C O =, No load C ma 12 C O1/O2 Crosstalk attenuation AD = 1 2 C db Full range is C 12 C. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 1 C extrapolated using the Arrhenius equation and assuming an activation energy of.96 e. For CC ± = ±, O = ±2.3, at, O = ±1. 28 POST OFFICE BOX 633 DALLAS, TEXAS 726

29 TLx, TLxA, TLxY TLM and TLAM operating characteristics at specified free-air temperature SR SR TLM, TLAM PARAMETER TEST CONDITIONS TA CC ± = ± UNIT A MIN TYP MAX MIN TYP MAX Positive slew rate 2 C at unity gain C Negative slew rate at unity gain RL L = 2 kω, CL L = 1 pf, 12 C See Figure 1 2 C C C C 6 tr Rise time C 1 2 tf n N(PP) In THD B1 Fall time 12 C I(PP) = ±1 m, 2 C 7 RL = 2kΩ kω, C 1 2 CL = 1 pf, See Figures 1 and 2 12 C C 2% 19% Overshoot facr C 2% 19% 12 C 2% 19% Equivalent input noise f = 1 Hz 2 C 7 7 voltage RS = 2 Ω, f = 1 khz 2 C n/ Hz Peak--peak equivalent See Figure 3 f = 1 Hz 2 C µ input noise voltage 1 khz Equivalent input noise current Total harmonic disrtion Unity-gain bandwidth /µs f = 1 khz 2 C.1.1 pa/ Hz RS = 1 kω, f = 1 khz, I = 1 m,, CL =2pF F, See Figure 2 C.3%.3% 2 C ns C MHz 12 C C 61 6 Phase margin at I =1m m, RL =2kΩ kω, φm C 8 62 unity gain CL = 2 pf, See Figure 12 C 6 6 Full range is C 12 C. For CC ± = ±, I(PP) = ±1 ; for, I(PP) = ±. This parameter is tested on a sample basis. For other test requirements, please contact the facry. This statement has no bearing on testing or nontesting of other parameters. For CC ± = ±, orms = 1 ; for, orms = 6. POST OFFICE BOX 633 DALLAS, TEXAS

30 TLx, TLxA, TLxY TLY electrical characteristics, T A = 2 C IO IIO IIB ICR TLY PARAMETER TEST CONDITIONS CC ± = ± CC ± = ± 1 UNIT Input offset voltage Input offset current Input bias current Common-mode input voltage range O =, RS = Ω IC =, O =, IC =, See Figure O =, IC =, See Figure MIN TYP MAX MIN TYP MAX.6.6 m pa 2 3 pa Maximum positive peak RL = 1 kω OM output voltage swing Maximum negative peak RL = 1 kω OM output voltage swing AD Large-signal differential voltage amplification, /m ri Input resistance Ω ci Input capacitance 1 12 pf CMRR ksr ICC Common-mode rejection ratio Supply-voltage rejection ratio ( CC± / IO) Supply current (four amplifiers) IC = ICRmin, O =, RS = Ω CC ± = ± ±1, O =, RS = Ω 8 92 db db O =, No load ma O1/O2 Crosstalk attenuation AD = db For CC ± = ±, O = ±2.3, at, O = ±1. 3 POST OFFICE BOX 633 DALLAS, TEXAS 726

31 TLx, TLxA, TLxY TLY operating characteristics, T A = 2 C TLY PARAMETER TEST CONDITIONS CC± = ± CC± = ±1 UNIT MIN TYP MAX MIN TYP MAX Positive slew rate at unity SR gain, CL = 1 pf, / µs Negative slew rate at unity See Figure 1 SR gain tr Rise time I(PP) = ±1 m, 6 tf Fall time, ns 7 CL = 1 pf, Overshoot facr See Figures 1 and 2 2% 19% Equivalent input noise f = 1 Hz 7 7 n n/ Hz voltage RS = 2 Ω, f = 1 khz Peak--peak equivalent See Figure 3 N(PP) f = 1 Hz 1 khz µ input noise voltage In THD Equivalent input noise current Total harmonic disrtion f = 1 khz.1.1 pa/ Hz RS = 1 kω, f = 1 khz,.3%.3% B1 Unity-gain bandwidth I = 1 m,, MHz CL = 2 pf, See Figure Phase margin at I = 1 m,, φm 61 6 unity gain CL = 2 pf, See Figure For CC ± = ±, I(PP) = ±1 ; for, I(PP) = ±. This parameter is tested on a sample basis. For other test requirements, please contact the facry. This statement has no bearing on testing or nontesting of other parameters. For CC ± = ±, o(rms) = 1 ; for, o(rms) = 6. POST OFFICE BOX 633 DALLAS, TEXAS

32 TLx, TLxA, TLxY PARAMETER MEASUREMENT INFORMATION I CC O Overshoot 9% CC CL (see Note A) RL 1% NOTE A: CL includes fixture capacitance. Figure 1. Slew Rate, Rise/Fall Time, and Overshoot Test Circuit tr Figure 2. Rise Time and Overshoot Waveform 2 k Ω 1 k Ω CC CC RS RS CC O I 1 Ω CC CL (see Note A) RL O Figure 3. Noise-oltage Test Circuit NOTE A: CL includes fixture capacitance. Figure. Unity-Gain Bandwidth and Phase-Margin Test Circuit typical values Typical values as presented in this data sheet represent the median (% point) of device parametric performance. input bias and offset current Ground Shield pa pa CC CC At the picoamp-bias-current level typical of the TLx and TLxA, accurate measurement of the Figure. Input-Bias and Offset-Current Test Circuit bias current becomes difficult. Not only does this measurement require a picoammeter, but test socket leakages can easily exceed the actualdevice bias currents. To accurately measure these small currents, Texas Instruments uses a two-step process. The socket leakage is measured using picoammeters with bias voltages applied but with no device in the socket. The device is then inserted in the socket, and a second test that measures both the socket leakage and the device input bias current is performed. The two measurements are then subtracted algebraically determine the bias current of the device. noise Because of the increasing emphasis on low noise levels in many of day s applications, the input noise voltage density is sample tested at f = 1 khz. Texas Instruments also has additional noise testing capability meet specific application requirements. Please contact the facry for details. 32 POST OFFICE BOX 633 DALLAS, TEXAS 726

33 TYPICAL CHARACTERISTICS Table of Graphs TLx, TLxA, TLxY FIGURE IO Input offset voltage Distribution 6 11 αio Temperature coefficient of input offset voltage Distribution 12, 13, 1 IIB Input bias current Common-mode input voltage Free-air temperature IIO Input offset current Free-air temperature 16 IC Common-mode input voltage range limits Supply voltage Free-air temperature O Output voltage Differential input voltage 19, 2 OM Maximum peak output voltage Supply voltage Output current Free-air temperature , 26 27, 28 O(PP) Maximum peak--peak output voltage Frequency 22, 23, 2 AD CMRR Large-signal differential voltage amplification Common-mode rejection ratio Load resistance Frequency Free-air temperature Frequency Free-air temperature , 32, 33 3, 3 36 zo Output impedance Frequency 37 ksr Supply-voltage rejection ratio Free-air temperature 38 IOS ICC SR Short-circuit output current Supply current Slew rate Supply voltage Time Free-air temperature Supply voltage Free-air temperature Load resistance Free-air temperature , 3,, 6, Overshoot facr Load capacitance 6 n Equivalent input noise voltage Frequency 61, 62 THD Total harmonic disrtion Frequency 63 B1 φm Unity-gain bandwidth Phase margin Supply voltage Free-air temperature Supply voltage Load capacitance Free-air temperature 6, 6, 66 67, 68, 69 7, 71, 72 73, 7, 7 76, 77, 78 Phase shift Frequency 3 oltage-follower small-signal pulse response Time 79 oltage-follower large-signal pulse response Time 8 POST OFFICE BOX 633 DALLAS, TEXAS

34 TLx, TLxA, TLxY TYPICAL CHARACTERISTICS Percentage of Units % DISTRIBUTION OF TL1 INPUT OFFSET OLTAGE 33 Units Tested From 1 Wafer Lot P Package Percentage of Units % DISTRIBUTION OF TL1A INPUT OFFSET OLTAGE 393 Units Tested From 1 Wafer Lot ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ P Package IO Input Offset oltage m Figure 6 IO Input Offset oltage µ Figure 7 Percentage of Amplifiers % DISTRIBUTION OF TL2 INPUT OFFSET OLTAGE 76 Amplifiers Tested From 1 Wafer Lot P Package Percentage of Amplifiers % DISTRIBUTION OF TL2A INPUT OFFSET OLTAGE 3 Amplifiers Tested From 1 Wafer Lot P Package IO Input Offset oltage m Figure IO Input Offset oltage µ Figure 9 3 POST OFFICE BOX 633 DALLAS, TEXAS 726

35 TYPICAL CHARACTERISTICS TLx, TLxA, TLxY Percentage of Amplifiers % DISTRIBUTION OF TL INPUT OFFSET OLTAGE 11 Amplifiers Tested From 3 Wafer Lots N Package Percentage of Amplifiers % DISTRIBUTION OF TLA INPUT OFFSET OLTAGE 18 Amplifiers Tested From 3 Wafer Lots N Package IO Input Offset oltage m Figure 1 IO Input Offset oltage m Figure 11 Percentage of Units % DISTRIBUTION OF TL1 INPUT OFFSET OLTAGE TEMPERATURE COEFFICIENT 12 Units Tested From 2 Wafer Lots 12 C P Package Percentage of Amplifiers % DISTRIBUTION OF TL2 INPUT OFFSET OLTAGE TEMPERATURE COEFFICIENT ÎÎÎÎÎÎÎÎÎÎÎÎ 172 Amplifiers Tested From 2 Wafer Lots 12 C P Package Outlier: One Unit at 3.6 µ/ C ÎÎÎÎÎÎÎÎÎ αio Temperature Coefficient µ / C Figure αio Temperature Coefficient µ/ C Figure 13 3 POST OFFICE BOX 633 DALLAS, TEXAS 726 3

36 TLx, TLxA, TLxY TYPICAL CHARACTERISTICS Percentage of Amplifiers % DISTRIBUTION OF TL INPUT OFFSET OLTAGE TEMPERATURE COEFFICIENT ÎÎÎÎÎÎÎÎÎÎÎ 32 Amplifiers Tested From 3 Wafer Lots 12 C N Package Input Bias Current na IB I 1 INPUT BIAS CURRENT COMMON-MODE INPUT OLTAGE αio Temperature Coefficient µ / C Figure IC Common-Mode Input oltage Figure 1 Input Bias and Offset Currents na IO I IB and I INPUT BIAS CURRENT AND INPUT OFFSET CURRENT FREE-AIR TEMPERATURE O = IC = IIB IIO TA Free-Air Temperature C Figure 16 Common-Mode Input oltage IC COMMON-MODE INPUT OLTAGE RANGE LIMITS SUPPLY OLTAGE Positive Limit Negative Limit CC ± Supply oltage Figure 17 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 36 POST OFFICE BOX 633 DALLAS, TEXAS 726