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1 Low Power Consumption Wide Common-Mode and Differential Voltage Ranges Low Input Bias and Offset Currents Output Short-Circuit Protection Low Total Harmonic Distortion....3% Typ SLOS8G FEBRUARY 977 REVISED SEPTEMBER 24 High Input Impedance... JFET-Input Stage Latch-Up-Free Operation High Slew Rate... 3 V/µs Typ Common-Mode Input Voltage Range Includes V CC description/ordering information The TL8x JFET-input operational amplifier family is designed to offer a wider selection than any previously developed operational amplifier family. Each of these JFET-input operational amplifiers incorporates well-matched, high-voltage JFET and bipolar transistors in a monolithic integrated circuit. The devices feature high slew rates, low input bias and offset currents, and low offset-voltage temperature coefficient. Offset adjustment and external compensation options are available within the TL8x family. The C-suffix devices are characterized for operation from C to 7 C. The I-suffix devices are characterized for operation from 4 C to 85 C. The Q-suffix devices are characterized for operation from 4 C to 25 C. The M-suffix devices are characterized for operation over the full military temperature range of 55 C to 25 C. TJ VIOmax AT 25 C C to 7 C 5 mv PDIP (P) ORDERING INFORMATION PACKAGE ORDERABLE PART NUMBER TOP-SIDE MARKING Tube of 5 TL8CP TL8CP Tube of 5 TL82CP TL82CP PDIP (N) Tube of 25 TL84CN TL84CN SOIC (D) SOP (PS) Tube of 75 Reel of 25 Tube of 75 Reel of 25 Tube of 5 Reel of 25 TL8CD TL8CDR TL82CD TL82CDR TL84CD TL84CDR TL8C TL82C TL84C Reel of 2 TL8CPSR T8 Reel of 2 TL82CPSR T82 SOP (NS) Reel of 2 TL84CNSR TL84 TSSOP (PW) Tube of 5 Reel of 2 Tube of 9 TL82CPW TL82CPWR TL84CPW T84 Reel of 2 TL84CPWR Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at T82

2 SLOS8G FEBRUARY 977 REVISED SEPTEMBER 24 description/ordering information (continued) ORDERING INFORMATION TJ VIOmax AT 25 C PACKAGE ORDERABLE PART NUMBER TOP-SIDE MARKING C to 7 C 4 C to 85 C 6 mv PDIP (P) Tube of 5 TL8ACP TL8ACP Tube of 5 TL82ACP TL82ACP PDIP (N) Tube of 25 TL84ACN TL84ACN SOIC (D) Tube of 75 Reel of 25 Tube of 75 Reel of 25 Tube of 5 Reel of 25 TL8ACD TL8ACDR TL82ACD TL82ACDR TL84ACD TL84ACDR 8AC 82AC TL84AC SOP (PS) Reel of 2 TL82ACPSR T82A SOP (NS) Reel of 2 TL84ACNSR TL84A PDIP (P) Tube of 5 TL8BCP TL8BCP Tube of 5 TL82BCP TL82BCP PDIP (N) Tube of 25 TL84BCN TL84BCN Tube of 75 TL8BCD 3 mv Reel of 25 TL8BCDR 6 mv SOIC (D) PDIP (P) Tube of 75 Reel of 25 Tube of 5 Reel of 25 TL82BCD TL82BCDR TL84BCD TL84BCDR 8BC 82BC TL84BC Tube of 5 TL8IP TL8IP Tube of 5 TL82IP TL82IP PDIP (N) Tube of 25 TL84IN TL8IN SOIC (D) 4 C to 25 C 9 mv SOIC (D) 55 C to 25 C 9 mv 6 mv Tube of 75 Reel of 25 Tube of 75 Reel of 25 Tube of 5 Reel of 25 TL8ID TL8IDR TL82ID TL82IDR TL84ID TL84IDR TL8I TL82I TL84I TSSOP (PW) Reel of 2 TL82IPWR Z82 Tube of 5 Reel of 25 TL84QD TL84QDR TL84QD CDIP (J) Tube of 25 TL84MJ TL84MJ LCCC (FK) Reel of 55 TL84FK TL84FK CDIP (JG) Tube of 5 TL82MJG TL82MJG LCCC (FK) Tube of 55 TL82MFK TL82MFK Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at 2

3 SLOS8G FEBRUARY 977 REVISED SEPTEMBER 24 TL8, TL8A, TL8B D, P, OR PS PACKAGE (TOP VIEW) TL82, TL82A, TL82B D, JG, P, PS, OR PW PACKAGE (TOP VIEW) TL84, TL84A, TL84B D, J, N, NS, OR PW PACKAGE (TOP VIEW) OFFSET N IN IN V CC No internal connection V CC OUT OFFSET N2 OUT IN IN V CC V CC 2OUT 2IN 2IN OUT IN IN V CC 2IN 2IN 2OUT OUT 4IN 4IN V CC 3IN 3IN 3OUT TL82M... FK PACKAGE (TOP VIEW) TL84M... FK PACKAGE (TOP VIEW) IN IN V CC OUT 2IN V CC OUT 2IN IN V CC 2IN IN OUT 4OUT 4IN IN 2OUT 3OUT 3IN 4IN V CC 3IN No internal connection No internal connection symbols OFFSET N TL8 TL82 (EACH AMPLIFIER) TL84 (EACH AMPLIFIER) IN IN OUT IN IN OUT OFFSET N2 3

4 SLOS8G FEBRUARY 977 REVISED SEPTEMBER 24 schematic (each amplifier) VCC IN IN 64 Ω 28 Ω OUT C 64 Ω VCC 8 Ω 8 Ω OFFSET N OFFSET N2 Component values shown are nominal. TL8 Only 4

5 SLOS8G FEBRUARY 977 REVISED SEPTEMBER 24 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) TL8_C TL8_AC TL8_BC TL8_I TL84Q TL8_M UNIT Supply voltage, VCC (see Note ) V Supply voltage VCC (see Note ) V Differential input voltage, VID (see Note 2) ± 3 ± 3 ± 3 ± 3 V Input voltage, VI (see Notes and 3) ±5 ±5 ±5 ±5 V Duration of output short circuit (see Note 4) Unlimited Unlimited Unlimited Unlimited Continuous total power dissipation See Dissipation Rating Table Operating free-air temperature range, TA to 7 4 to 85 4 to to 25 C D package (8-pin) D package (4-pin) N package (4-pin) Package thermal impedance, θja NS package (4-pin) 8 (see Notes 5 and 6) P package (8-pin) PS package (8-pin) PW package (8-pin) 49 PW package (4-pin) 3 3 Operating virtual junction temperature C Case temperature for 6 seconds, TC FK package 26 C Lead temperature,6 mm (/6 inch) from case for 6 seconds C/W J or JG package 3 C Storage temperature range, Tstg 65 to 5 65 to 5 65 to 5 65 to 5 C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES:. All voltage values, except differential voltages, are with respect to the midpoint between VCC and VCC. 2. Differential voltages are at IN with respect to IN. 3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 5 V, whichever is less. 4. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the dissipation rating is not exceeded. 5. Maximum power dissipation is a function of TJ(max), θja, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) TA)/θJA. Operating at the absolute maximum TJ of 5 C can affect reliability. 6. The package thermal impedance is calculated in accordance with JESD 5-7. PACKAGE TA 25 C POWER RATING DERATING FACTOR DISSIPATION RATING TABLE DERATE ABOVE TA TA = 7 C POWER RATING TA = 85 C POWER RATING TA = 25 C POWER RATING D (4 pin) 68 mw 7.6 mw/ C 6 C 64 mw 49 mw 86 mw FK 68 mw. mw/ C 88 C 68 mw 68 mw 273 mw J 68 mw. mw/ C 88 C 68 mw 68 mw 273 mw JG 68 mw 8.4 mw/ C 69 C 672 mw 546 mw 2 mw 5

6 SLOS8G FEBRUARY 977 REVISED SEPTEMBER 24 electrical characteristics, V CC± = ±5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA A TL8C TL82C TL84C TL8AC TL82AC TL84AC TLO8BC TL82BC TL84BC TL8I TL82I TL84I UNIT MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX 25 C VIO Input offset voltage VO = RS = 5 Ω mv Full range α VIO Temperature coefficient of input offset voltage IIO Input offset current VO = IIB Input bias current VO = VICR Common-mode input voltage range Maximum peak VOM output voltage swing VO = RS = 5 Ω Full range µv/ C 25 C pa Full range na 25 C pa Full range na 25 C ± 2 to 5 RL = kω 25 C ±2 ±3.5 ±2 ±3.5 ±2 ±3.5 ±2 ±3.5 RL kω RL 2 kω Full range ± 2 to 5 ± ±2 ±2 ±2 ±2 V ± ±2 ± ±2 ± ±2 ± ±2 2 to 5 ± 2 to 5 V Large-signal VO = ± V, RL 2 kω 25 C AVD differential voltage amplification VO = ± V, RL 2 kω Full range V/mV B Unity-gain bandwidth 25 C MHz ri Input resistance 25 C Ω CMRR Common-mode VIC = VICRmin, rejection ratio VO =, RS = 5 Ω 25 C db Supply-voltage ksvr rejection ratio ( VCC± / VIO) ICC Supply current (per amplifier) VCC = ±5 V to ± 9 V, VO =, RS = 5 Ω 25 C db VO =, No load 25 C ma VO/VO2 Crosstalk attenuation AVD = 25 C db All characteristics are measured under open-loop conditions with zero common-mode voltage, unless otherwise specified. Full range for TA is C to 7 C for TL8_C, TL8_AC, TL8_BC and 4 C to 85 C for TL8_I. Input bias currents of an FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as shown in Figure 7. Pulse techniques must be used that maintain the junction temperature as close to the ambient temperature as possible. 6

7 electrical characteristics, V CC ± = ±5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA VIO Input offset voltage VO =, RS = 5 Ω αvio Temperature coefficient of input offset voltage IIO Input offset current VO = IIB Input bias current VO = VICR VOM AVD Common-mode input voltage range Maximum peak output voltage swing SLOS8G FEBRUARY 977 REVISED SEPTEMBER 24 TL8M, TL82M TL84Q, TL84M MIN TYP MAX MIN TYP MAX 25 C Full range 9 5 UNIT VO = RS = 5 Ω Full range 8 8 µv/ C mv 25 C 5 5 pa 25 C 2 2 na 25 C pa 25 C 5 5 na 25 C ± 2 to 5 RL = kω 25 C ±2 ±3.5 ±2 ±3.5 RL kω RL 2 kω Full range ± 2 to 5 ±2 ±2 V ± ±2 ± ±2 Large-signal VO = ± V, RL 2 kω 25 C differential voltage amplification VO = ± V, RL 2 kω Full range 5 5 B Unity-gain bandwidth 25 C 3 3 MHz ri Input resistance 25 C 2 2 Ω CMRR ksvr ICC Common-mode rejection ratio Supply-voltage rejection ratio ( VCC ±/ VIO) Supply current (per amplifier) VIC = VICRmin, VO =, RS = 5 Ω VCC = ±5 V to ±9 V, VO =, RS = 5 Ω V V/mV 25 C db 25 C db VO =, No load 25 C ma VO/VO2 Crosstalk attenuation AVD = 25 C 2 2 db All characteristics are measured under open-loop conditions, with zero common-mode input voltage, unless otherwise specified. Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as shown in Figure 7. Pulse techniques must be used that maintain the junction temperatures as close to the ambient temperature as possible. operating characteristics, V CC± = ±5 V, T A = 25 C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VI = V, RL = 2 kω, CL = pf, See Figure 8 3 SR Slew rate at unity gain VI = V, RL = 2 kω, CL = pf, TA = 55 C to 25 C, See Figure tr Vn In THD Rise time Overshoot factor Equivalent input noise voltage Equivalent input noise current Total harmonic distortion VI = 2 mv, RL = 2 kω, CL = pf, See Figure RS = 2 Ω 5 V/µs.5 µs 2 % f = khz 8 nv/ Hz f = Hz to khz 4 µv RS = 2 Ω, f = khz. pa/ Hz VIrms = 6 V, f = khz AVD =, RS kω, RL 2 kω, On products compliant to MIL-PRF-38535, this parameter is not production tested..3 % 7

8 SLOS8G FEBRUARY 977 REVISED SEPTEMBER 24 operating characteristics, V CC± = ±5 V, T A = 25 C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SR Slew rate at unity gain VI = V, RL = 2 kω, CL = pf, See Figure 8 3 V/µs tr Rise time Overshoot factor Vn Equivalent input noise voltage RS = 2 Ω VI = 2 mv, RL = 2 kω, CL = pf, See Figure.5 µs 2 % f = khz 8 nv/ Hz f = Hz to khz 4 µv In Equivalent input noise current RS = 2 Ω, f = khz. pa/ Hz THD Total harmonic distortion VIrms = 6 V, f = khz AVD =, RS kω, RL 2 kω,.3 % PARAMETER MEASUREMENT INFORMATION kω VI CL = pf OUT RL = 2 kω VI kω RL OUT CL = pf Figure Figure 2 kω C2 IN TL8 OUT C 5 pf IN N N2 IN N kω OUT.5 kω VCC Figure 3 Figure 4 8

9 VOM AVD Maximum peak output voltage Large-signal differential voltage amplification SLOS8G FEBRUARY 977 REVISED SEPTEMBER 24 TYPICAL CHARACTERISTICS Table of Graphs FIGURE Frequency 5, 6, 7 Free-air temperature 8 Load resistance 9 Supply voltage Free-air temperature Frequency 2 Differential voltage amplification Frequency with feed-forward compensation 3 PD Total power dissipation Free-air temperature 4 ICC Supply current Free-air temperature 5 Supply voltage 6 IIB Input bias current Free-air temperature 7 Large-signal pulse response Time 8 VO Output voltage Elapsed time 9 CMRR Common-mode rejection ratio Free-air temperature 2 Vn Equivalent input noise voltage Frequency 2 THD Total harmonic distortion Frequency 22 Maximum Peak Output Voltage V V OM ±5 ±2.5 ± ±7.5 ±5 ±2.5 MAXIMUM PEAK OUTPUT VOLTAGE FREQUEY VCC ± = ±5 V VCC ± = ± V VCC ± = ±5 V RL = kω TA = 25 C See Figure 2 V OM Maximum Peak Output Voltage V ±5 ±2.5 ± ±7.5 ±5 ±2.5 MAXIMUM PEAK OUTPUT VOLTAGE FREQUEY VCC ± = ±5 V VCC ± = ± V VCC ± = ±5 V RL = 2 kω TA = 25 C See Figure 2 k k k M M f Frequency Hz Figure 5 k k k M M f Frequency Hz Figure 6 9

10 SLOS8G FEBRUARY 977 REVISED SEPTEMBER 24 TYPICAL CHARACTERISTICS V OM Maximum Peak Output Voltage V ±5 ±2.5 ± ±7.5 ±5 ±2.5 MAXIMUM PEAK OUTPUT VOLTAGE FREQUEY TA = 25 C TA = 25 C k 4 k k 4 k M 4 M M Figure 7 TA = 55 C f Frequency Hz VCC ± = ±5 V RL = 2 kω See Figure 2 V OM Maximum Peak Output Voltage V ±5 ±2.5 ± ±7.5 ±5 ±2.5 MAXIMUM PEAK OUTPUT VOLTAGE FREE-AIR TEMPERATURE ÎÎÎÎ RL = k VCC ± = ±5 V See Figure 2 RL = 2 k TA Free-Air Temperature C Figure 8 V OM Maximum Peak Output Voltage V ±5 ±2.5 ± ±7.5 ±5 ±2.5 MAXIMUM PEAK OUTPUT VOLTAGE LOAD RESISTAE VCC ± = ±5 V TA = 25 C See Figure 2 V OM Maximum Peak Output Voltage V ±5 ±2.5 ± ±7.5 ±5 ±2.5 MAXIMUM PEAK OUTPUT VOLTAGE SUPPLY VOLTAGE RL = kω TA = 25 C RL Load Resistance kω VCC ± Supply Voltage V 6 Figure 9 Figure Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

11 SLOS8G FEBRUARY 977 REVISED SEPTEMBER 24 TYPICAL CHARACTERISTICS 7 4 LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION FREE-AIR TEMPERATURE A VD Large-Signal Differential Voltage Amplification V/mV VCC ± = ±5 V VO = ± V RL = 2 kω TA Free-Air Temperature C Figure LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION FREQUEY VCC ± = ±5 V to ±5 V RL = kω TA = 25 C A VD Large-Signal Differential Voltage Amplification V/mV Phase Shift (right scale) Differential Voltage Amplification (left scale) Phase Shift k k k M 8 M f Frequency Hz Figure 2 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

12 SLOS8G FEBRUARY 977 REVISED SEPTEMBER 24 TYPICAL CHARACTERISTICS DIFFERENTIAL VOLTAGE AMPLIFICATION FREQUEY WITH FEED-FORWARD COMPENSATION A VD Differential Voltage Amplification V/mV k k k VCC ± = ±5 V C2 = 3 pf TA = 25 C See Figure 3 M M f Frequency With Feed-Forward Compensation Hz Total Power Dissipation mw PD TOTAL POWER DISSIPATION FREE-AIR TEMPERATURE VCC ± = ±5 V No Signal No Load TA Free-Air Temperature C TL84, TL85 TL82, TL83 TL8 25 Figure 3 Figure 4 Supply Current ma I CC ± SUPPLY CURRENT PER AMPLIFIER FREE-AIR TEMPERATURE VCC ± = ±5 V No Signal No Load Supply Current ma I CC ± TA = 25 C No Signal No Load SUPPLY CURRENT SUPPLY VOLTAGE TA Free-Air Temperature C VCC ± Supply Voltage V 6 Figure 5 Figure 6 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 2

13 SLOS8G FEBRUARY 977 REVISED SEPTEMBER 24 TYPICAL CHARACTERISTICS Input Bias Current na IIB. V CC ± = ± 5 V INPUT BIAS CURRENT FREE-AIR TEMPERATURE Input and Output Voltages V VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE Output Input VCC ± = ±5 V RL = 2 k Ω CL = pf TA = 25 C TA Free-Air Temperature C t Time µ s Figure 7 Figure 8 Output Voltage mv V O OUTPUT VOLTAGE ELAPSED TIME VCC ± = ±5 V RL = 2 k Ω CL = pf TA = 25 C See Figure t Elapsed Time µ s.2 CMRR Common-Mode Rejection Ratio db COMMON-MODE REJECTION RATIO FREE-AIR TEMPERATURE VCC ± = ±5 V RL = kω TA Free-Air Temperature C 25 Figure 9 Figure 2 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 3

14 SLOS8G FEBRUARY 977 REVISED SEPTEMBER 24 TYPICAL CHARACTERISTICS Vn Equilvalent Input Noise Voltage nv/ Hz EQUIVALENT INPUT NOISE VOLTAGE FREQUEY f Frequency Hz VCC ± = ±5 V AVD = RS = 2 Ω TA = 25 C 4 4 k 4 k k 4 k k THD Total Harmonic Distortion % TOTAL HARMONIC DISTORTION FREQUEY VCC ± = ±5 V AVD = VI(RMS) = 6 V TA = 25 C 4 k 4 k k 4 k k f Frequency Hz Figure 2 Figure 22 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. APPLICATION INFORMATION RF = kω VCC CF = 3.3 µf 3.3 kω 5 V TL8 kω Output Input R C3 R2 TL8 VCC Output f = 2π R F CF 5 V 3.3 kω 9. kω C R3 C2 R = R2 = 2(R3) =.5 MΩ C = C2 = C3 2 = pf fo = 2π R C = khz Figure 23 Figure 24 4

15 SLOS8G FEBRUARY 977 REVISED SEPTEMBER 24 APPLICATION INFORMATION MΩ VCC VCC TL84 Output A Input µf TL84 kω kω kω µf kω VCC TL84 VCC VCC TL84 Output B Output C Figure 25. Audio-Distribution Amplifier 8 pf 6 sin ωt N448 8 pf kω 8 kω (see Note A) 5 V VCC 88.4 kω 8 pf /2 TL82 VCC 88.4 kω /2 TL82 VCC VCC kω 6 cos ωt 88.4 kω N448 8 kω (see Note A) 5 V NOTE A: These resistor values may be adjusted for a symmetrical output. Figure 26. -KHz Quadrature Oscillator 5

16 SLOS8G FEBRUARY 977 REVISED SEPTEMBER 24 APPLICATION INFORMATION 6 kω 6 kω 22 pf 22 pf 43 kω 3 kω 43 kω 3 kω Input 43 kω VCC 22 pf VCC 22 pf 43 kω /4 43 kω TL84 /4 TL84.5 kω VCC VCC.5 kω VCC /4 TL84 VCC 43 kω VCC /4 TL84 VCC Output B Output A Output A Output B 2 khz/div Second-Order Bandpass Filter fo = khz, Q = 3, GAIN = 4 2 khz/div Cascaded Bandpass Filter fo = khz, Q = 69, GAIN = 6 Figure 27. Positive-Feedback Bandpass Filter 6

18 MECHANICAL DATA MTSSC JANUARY 995 REVISED FEBRUARY 999 PW (R-PDSO-G**) 4 PINS SHOWN PLASTIC SMALL-OUTLINE PACKAGE,3,65, M, ,5 4,3 6,6 6,2,5 NOM Gage Plane A 7 8,25,75,5,2 MAX,5,5 Seating Plane, DIM PINS ** A MAX 3, 5, 5, 6,6 7,9 9,8 A MIN 2,9 4,9 4,9 6,4 7,7 9,6 4464/F /97 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed,5. D. Falls within JEDEC MO-53

19 MECHANICAL DATA MLCC6B OCTOBER 996 FK (S-CQCC-N**) 28 TERMINAL SHOWN LEADLESS CERAMIC CHIP CARRIER NO. OF TERMINALS ** MIN A MAX MIN B MAX (8,69).358 (9,9).37 (7,8).358 (9,9) A SQ B SQ (,23).64 (6,26).739 (8,78).938 (23,83).4 (28,99).458 (,63).66 (6,76).76 (9,32).962 (24,43).65 (29,59).46 (,3).495 (2,58).495 (2,58).85 (2,6).47 (26,6).458 (,63).56 (4,22).56 (4,22).858 (2,8).63 (27,).2 (,5). (,25).8 (2,3).64 (,63).2 (,5). (,25).55 (,4).45 (,4).45 (,4).35 (,89).28 (,7).22 (,54).5 (,27).45 (,4).35 (,89) 444/ D /96 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a metal lid. D. The terminals are gold plated. E. Falls within JEDEC MS-4

24 MECHANICAL DATA MPDIA JANUARY 995 REVISED JUNE 999 P (R-PDIP-T8) PLASTIC DUAL-IN-LINE 8.4 (,6).355 (9,2) 5.26 (6,6).24 (6,) 4.7 (,78) MAX.2 (,5) MIN.325 (8,26).3 (7,62).5 (,38).2 (5,8) MAX Gage Plane Seating Plane.25 (3,8) MIN. (,25) NOM.2 (,53).5 (,38). (2,54). (,25) M.43 (,92) MAX 4482/D 5/98 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-

25 MECHANICAL DATA MCERA JANUARY 995 REVISED JANUARY 997 JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE.4 (,6).355 (9,) (7,).245 (6,22) 4.65 (,65).45 (,4).63 (,6).5 (,38).2 (,5) MIN.3 (7,87).29 (7,37).2 (5,8) MAX Seating Plane.3 (3,3) MIN. (2,54).23 (,58).5 (,38).4 (,36).8 (,2) 5 447/C 8/96 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a ceramic lid using glass frit. D. Index point is provided on cap for terminal identification. E. Falls within MIL STD 835 GDIP-T8

AVAILABLE OPTIONS CERAMIC DIP (J) CERAMIC DIP (JG) TL071CPWLE 6 mv TL071ACD TL071ACP 3 mv TL071BCD TL071BCP TL072CP

AVAILABLE OPTIONS CERAMIC DIP (J) CERAMIC DIP (JG) TL071CPWLE 6 mv TL071ACD TL071ACP 3 mv TL071BCD TL071BCP TL072CP Low Power Consumption Wide Common-Mode and Differential Voltage Ranges Low Input Bias and Offset Currents Output Short-Circuit Protection Low Total Harmonic Distortion.3% Typ TL7, TL7A, TL7B, TL72 Low