AOUT AIN- AIN+ GND 1 AOUT 2 AIN- 3 AIN+

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1 FEATURES High Slew Rate: V/µs High Gain Bandwidth: 6.5 MHz Supply Voltage Range.5 to 5.5V Rail-to-Rail Output Swing.75 ma Supply Current per Channel ORDERING INFORMATION Part Number Description DS48 DS48S DS48U DS48X 8-pin DIP 8-pin SOIC 8-pin µ-sop 8-bump CSP PRELIMINARY DS48 Low Voltage, High Slew Rate, Rail-To-Rail Dual Op-Amp PACKAGES/PINOUTS AOUT AIN+ GND AOUT A B mil DIP 5-mil SOIC 8-mil µ-sop VDD 8 VDD BOUT AIN- BIN- BIN+ 7 BOUT For mechanical dimensions see web site. A - + B - + AIN- AIN+ 6 BIN- 5 BIN+ 4 GND 8-bump CSP DESCRIPTION The DS48 BiCMOS dual operational amplifier combines high slew rate and rail-to-rail output swing. The device provides V/µs of slew rate and 6.5 MHz of bandwidth while only consuming.5 ma of supply current per channel. Ideal low voltage BiFET substitute for low gain, high speed applications. of 9

2 ABSOLUTE MAXIMUM RATINGS Supply Voltage, V DD (see Note )...5.5V DS48 Differential Input Voltage (see Note )...± V DD Input Voltage Range, V I (see Note )...-.V to V DD Input Current, I DD...± 4 ma Output Current, I O...± 5 ma Total current into V DD...± 5 ma Total current out of GND...± 5 ma Duration of short-circuit current (See Note ) unlimited Operating Temperature... o C to +7 o C Storage Temperature o C to +5 o C Soldering Temperature...See J-STD-A Specification NOTES:. Relative to GND.. Non-inverting input relative to inverting input. Excessive current flows when input is brought below GND -.V.. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded. RECOMMENDED OPERATING CONDITIONS PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Supply Voltage V DD V Input Voltage Range V I V DD -.7 V Common-Mode Input Voltage V CM V DD -.7 V Free-Air Operating Temperature T A 7 NOTES:. Voltage referenced to GND. o C of 9

3 ELECTRICAL CHARACTERISTICS Conditions: (T A : C 7 C. V DD =.V) PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Input Offset Voltage (V IC =.5V, R S = 5Ω, V OUT =.5V) Temperature Coefficient of Input Offset Voltage (V IC =.5V, R S = 5Ω, V OUT =.5V) Input Offset Current (V IC =.5V, R S = 5Ω, V OUT =.5V) Input Bias Current (V IC =.5V, R S = 5Ω, V OUT =.5V) Common-mode Input Voltage Range V IO mv High Level Output Voltage (I OH = -.5 ma) Low Level Output Voltage (I OL =.5 ma) Large Signal Differential Voltage Amplification (V IC =.5V, R L = kω, V V O V) V IO 5 mv αv IO µv/ C I IO 5 pa I IB 5 pa V ICR. V V OH.5.8 V V OL.5.5 V A VD 6 68 db Common Mode Input Capacitance c i(c) 4 pf Common Mode Rejection Ratio (V V IC.V, V O =.5V) CMRR 4 5 db Supply Voltage Rejection Ratio (V V DD 5V, V IC = V DD / V, no load) k SVR 7 8 db Amplifier Supply Current (per channel) (V O =.5V, no load) Slew Rate at Unity Gain (C L = 5 pf) Unity Gain Bandwidth (C L = 5 pf) Phase Margin at Unity Gain (C L = 5 pf) Gain Margin (C L = 5 pf) I DD.5.5 ma SR V/µs UGBW 5. MHz φ M 54 Degree 6 db of 9

4 ELECTRICAL CHARACTERISTICS cont. Conditions: (T A : C 7 C. V DD = 5.V) PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Input Offset Voltage (V IC =.5V, R S = 5Ω, V OUT =.5V) Temperature Coefficient of Input Offset Voltage (V IC =.5V, R S = 5Ω, V OUT =.5V) Input Offset Current (V IC =.5V, R S = 5Ω, V OUT =.5V) Input Bias Current (V IC =.5V, R S = 5Ω, V OUT =.5V) Common-mode Input Voltage Range V IO mv High Level Output Voltage (I OH = -. ma) Low Level Output Voltage (I OL =. ma) Large Signal Differential Voltage Amplification (V IC =.5V, R L = kω,.5v V O.5V) V IO 5 mv αv IO µv/ C I IO 5 pa I IB 5 pa V ICR. V V OH V V OL.5.5 V A VD 6 7 db Common Mode Input Capacitance c i(c) 4 pf Common Mode Rejection Ratio (V V IC.7V, V O =.5V) CMRR db Supply Voltage Rejection Ratio (V V DD 5V, V IC = V DD / V, no load) k SVR 7 8 db Amplifier Supply Current (per channel) (V O =.5V, no load) I DD.75.5 ma Slew Rate at Unity Gain (C L = 5 pf) SR 7 V/µs Unity Gain Bandwidth (C L = 5 pf) UGBW 6.5 MHz Phase Margin at Unity Gain (C L = 5 pf) φ M 46 Degree Gain Margin (C L = 5 pf) 4 db 4 of 9

5 % DISTRIBUTION OF DS48 INPUT OFFSET VOLTAGE Percentage of Amplifiers - % 5% % 5% % 5% V DD =. V % V IO - Input Offset Voltage - mv Figure. 5% DISTRIBUTION OF DS48 INPUT OFFSET VOLTAGE Percentage of Amplifiers - % % 5% % 5% % 5% V DD = 5. V % V IO - Input Offset Voltage - mv Figure. 5 of 9

6 VIO - Input Offset Voltage - mv V DD =. V INPUT OFFSET VOLTAGE COMMON-MODE INPUT VOLTAGE V IC - Common-Mode Input Voltage - V Figure. VIO - Input Offset Voltage - mv V DD = 5. V INPUT OFFSET VOLTAGE COMMON-MODE INPUT VOLTAGE V IC - Common-Mode Input Voltage - V Figure 4. 6 of 9

7 Percentage of Amplifiers - % % 5% % 5% DISTRIBUTION OF DS48 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT V DD =. V to 85 C % αv IO - Temperature Coefficient - uv/ o C Figure 5. Percentage of Amplifiers - % % 5% % 5% DISTRIBUTION OF DS48 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT V DD = 5. V to 85 C % αv IO - Temperature Coefficient - uv/ o C Figure 6. 7 of 9

8 HIGH-LEVEL OUTPUT VOLTAGE HIGH-LEVEL OUTPUT CURRENT VOH - High-Level Output Voltage - V o C o C 85 o C 5 o C V DD =. V 5 o C I OH - High-Level Output Current - ma Figure 7. 5 HIGH-LEVEL OUTPUT VOLTAGE HIGH-LEVEL OUTPUT CURRENT VOH - High-Level Output Voltage - V o C o C 85 o C 5 o C V DD = 5. V 5 o C I OH - High-Level Output Current - ma Figure 8. 8 of 9

9 LOW-LEVEL OUTPUT VOLTAGE LOW-LEVEL OUTPUT CURRENT VOL - Low-Level Output Voltage - V V DD =. V -4 o C o C 5 o C 5 o C 85 o C I OL - Low-Level Output Current - ma Figure 9. LOW-LEVEL OUTPUT VOLTAGE LOW-LEVEL OUTPUT CURRENT VOL - Low-Level Output Voltage - V V DD = 5. V o C 5 o C -4 o C 85 o C 5 o C 4 5 I OL - Low-Level Output Current - ma Figure. 9 of 9

10 5 SHORT-CIRCUIT OUTPUT CURRENT FREE-AIR TEMPERATURE IOS - Short-Circuit Output Current - ma V DD =. V I OSL I OSH T A - Free-Air Temperature - o C Figure. SHORT-CIRCUIT OUTPUT CURRENT FREE-AIR TEMPERATURE 5 IOS - Short-Circuit Output Current - ma V DD = 5. V I OSL I OSH T A - Free-Air Temperature - o C Figure. of 9

11 LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE MARGIN FREQUENCY 4 9 Phase V DD =. V AVD - Gain Margin - db - A VD C L = 5pF Phase Margin - degrees -4-9 K M M M f - Frequency - Hz Figure. 4 LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE MARGIN FREQUENCY 9 Phase V DD = 5. V AVD - Gain Margin - db - A VD C L = 5pF Phase Margin - degrees -4-9 K M M M f - Frequency - Hz Figure 4. of 9

12 5 V IC = % V DD SUPPLY CURRENT SUPPLY VOLTAGE 5 o C 85 o C IDD - Supply Current - ma 4-4 o C o C 5 o C V DD - Supply Voltage - V Figure COMMON-MODE REJECTION RATIO FREQUENCY CMRR - Common-Mode Rejection Ratio - db V DD =. V V DD = 5. V. K M M f - Frequency - Hz Figure 6. of 9

13 8 SUPPLY-VOLTAGE REJECTION RATIO FREQUENCY V DD =.V ksvr - Supply-Voltage Rejection Ratio - db 6 4 K K K M M f - Frequency - Hz Figure 7. 8 SUPPLY-VOLTAGE REJECTION RATIO FREQUENCY V DD = 5.V ksvr - Supply-Voltage Rejection Ratio - db 6 4 K K K M M f - Frequency - Hz Figure 8. of 9

14 VOLTAGE-FOLLOWER SMALL-SIGNAL PULSE RESPONSE VO - Output Voltage - V V DD =. V A V = + C L = 5pF t - Time - ns Figure 9. VO - Output Voltage - V VOLTAGE-FOLLOWER SMALL-SIGNAL PULSE RESPONSE V DD = 5. V A V = + C L = 5pF t - Time - ns Figure. 4 of 9

15 VO - Output Voltage - V VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE t - Time - ns Figure. V DD =. V A V = + C L = 5pF VO - Output Voltage - V VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE t - Time - ns Figure. V DD = 5. V A V = + C L = 5pF 5 of 9

16 INVERTING SMALL-SIGNAL PULSE RESPONSE VO - Output Voltage - V V DD =. V A V = - C L = 5pF t - Time - ns Figure. INVERTING SMALL-SIGNAL PULSE RESPONSE VO - Output Voltage - V V DD = 5. V A V = - C L = 5pF t - Time - ns Figure 4. 6 of 9

17 INVERTING LARGE-SIGNAL PULSE RESPONSE VO - Output Voltage - V t - Time - ns Figure 5. Figure 6. INVERTING LARGE-SIGNAL PULSE RESPONSE V DD =. V A V = - C L = 5pF T A =5 o C VO - Output Voltage - V V DD = 5. V A V = - C L = 5pF T =5 o C t - Time - ns 7 of 9

18 PHASE MARGIN LOAD CAPACITANCE Phase Margin - degrees V DD =. V AC + - +VDD/ -VDD/ R LOAD R NULL C LOAD R null = 5 R null = R null = R null = K K C L - Load Capacitance - pf Figure 7. GAIN MARGIN LOAD CAPACITANCE +VDD/ R null = 5 Gain Margin - db AC + - -VDD/ V DD =. V R LOAD R NULL C LOAD R null = R null = R null = K K C L - Load Capacitance - pf Figure 8. 8 of 9

19 Unity-Gain Bandwidth - MHz UNITY-GAIN BANDWIDTH LOAD CAPACITANCE V DD =. V K K C L - Load Capacitance - pf Figure 9. 9 of 9

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