THE ART OF ANALOG INTEGRATED CIRCUITS
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2 THE ART OF ANALOG INTEGRATED CIRCUITS Univ.-Prof. DI Dr. Harald Pretl Institute for Integrated Circuits Department for Energy-Efficient Analog Circuits and Systems
3 Electrical Engineering Power & Drive Engineering Control & Automation Engineering Electronics Tele- Communications Theoretical Electrical Engineering Microelectronics Digital Circuit Design Analog Circuit Design
4 WHAT ARE ANALOG FUNCTIONS? ADC DAC DC/DC Source: B. Razavi, Fundamentals of Microelectronics
5 WHAT ARE ANALOG CIRCUITS?
6 EXAMPLE: SMARTPHONE Source: Chipworks Teardown Report, BPT
7 AND THERE ARE LOTS OF ANALOG APPLICATIONS Cellular RF (PA, filter) Power management Sensors (proximity, ambient light, compass, gyro, accelerometer, barometer, fingerprint) Interface (microphones, touch, display, camera) Audio WiFi+BT (RF transceiver, modem) Cellular RF (transceiver, filter) Power management Power management Audio NFC Source: TECHINSIGHTS, teardown.com
8 HOW SMALL ARE NM? Source: M. Bohr, IDF 14
9 HISTORY: THE DIODE Source: Wikipedia; Renaud Schleck 1874: Karl Ferdinand Braun discovers the rectifying effect of galena. This is later used as a radio receiver using a crystal detector ( Cat s whisker ), the first semiconductor electronic device
10 HISTORY: THE TRIODE Source: Wikipedia; T. Lee Planar Microwave Engineering 1906: Robert von Lieben and (independently) Lee de Forest invent the first amplifier based on a vacuum tube: The triode (or Audion )
11 HISTORY: THE TRANSISTOR 1947: John Bardeen, William Shockley and Walter Brattain demonstrate the first semiconductor transistor (Ge) at Bell Labs Source: Bell Telephone Labs; Computer History Museum
12 HISTORY: THE INTEGRATED CIRCUIT (IC) ~3mm After the first solid-state circuit by Jack Kilby (1958), Robert Noyce and team build the first monolithic integrated circuit with PN-junction isolation at Fairchild (1960): A flip-flop in transistor-resistor logic Source: Computer History Museum; B. Lojek History of Semiconductor Engineering, EE Times
13 HISTORY: THE ANALOG INTEGRATED CIRCUIT (IC) 1964: Robert J. Widlar, the Father of Analog Integrated Circuits, designs the first integrated op-amp: The µa702 Source: T. Lee Tales of the Continuum: A Subsamples History of Analog Circuits 2007; Smithsonian
14 HISTORY: MOORE S LAW 1965: Gordon E. Moore, based on 4 data points, makes a bold prediction which would eventually become Moore s Law Source: G. E. Moore Cramming more components onto integrated circuits, Electronics, 1965
15 HISTORY: PLANAR MOSFET POISED TO SHRINK Source: B. Holt, ISSCC 16 keynote; IEEE 1974: Robert H. Dennard and his group at IBM create the foundation of the modern semiconductor world based on their scaling rules
16 HISTORY: PLANAR MOSFET POISED TO SHRINK Device or Circuit Parameter Scaling Factor Device dimension t OX, W, L 1/K Doping concentration N a K Voltage V [VDD, V T ] 1/K Current I [I D ] 1/K Capacitance! " # 1/K Delay time/circuit %& ' 1/K Power dissipation/circuit %' Transit frequency 1/K² K Power density %' " 1 Line resistance ( ) = +, -# K Source: Dennard et al., Design of Ion-Implanted MOSFET s with Very Small Physical Dimensions, JSSC, 1974; Razavi, Fundamentals of Microelectronics
17 HISTORY: PLANAR MOSFET POISED TO SHRINK Device or Circuit Parameter Scaling Factor Device dimension t OX, W, L 1/K Doping concentration N a K Voltage V [VDD, V T ] 1/K Current I [I D ] 1/K K= Capacitance! " # 1/K Delay time/circuit %& ' 1/K Power dissipation/circuit %' 1/K² Transit frequency K Power density %' " 1 Line resistance ( ) = +, -# K Source: Dennard et al., Design of Ion-Implanted MOSFET s with Very Small Physical Dimensions, JSSC, 1974
18 WHAT IF? Normalized to Source: J. Bradford DeLong, UCB; ITRS; Computer History Museum
19 WHAT IF? 10 Normalized to Transistors/area World GDP Source: J. Bradford DeLong, UCB; ITRS; Computer History Museum
20 WHAT IF? Source: J. Bradford DeLong, UCB; ITRS; Computer History Museum
21 SHRINKING IS GETTING TOUGHER BUT: Classical CMOS scaling running out of steam K= LGate oxide too thin LLeakage currents too large (D-S, G-S, D-B) LWavelength of lithography LEconomics Source: Nature, Feb. 2016
22 SHRINKING IS GETTING TOUGHER K= Source: Nature, Feb. 2016
23 How are Circuits designed and Why is that an Art?
24 THE DEVELOPMENT FLOW OF ANALOG CIRCUITS & SYSTEMS BATTERY RX PLL LDOs XO I RX FILT RX DFE + ADC Q H3 H2 H1 L1 GSM1800/ GSM1900 PMU HSPA TRX PA DC/DC L2 B1 B8 DigRF V3.09 DigRF V3.09 DATA CONTROL POW-DET GSM850 Brainstorm Ideas Evaluate Specifications HSPA BASEBAND FLASH & RAM FRONT-END CONTROL (GPO, DAC) Polar TX TX PLL LB 2G HB 2G HB 3G PA LB 3G PA O/M O/M SP2T/ DIPLEXER OR OPTIONAL 2G PA Design Block-Level System Design Component- Level Circuit Test & Debug Simulate Design Layout & Fabricate
25 THE PLANAR MOSFET IS A VERSATILE DEVICE Depending on bias conditions can act as Switch Resistor (variable) Capacitor (variable) Diode Source: Razavi, Fundamentals of Microelectronics Voltage-controlled current source I DS = 1 2 µ nc ox W L (V GS V TH ) 2 (1 + V DS )
26 HUGE VARIETY OF CIRCUIT TOPOLOGIES EXAMPLE: VARIOUS CIRCUITS USING TWO FETS INVERTER (OR AMPLIFIER) T-GATE CURRENT MIRROR (PSEUDO) DIFF PAIR PUSH-PULL MULTIPLEXER CS WITH ACTIVE LOAD NEG RESISTOR SAMPLE & HOLD (OR RC-FILTER) (OR SWITCH-CAP) CS WITH CASCODE (OR CURRENT SOURCE) VOLTAGE REFERENCE PEAK DETECT SOURCE FOLLOWER VOLTAGE DIVIDER
27 A LOT TO CONSIDER FOR NOVEL CIRCUITS Production tolerance Short channel effects Model deficiencies Device mismatch Interactions between blocks Wiring impact (R, L, C, K) Design trade-offs (area / power / performance) Environmental factors (supply / temperature) Topology selection Test & Debug Architectural trade-offs (analog-digital / HW-SW) Source: TECHINSIGHTS, teardown.com
28 FUTURE RESEARCH Wireless Power Management New Technologies Source: Intel; 3GPP
29 FUTURE RESEARCH: WIRELESS Wireless will further proliferate Today: 450Mb/s in LTE-Advanced In Reach: 1Gb/s Next step: 5 th generation mobile Hot topic in academia & industry >10Gbit/s Billions of devices, 10yrs on battery New technology: mm-wave (28/38GHz) Low-power implementation is key Source: Anritsu, Understanding 5G
30 FUTURE RESEARCH: POWER MANAGEMENT Wireless bogged down by need to recharge battery Main factor is increased usage Assuming 1800mAh battery Standby: 25 days 3mA idle current) Talk time: 18h 100mA 3G current) Target for IoT connectivity 10yrs on 2 AA batteries (~6000mAh) Idle current: 70µA Alternative: Battery-less For tiny sensors battery volume (and waste) is a burden Generate energy from fields (RF, LF) or from harvesters (photovoltaic) Wireless data & energy critically important for medical use Brain Machine Interface Source: Energizer E91 datasheet; Ericsson/NSN LTE Evolution for Cellular IoT ; Shenoy, ISSCC 2016
31 FUTURE RESEARCH: NEW TECHNOLOGIES FinFET (or TriGate-FET) from 22nm (Intel) resp. 16nm (Samsung, TSMC) in production for digital IC Improved performance for analog (future) Very low VDD (<1V) PMOS almost as strong as NMOS Less DIBL, good subthreshold Different technologies under investigation à novel devices Source: Holt, ISSCC 2016 keynote; TSMC, IEDM 2014
32 TWO THOUGHTS TO TAKE HOME WITH YOU Without decades-long progress in semiconductors the world would look drastically different today But it is getting more difficult to keep the exponential alive! New applications, new technologies and new ideas will drive forward analog integrated circuit design It will continue to be a highly fascinating field!
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