Chapter 1, Introduction
|
|
- Dora Weaver
- 5 years ago
- Views:
Transcription
1 Introduction to Semiconductor Manufacturing Technology Chapter 1, Introduction 1
2 Objective After taking this course, you will able to Use common semiconductor terminology Describe a basic IC fabrication sequence Briefly explain each process step Relate your job or products to semiconductor manufacturing process 2
3 Topics Introduction IC Device and Design Semiconductor Manufacturing Processes Future Trends 3
4 Introduction First Transistor, AT&T Bell Labs, 1947 First Single Crystal Germanium, 1952 First Single Crystal Silicon, 1954 First IC device, TI, 1958 First IC product, Fairchild Camera,
5 First Transistor, Bell Lab, 1947 Photo courtesy: AT&T Archive 5
6 First Transistor and Its Inventors John Bardeen, William Shockley and Walter Brattain Photo courtesy: Lucent Technologies Inc. 6
7 First IC Device Made by Jack Kilby of Texas Instrument in 1958 Photo courtesy: Texas Instruments 7
8 First Silicon IC Chip Made by Robert Noyce of Fairchild Camera in 1961 Photo courtesy: Fairchild Semiconductor International 8
9 Moore s Law Intel co-founder Gorden Moore notice in 1964 Number of transistors doubled every 12 months while price unchanged Slowed down in the 1980s to every 18 months Amazingly still correct, likely to keep until
10 Moore s Law, Intel s Version Transistors Pentium III 10M 1M Pentium 100K 10K 1K
11 IC Scales Integration level Abbreviation Number of devices on a chip Small Scale Integration SSI 2 to 50 Medium Scale Integration MSI 50 to 5,000 Large Scale Integration LSI 5,000 to 100,000 Very Large Scale Integration VLSI 100,000 to 10,000,000 Ultra Large Scale Integration ULSI 10,000,000 to 1,000,000,000 Super Large Scale Integration SLSI over 1,000,000,000 11
12 Road Map Semiconductor Industry Minimum feature size (μm) DRAM Bits/chip 64 M 256 M 1 G 4 G 16 G 64 G volume (millicents) Microprocessor Transistors/cm 2 4 M 7 M 13 M 25 M 50 M 90 M volume (millicents) ASIC Transistors/cm 2 2 M 4 M 7 M 13 M 25 M 40 M volume (millicents) Wafer size (mm) (?) 12
13 Feature Size and Wafer Size Chip made with 0.35 μm technology with 0.25 μm technology with 0.18 μm technology Chip or die 300 mm 200 mm 150 mm 13
14 Smallest Known Transistor Made by NEC in 1997 Source Lower gate Upper gate Dielectric Drain n + n + P-type substrate Ultra shallow junctions micron lower gate width Photo courtesy: NEC Corporation 14
15 Limit of the IC Geometry Size of the atom 15
16 Limit of the IC device Atom size: several Å Need some atoms to form a device Likely the final limit is around 100 Å or 0.01 micron. About 30 silicon atoms 16
17 IC Design: First IC Photo courtesy: Texas Instruments 17
18 IC Design: CMOS Inverter V in V dd (a) NMOS PMOS V ss V out N-channel active region N-channel Vt N-channel LDD N-channel S/D Shallow trench isolation (STI) P-channel active region P-channel Vt P-channel LDD P-channel S/D (b) P-well Metal 1 Polycide gate and local interconnection N-well Contact Metal 1, AlCu W PMD n + P-Well n + P-Epi STI P-Wafer p + p + N-Well (c) 18
19 IC Design: Layout and Masks of CMOS Inverter CMOS inverter layout Mask 1, N-well Mask 2, P-well Mask 3, shallow trench isolation Mask 4, 7, 9, N-Vt, LDD, S/D Mask 5, 8, 10, P-Vt, LDD, S/D Mask 6, gate/local interconnection Mask 11, contact Mask 12, metal 1 19
20 Mask/Reticle Pellicle Chrome pattern Phase shift coating Quartz substrate 20
21 A Mask and a Reticle Photo courtesy: SGS Thompson 21
22 Wafer Process Flow Materials IC Fab Metallization CMP Dielectric deposition Test Wafers Masks Thermal Processes Implant PR strip Etch PR strip Packaging Photolithography Final Test Design 22
Progress due to: Feature size reduction - 0.7X/3 years (Moore s Law). Increasing chip size - 16% per year. Creativity in implementing functions.
Introduction - Chapter 1 Evolution of IC Fabrication 1960 and 1990 integrated t circuits. it Progress due to: Feature size reduction - 0.7X/3 years (Moore s Law). Increasing chip size - 16% per year. Creativity
More informationVLSI Design. Introduction
VLSI Design Introduction Outline Introduction Silicon, pn-junctions and transistors A Brief History Operation of MOS Transistors CMOS circuits Fabrication steps for CMOS circuits Introduction Integrated
More informationEMT 251 Introduction to IC Design
EMT 251 Introduction to IC Design (Pengantar Rekabentuk Litar Terkamir) Semester II 2011/2012 Introduction to IC design and Transistor Fundamental Some Keywords! Very-large-scale-integration (VLSI) is
More informationLecture Integrated circuits era
Lecture 1 1.1 Integrated circuits era Transistor was first invented by William.B.Shockley, Walter Brattain and John Bardeen of Bell laboratories. In 1961, first IC was introduced. Levels of Integration:-
More informationTransistor was first invented by William.B.Shockley, Walter Brattain and John Bardeen of Bell Labratories. In 1961, first IC was introduced.
Unit 1 Basic MOS Technology Transistor was first invented by William.B.Shockley, Walter Brattain and John Bardeen of Bell Labratories. In 1961, first IC was introduced. Levels of Integration:- i) SSI:-
More information420 Intro to VLSI Design
Dept of Electrical and Computer Engineering 420 Intro to VLSI Design Lecture 0: Course Introduction and Overview Valencia M. Joyner Spring 2005 Getting Started Syllabus About the Instructor Labs, Problem
More informationVLSI Design. Introduction
Tassadaq Hussain VLSI Design Introduction Outcome of this course Problem Aims Objectives Outcomes Data Collection Theoretical Model Mathematical Model Validate Development Analysis and Observation Pseudo
More informationIntroduction to VLSI ASIC Design and Technology
Introduction to VLSI ASIC Design and Technology Paulo Moreira CERN - Geneva, Switzerland Paulo Moreira Introduction 1 Outline Introduction Is there a limit? Transistors CMOS building blocks Parasitics
More informationChapter 3 Basics Semiconductor Devices and Processing
Chapter 3 Basics Semiconductor Devices and Processing 1 Objectives Identify at least two semiconductor materials from the periodic table of elements List n-type and p-type dopants Describe a diode and
More informationChapter 3: Basics Semiconductor Devices and Processing 2006/9/27 1. Topics
Chapter 3: Basics Semiconductor Devices and Processing 2006/9/27 1 Topics What is semiconductor Basic semiconductor devices Basics of IC processing CMOS technologies 2006/9/27 2 1 What is Semiconductor
More informationSilicon VLSI Technology. Fundamentals, Practice and Modeling. Class Notes For Instructors. J. D. Plummer, M. D. Deal and P. B.
Silicon VLSI Technology Fundamentals, ractice, and Modeling Class otes For Instructors J. D. lummer, M. D. Deal and. B. Griffin These notes are intended to be used for lectures based on the above text.
More informationIntegrated Circuit Technology (Course Code: EE662) Lecture 1: Introduction
Indian Institute of Technology Jodhpur, Year 2015 2016 Integrated Circuit Technology (Course Code: EE662) Lecture 1: Introduction Course Instructor: Shree Prakash Tiwari, Ph.D. Email: sptiwari@iitj.ac.in
More informationAssoc. Prof. Dr. MONTREE SIRIPRUCHYANUN
1 Assoc. Prof. Dr. MONTREE SIRIPRUCHYANUN Dept. of Teacher Training in Electrical Engineering 1 King Mongkut s Institute of Technology North Bangkok 1929 Bulky, expensive and required high supply voltages.
More information+1 (479)
Introduction to VLSI Design http://csce.uark.edu +1 (479) 575-6043 yrpeng@uark.edu Invention of the Transistor Vacuum tubes ruled in first half of 20th century Large, expensive, power-hungry, unreliable
More informationMICROPROCESSOR TECHNOLOGY
MICROPROCESSOR TECHNOLOGY Assis. Prof. Hossam El-Din Moustafa Lecture 3 Ch.1 The Evolution of The Microprocessor 17-Feb-15 1 Chapter Objectives Introduce the microprocessor evolution from transistors to
More informationFABRICATION OF CMOS INTEGRATED CIRCUITS. Dr. Mohammed M. Farag
FABRICATION OF CMOS INTEGRATED CIRCUITS Dr. Mohammed M. Farag Outline Overview of CMOS Fabrication Processes The CMOS Fabrication Process Flow Design Rules Reference: Uyemura, John P. "Introduction to
More informationEE4800 CMOS Digital IC Design & Analysis. Lecture 1 Introduction Zhuo Feng
EE4800 CMOS Digital IC Design & Analysis Lecture 1 Introduction Zhuo Feng 1.1 Prof. Zhuo Feng Office: EERC 730 Phone: 487-3116 Email: zhuofeng@mtu.edu Class Website http://www.ece.mtu.edu/~zhuofeng/ee4800fall2010.html
More informationLecture 8. MOS Transistors; Cheap Computers; Everycircuit
Lecture 8 MOS Transistors; Cheap Computers; Everycircuit Copyright 2017 by Mark Horowitz 1 Reading The rest of Chapter 4 in the reader For more details look at A&L 5.1 Digital Signals (goes in much more
More informationECE 2300 Digital Logic & Computer Organization
ECE 2300 Digital Logic & Computer Organization Spring 2018 CMOS Logic Lecture 4: 1 NAND Logic Gate X Y (X Y) = NAND Using De Morgan s Law: (X Y) = X +Y X X X +Y = Y Y Also a NAND We can build circuits
More informationLecture 0: Introduction
Lecture 0: Introduction Introduction Integrated circuits: many transistors on one chip. Very Large Scale Integration (VLSI): bucketloads! Complementary Metal Oxide Semiconductor Fast, cheap, low power
More informationTopic 3. CMOS Fabrication Process
Topic 3 CMOS Fabrication Process Peter Cheung Department of Electrical & Electronic Engineering Imperial College London URL: www.ee.ic.ac.uk/pcheung/ E-mail: p.cheung@ic.ac.uk Lecture 3-1 Layout of a Inverter
More informationIH2655 Design and Characterisation of Nano- and Microdevices. Lecture 1 Introduction and technology roadmap
IH2655 Design and Characterisation of Nano- and Microdevices Lecture 1 Introduction and technology roadmap IH2655 Design and Characterisation of Nano- and Microdevices Introduction to IH2655 Brief historic
More informationBasic Fabrication Steps
Basic Fabrication Steps and Layout Somayyeh Koohi Department of Computer Engineering Adapted with modifications from lecture notes prepared by author Outline Fabrication steps Transistor structures Transistor
More informationIn 1951 William Shockley developed the world first junction transistor. One year later Geoffrey W. A. Dummer published the concept of the integrated
Objectives History and road map of integrated circuits Application specific integrated circuits Design flow and tasks Electric design automation tools ASIC project MSDAP In 1951 William Shockley developed
More informationLayout of a Inverter. Topic 3. CMOS Fabrication Process. The CMOS Process - photolithography (2) The CMOS Process - photolithography (1) v o.
Layout of a Inverter Topic 3 CMOS Fabrication Process V DD Q p Peter Cheung Department of Electrical & Electronic Engineering Imperial College London v i v o Q n URL: www.ee.ic.ac.uk/pcheung/ E-mail: p.cheung@ic.ac.uk
More informationPhotolithography I ( Part 1 )
1 Photolithography I ( Part 1 ) Chapter 13 : Semiconductor Manufacturing Technology by M. Quirk & J. Serda Bjørn-Ove Fimland, Department of Electronics and Telecommunication, Norwegian University of Science
More information2.8 - CMOS TECHNOLOGY
CMOS Technology (6/7/00) Page 1 2.8 - CMOS TECHNOLOGY INTRODUCTION Objective The objective of this presentation is: 1.) Illustrate the fabrication sequence for a typical MOS transistor 2.) Show the physical
More informationDesign cycle for MEMS
Design cycle for MEMS Design cycle for ICs IC Process Selection nmos CMOS BiCMOS ECL for logic for I/O and driver circuit for critical high speed parts of the system The Real Estate of a Wafer MOS Transistor
More informationIntroduction to Electronic Devices
(Course Number 300331) Fall 2006 Instructor: Dr. Dietmar Knipp Assistant Professor of Electrical Engineering Information: http://www.faculty.iubremen.de/dknipp/ Source: Apple Ref.: Apple Ref.: IBM Critical
More informationCMOS: Fabrication principles and design rules
CMOS: Fabrication principles and design rules João Canas Ferreira University of Porto Faculty of Engineering 2016-02-29 Topics 1 Overview of the CMOS fabrication process 2 Geometric design rules João Canas
More informationDigital Integrated Circuits
Digital Integrated Circuits Yaping Dan ( 但亚平 ), PhD Office: Law School North 301 Tel: 34206045-3011 Email: yapingd@gmail.com Digital Integrated Circuits Introduction p-n junctions and MOSFETs The CMOS
More informationIntel's 65 nm Logic Technology Demonstrated on 0.57 µm 2 SRAM Cells
Intel's 65 nm Logic Technology Demonstrated on 0.57 µm 2 SRAM Cells Mark Bohr Intel Senior Fellow Director of Process Architecture & Integration Intel 1 What are We Announcing? Intel has fabricated fully-functional
More informationMathematics and Science in Schools in Sub-Saharan Africa
Mathematics and Science in Schools in Sub-Saharan Africa SEMICONDUCTORS What is a Semiconductor? What is a Semiconductor? Microprocessors LED Transistors Capacitors Range of Conduciveness The semiconductors
More informationLogic and Computer Design Fundamentals. Chapter 6 Selected Design Topics. Part 1 The Design Space
Logic and Computer Design Fundamentals Chapter 6 Selected Design Topics Part 1 The Design Space Charles Kime & Thomas Kaminski 2008 Pearson Education, Inc. (Hyperlinks are active in View Show mode) Overview
More informationLecture 1 Introduction to Solid State Electronics
EE 471: Transport Phenomena in Solid State Devices Spring 2018 Lecture 1 Introduction to Solid State Electronics Bryan Ackland Department of Electrical and Computer Engineering Stevens Institute of Technology
More informationSpiral 1 / Unit 8. Transistor Implementations CMOS Logic Gates
18.1 Spiral 1 / Unit 8 Transistor Implementations CMOS Logic Gates 18.2 Spiral Content Mapping Spiral Theory Combinational Design Sequential Design System Level Design Implementation and Tools Project
More informationLSI ON GLASS SUBSTRATES
LSI ON GLASS SUBSTRATES OUTLINE Introduction: Why System on Glass? MOSFET Technology Low-Temperature Poly-Si TFT Technology System-on-Glass Technology Issues Conclusion System on Glass CPU SRAM DRAM EEPROM
More informationCMOS Digital Integrated Circuits Lec 2 Fabrication of MOSFETs
CMOS Digital Integrated Circuits Lec 2 Fabrication of MOSFETs 1 CMOS Digital Integrated Circuits 3 rd Edition Categories of Materials Materials can be categorized into three main groups regarding their
More information2009 Spring CS211 Digital Systems & Lab 1 CHAPTER 3: TECHNOLOGY (PART 2)
1 CHAPTER 3: IMPLEMENTATION TECHNOLOGY (PART 2) Whatwillwelearninthischapter? we learn in this 2 How transistors operate and form simple switches CMOS logic gates IC technology FPGAs and other PLDs Basic
More informationThe future of lithography and its impact on design
The future of lithography and its impact on design Chris Mack www.lithoguru.com 1 Outline History Lessons Moore s Law Dennard Scaling Cost Trends Is Moore s Law Over? Litho scaling? The Design Gap The
More informationChapter 15 Summary and Future Trends
Chapter 15 Summary and Future Trends Hong Xiao, Ph. D. hxiao89@hotmail.com www2.austin.cc.tx.us/hongxiao/book.htm Hong Xiao, Ph. D. www2.austin.cc.tx.us/hongxiao/book.htm 1 The 1960s First IC product Bipolar
More informationLecture 020 ECE4430 Review II (1/5/04) Page 020-1
Lecture 020 ECE4430 Review II (1/5/04) Page 020-1 LECTURE 020 ECE 4430 REVIEW II (READING: GHLM - Chap. 2) Objective The objective of this presentation is: 1.) Identify the prerequisite material as taught
More informationECE 5745 Complex Digital ASIC Design Topic 2: CMOS Devices
ECE 5745 Complex Digital ASIC Design Topic 2: CMOS Devices Christopher Batten School of Electrical and Computer Engineering Cornell University http://www.csl.cornell.edu/courses/ece5950 Simple Transistor
More informationLecture 020 ECE4430 Review II (1/5/04) Page 020-1
Lecture 020 ECE4430 Review II (1/5/04) Page 020-1 LECTURE 020 ECE 4430 REVIEW II (READING: GHLM - Chap. 2) Objective The objective of this presentation is: 1.) Identify the prerequisite material as taught
More informationEE241 - Spring 2013 Advanced Digital Integrated Circuits. Announcements. Sign up for Piazza if you haven t already
EE241 - Spring 2013 Advanced Digital Integrated Circuits Lecture 2: Scaling Trends and Features of Modern Technologies Announcements Sign up for Piazza if you haven t already 2 1 Assigned Reading R.H.
More informationIntroduction. Digital Integrated Circuits A Design Perspective. Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic. July 30, 2002
Digital Integrated Circuits A Design Perspective Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic Introduction July 30, 2002 1 What is this book all about? Introduction to digital integrated circuits.
More informationEE669: VLSI TECHNOLOGY
EE669: VLSI TECHNOLOGY Autumn Semester Graduate Course 2014-2015 Session by Arun N. Chandorkar Emeritus Fellow Professor Department of Electrical Engineering Indian Institute of Technology, Bombay Powai,
More informationEE141-Fall 2009 Digital Integrated Circuits
EE141-Fall 2009 Digital Integrated Circuits Lecture 2 Integrated Circuit Basics: Manufacturing and Cost 1 1 Administrative Stuff Discussions start this Friday We have a third GSI Richie Przybyla, rjp@eecs
More informationMicroelectronics, BSc course
Microelectronics, BSc course MOS circuits: CMOS circuits, construction http://www.eet.bme.hu/~poppe/miel/en/14-cmos.pptx http://www.eet.bme.hu The abstraction level of our study: SYSTEM + MODULE GATE CIRCUIT
More informationIntroduction. Reading: Chapter 1. Courtesy of Dr. Dansereau, Dr. Brown, Dr. Vranesic, Dr. Harris, and Dr. Choi.
Introduction Reading: Chapter 1 Courtesy of Dr. Dansereau, Dr. Brown, Dr. Vranesic, Dr. Harris, and Dr. Choi http://csce.uark.edu +1 (479) 575-6043 yrpeng@uark.edu Why study logic design? Obvious reasons
More informationMethods for Manufacturing Improvement IEOR 130. Prof. Robert C. Leachman University of California at Berkeley. August, 2017
Methods for Manufacturing Improvement IEOR 130 Prof. Robert C. Leachman University of California at Berkeley August, 2017 IEOR 130 Purpose of course: instill cross-disciplinary, industrial engineering
More informationChapter 1 Introduction Historical Perspective
[VLSI Digital Circuits Design], Edited by [Editor s Name]. ISBN 0-471-XXXXX-X Copyright 2003 Wiley[Imprint], Inc. Chapter 1 Introduction Designing high-speed digital circuits is an art. Even though a solid
More informationELCN100 Electronic Lab. Instruments and Measurements Spring Lecture 01: Introduction
ELCN100 Electronic Lab. Instruments and Measurements Spring 2018 Lecture 01: Introduction Dr. Hassan Mostafa حسن مصطفى د. hmostafa@uwaterloo.ca LAB 1 Cairo University Course Outline Course objectives To
More informationThe Art of ANALOG LAYOUT Second Edition
The Art of ANALOG LAYOUT Second Edition Alan Hastings 3 EARSON Pearson Education International Contents Preface to the Second Edition xvii Preface to the First Edition xix Acknowledgments xxi 1 Device
More information32nm High-K/Metal Gate Version Including 2nd Generation Intel Core processor family
From Sand to Silicon Making of a Chip Illustrations 32nm High-K/Metal Gate Version Including 2nd Generation Intel Core processor family April 2011 1 The illustrations on the following foils are low resolution
More informationAdvanced Digital Integrated Circuits. Lecture 2: Scaling Trends. Announcements. No office hour next Monday. Extra office hour Tuesday 2-3pm
EE241 - Spring 20 Advanced Digital Integrated Circuits Lecture 2: Scaling Trends and Features of Modern Technologies Announcements No office hour next Monday Extra office hour Tuesday 2-3pm 2 1 Outline
More informationEE 410: Integrated Circuit Fabrication Laboratory
EE 410: Integrated Circuit Fabrication Laboratory 1 EE 410: Integrated Circuit Fabrication Laboratory Web Site: Instructor: http://www.stanford.edu/class/ee410 https://ccnet.stanford.edu/ee410/ (on CCNET)
More informationEC0306 INTRODUCTION TO VLSI DESIGN
EC0306 INTRODUCTION TO VLSI DESIGN UNIT I INTRODUCTION TO MOS CIRCUITS Why VLSI? Integration improves the design: o lower parasitics = higher speed; o lower power; o physically smaller. Integration reduces
More informationVLSI: An Introduction
Chapter 1 UEEA2223/UEEG4223 Integrated Circuit Design VLSI: An Introduction Prepared by Dr. Lim Soo King 02 Jan 2011. Chapter 1 VLSI Design: An Introduction... 1 1.0 Introduction... 1 1.0.1 Early Computing
More informationDIGITAL TECHNICS. Dr. Bálint Pődör. Óbuda University, Microelectronics and Technology Institute
DIGITAL TECHNICS Dr. Bálint Pődör Óbuda University, Microelectronics and Technology Institute 11. LECTURE (LOGIC CIRCUITS, PART 3) TTL, SCHOTTKY TTL, BiCMOS, ECL 2016/2017 11. LECTURE 1. Logic circuit
More informationElectronic Circuits. Lecturer. Schedule. Electronic Circuits. Books
Lecturer Electronic Circuits Jón Tómas Guðmundsson Jón Tómas Guðmundsson Office: Room 120, UM-SJTU JI Building Office hours: Monday and Thursday 13:15-14:15 e-mail: tumi@raunvis.hi.is tumi@raunvis.hi.is
More informationDIGITAL TECHNICS II. Dr. Bálint Pődör. Óbuda University, Microelectronics and Technology Institute 6. LECTURE: LOGIC CIRCUITS I
DIGITAL TECHNICS II Dr. Bálint Pődör Óbuda University, Microelectronics and Technology Institute 6. LECTURE: LOGIC CIRCUITS I 1st (Spring) term 2015/2016 1 6. LECTURE LOGIC CIRCUITS I 1. Digital/logic
More informationLecture #29. Moore s Law
Lecture #29 ANNOUNCEMENTS HW#15 will be for extra credit Quiz #6 (Thursday 5/8) will include MOSFET C-V No late Projects will be accepted after Thursday 5/8 The last Coffee Hour will be held this Thursday
More informationEE 330 Lecture 7. Design Rules. IC Fabrication Technology Part 1
EE 330 Lecture 7 Design Rules IC Fabrication Technology Part 1 Review from Last Time Technology Files Provide Information About Process Process Flow (Fabrication Technology) Model Parameters Design Rules
More informationDigital Integrated Circuits 1: Fundamentals
Digital Integrated Circuits 1: Fundamentals Atsushi Takahashi Department of Information and Communications Engineering School of Engineering Tokyo Institute of Technology 1 VLSI and Computer System VLSI
More informationIntroduction. Introduction. Digital Integrated Circuits A Design Perspective. Introduction. The First Computer
Digital Integrated Circuits A Design Perspective Prentice Hall Electronics and VLSI Series ISBN 0-3-20764-4 [Adapted from Rabaey s Digital Integrated Circuits, Second Edition, 2003 J. Rabaey, A. Chandrakasan,
More informationImproved Inverter: Current-Source Pull-Up. MOS Inverter with Current-Source Pull-Up. What else could be connected between the drain and V DD?
Improved Inverter: Current-Source Pull-Up MOS Inverter with Current-Source Pull-Up What else could be connected between the drain and? Replace resistor with current source I SUP roc i D v IN v OUT Find
More informationFUTURE PROSPECTS FOR CMOS ACTIVE PIXEL SENSORS
FUTURE PROSPECTS FOR CMOS ACTIVE PIXEL SENSORS Dr. Eric R. Fossum Jet Propulsion Laboratory Dr. Philip H-S. Wong IBM Research 1995 IEEE Workshop on CCDs and Advanced Image Sensors April 21, 1995 CMOS APS
More informationIntroduction to Digital Logic Missouri S&T University CPE 2210 Electric Circuits
Introduction to Digital Logic Missouri S&T University CPE 2210 Electric Circuits Egemen K. Çetinkaya Egemen K. Çetinkaya Department of Electrical & Computer Engineering Missouri University of Science and
More informationLSI Logic LSI53C1030 PCI-X to Dual Channel Ultra320 SCSI Controller 0.18 µm CMOS Process
LSI Logic LSI53C13 PCI-X to Dual Channel Ultra32 SCSI Controller.18 µm CMOS Process Structural Analysis For comments, questions, or more information about this report, or for any additional technical needs
More informationECE520 VLSI Design. Lecture 2: Basic MOS Physics. Payman Zarkesh-Ha
ECE520 VLSI Design Lecture 2: Basic MOS Physics Payman Zarkesh-Ha Office: ECE Bldg. 230B Office hours: Wednesday 2:00-3:00PM or by appointment E-mail: pzarkesh@unm.edu Slide: 1 Review of Last Lecture Semiconductor
More informationCPE/EE 427, CPE 527 VLSI Design I L01: Introduction, Design Metrics. What is this course all about?
CPE/EE 427, CPE 527 VLSI Design I L01: Introduction, Design Metrics Aleksandar Milenkovic ( www.ece.uah.edu/~milenka ) www.ece.uah.edu/~milenka/cpe527-05f What is this course all about? Introduction to
More informationLecture 33 - The Short Metal-Oxide-Semiconductor Field-Effect Transistor (cont.) April 30, 2007
6.720J/3.43J - Integrated Microelectronic Devices - Spring 2007 Lecture 33-1 Lecture 33 - The Short Metal-Oxide-Semiconductor Field-Effect Transistor (cont.) April 30, 2007 Contents: 1. MOSFET scaling
More informationVariation-Aware Design for Nanometer Generation LSI
HIRATA Morihisa, SHIMIZU Takashi, YAMADA Kenta Abstract Advancement in the microfabrication of semiconductor chips has made the variations and layout-dependent fluctuations of transistor characteristics
More informationThis Week s Subject. DRAM & Flexible RRAM. p-channel MOSFET (PMOS) CMOS: Complementary Metal Oxide Semiconductor
DRAM & Flexible RRAM This Week s Subject p-channel MOSFET (PMOS) CMOS: Complementary Metal Oxide Semiconductor CMOS Logic Inverter NAND gate NOR gate CMOS Integration & Layout GaAs MESFET (JFET) 1 Flexible
More informationBasic Characteristics of Digital ICs
ECEN202 Section 2 Characteristics of Digital IC s Part 1: Specification of characteristics An introductory look at digital IC s: Logic families Basic construction and operation Operating characteristics
More informationProcess Control Limits in a CMOS ASIC Fabrication Process K. Jayavel, K.S.R.C.Murthy
Process Control Limits in a CMOS ASIC Fabrication Process K. Jayavel, K.S.R.C.Murthy Society for Integrated circuit Technology and Applied Research Centre (SITAR), 1640, Doorvaninagar, Bangalore, Karnataka,
More information40nm Node CMOS Platform UX8
FUKAI Toshinori, IKEDA Masahiro, TAKAHASHI Toshifumi, NATSUME Hidetaka Abstract The UX8 is the latest process from NEC Electronics. It uses the most advanced exposure technology to achieve twice the gate
More informationCS 6135 VLSI Physical Design Automation Fall 2003
CS 6135 VLSI Physical Design Automation Fall 2003 1 Course Information Class time: R789 Location: EECS 224 Instructor: Ting-Chi Wang ( ) EECS 643, (03) 5742963 tcwang@cs.nthu.edu.tw Office hours: M56R5
More informationChapter 2 : Semiconductor Materials & Devices (II) Feb
Chapter 2 : Semiconductor Materials & Devices (II) 1 Reference 1. SemiconductorManufacturing Technology: Michael Quirk and Julian Serda (2001) 3. Microelectronic Circuits (5/e): Sedra & Smith (2004) 4.
More informationFrom Sand to Silicon Making of a Chip Illustrations May 2009
From Sand to Silicon Making of a Chip Illustrations May 2009 1 The illustrations on the following foils are low resolution images that visually support the explanations of the individual steps. For publishing
More informationEE 434 ASIC & Digital Systems
EE 434 ASIC & Digital Systems Dae Hyun Kim EECS Washington State University Spring 2017 Course Website http://eecs.wsu.edu/~ee434 Themes Study how to design, analyze, and test a complex applicationspecific
More informationDesign Simulation and Analysis of NMOS Characteristics for Varying Oxide Thickness
MIT International Journal of Electronics and Communication Engineering, Vol. 4, No. 2, August 2014, pp. 81 85 81 Design Simulation and Analysis of NMOS Characteristics for Varying Oxide Thickness Alpana
More informationLecture 27 ANNOUNCEMENTS. Regular office hours will end on Monday 12/10 Special office hours will be posted on the EE105 website
Lecture 27 ANNOUNCEMENTS Regular office hours will end on Monday 12/10 Special office hours will be posted on the EE105 website Final Exam Review Session: Friday 12/14, 3PM, HP Auditorium Video will be
More informationPropagation Delay, Circuit Timing & Adder Design. ECE 152A Winter 2012
Propagation Delay, Circuit Timing & Adder Design ECE 152A Winter 2012 Reading Assignment Brown and Vranesic 2 Introduction to Logic Circuits 2.9 Introduction to CAD Tools 2.9.1 Design Entry 2.9.2 Synthesis
More informationPropagation Delay, Circuit Timing & Adder Design
Propagation Delay, Circuit Timing & Adder Design ECE 152A Winter 2012 Reading Assignment Brown and Vranesic 2 Introduction to Logic Circuits 2.9 Introduction to CAD Tools 2.9.1 Design Entry 2.9.2 Synthesis
More informationMaxim MAX3940E Electro-Absorption Modulator Structural Analysis
May 23, 2006 Maxim MAX3940E Electro-Absorption Modulator Structural Analysis For comments, questions, or more information about this report, or for any additional technical needs concerning semiconductor
More informationShorthand Notation for NMOS and PMOS Transistors
Shorthand Notation for NMOS and PMOS Transistors Terminal Voltages Mode of operation depends on V g, V d, V s V gs = V g V s V gd = V g V d V ds = V d V s = V gs - V gd Source and drain are symmetric diffusion
More informationPhysical Design of Digital Integrated Circuits (EN0291 S40) Sherief Reda Division of Engineering, Brown University Fall 2006
Physical Design of Digital Integrated Circuits (EN0291 S40) Sherief Reda Division of Engineering, Brown University Fall 2006 Lecture 01: the big picture Course objective Brief tour of IC physical design
More information1 Digital EE141 Integrated Circuits 2nd Introduction
Digital Integrated Circuits Introduction 1 What is this lecture about? Introduction to digital integrated circuits + low power circuits Issues in digital design The CMOS inverter Combinational logic structures
More information1. Introduction. Institute of Microelectronic Systems. Status of Microelectronics Technology. (nm) Core voltage (V) Gate oxide thickness t OX
Threshold voltage Vt (V) and power supply (V) 1. Introduction Status of s Technology 10 5 2 1 0.5 0.2 0.1 V dd V t t OX 50 20 10 5 2 Gate oxide thickness t OX (nm) Future VLSI chip 2005 2011 CMOS feature
More informationUnit-1. MOS Transistor Theory
VLSI DESIGN -EEE Unit-1 MOS Transistor Theory VLSI DESIGN UNIT I Contents: 1.1 Historical Perspective 1.2 What is VLSI? - Introduction 1.3 VLSI Design Flow 1.4 Design Hierarchy 1.5 Basic MOS Transistor
More informationIntroduction to Microdevices and Microsystems
PHYS 534 (Fall 2008) Module on Microsystems & Microfabrication Lecture 1 Introduction to Microdevices and Microsystems Srikar Vengallatore, McGill University 1 Introduction to Microsystems Outline of Lecture
More informationSAMPLE SLIDES & COURSE OUTLINE. Core Competency In Semiconductor Technology: 2. FABRICATION. Dr. Theodore (Ted) Dellin
& Digging Deeper Devices, Fabrication & Reliability For More Info:.com or email Dellin@ieee.org SAMPLE SLIDES & COURSE OUTLINE In : 2. A Easy, Effective, of How Devices Are.. Recommended for everyone who
More informationSemiconductor TCAD Tools
Device Design Consideration for Nanoscale MOSFET Using Semiconductor TCAD Tools Teoh Chin Hong and Razali Ismail Department of Microelectronics and Computer Engineering, Universiti Teknologi Malaysia,
More informationJan M. Rabaey Anantha Chandrakasan Borivoje Nikolic. July 30, Digital EE141 Integrated Circuits 2nd Introduction
Digital Integrated Circuits A Design Perspective Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic Introduction July 30, 2002 1 What is this book all about? Introduction to digital integrated circuits.
More informationDigital Integrated Circuits EECS 312
14 12 10 8 6 Fujitsu VP2000 IBM 3090S Pulsar 4 IBM 3090 IBM RY6 CDC Cyber 205 IBM 4381 IBM RY4 2 IBM 3081 Apache Fujitsu M380 IBM 370 Merced IBM 360 IBM 3033 Vacuum Pentium II(DSIP) 0 1950 1960 1970 1980
More informationOutcomes. Spiral 1 / Unit 8. DeMorgan s Theorem DEMORGAN'S THEOREM. Transistor Implementations CMOS Logic Gates
18.1 18.2 Spiral 1 / Unit 8 Transistor Implementations MOS Logic Gates Mark Redekopp Outcomes I know the difference between combinational and sequential logic and can name examples of each. I understand
More informationIntroduction to Materials Engineering: Materials Driving the Electronics Revolution Robert Hull, MSE
Introduction to Materials Engineering: Materials Driving the Electronics Revolution Robert Hull, MSE Outline Microelectronics Miniaturization Historical Development: Electronics before Semiconductors The
More informationVLSI Design. Brief Syllabus. Course Scope. Major Contents. IC Evolution. Today s Outline
1 VLSI Design Tsung-Chu Huang Department of Electronic Engineering National Changhua University of Education Email: tch@cc.ncue.edu.tw 2011/09/19 Brief Syllabus 1. Visit http://testlab.ncue.edu.tw/tch
More information