DATASHEET CA3240, CA3240A. Features. Ordering Information. Applications. Pinout. Functional Diagram

Transcription

1 DATASHEET CA, CAA Dual,.MHz, BiMOS Operational Amplifier with MOSFET Input/Bipolar Output FN Rev. The CAA and CA are dual versions of the popular CA series integrated circuit operational amplifiers. They combine the advantages of MOS and bipolar transistors on the same monolithic chip. The gateprotected MOSFET (PMOS) input transistors provide high input impedance and a wide commonmode input voltage range (typically to.v below the negative supply rail). The bipolar output transistors allow a wide output voltage swing and provide a high output current capability. The CAA and CA are compatible with the industry standard operational amplifiers in similar packages. Ordering Information PART NUMBER TEMP. RANGE ( o C) Functional Diagram PACKAGE CAAE to Ld PDIP E. CAAEZ (See Note) to Ld PDIP (Pbfree) PKG. DWG. # E. CAE to Ld PDIP E. CAEZ (See Note) to Ld PDIP (Pbfree) E. Pbfree PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. NOTE: Intersil Pbfree products employ special Pbfree material sets; molding compounds/die attach materials and % matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pbfree soldering operations. Intersil Pbfree products are MSL classified at Pbfree peak reflow temperatures that meet or exceed the Pbfree requirements of IPC/JEDEC J STD. Features Dual Version of CA Internally Compensated MOSFET Input Stage Very High Input Impedance (Z IN ).T (Typ) Very Low Input Current (I I ) pa (Typ) at V Wide CommonMode Input Voltage Range (V ICR ): Can Be Swung.V Below Negative Supply Voltage Rail Directly Replaces Industry Type in Most Applications PbFree Available (RoHS Compliant) Applications Ground Referenced Single Amplifiers in Automobile and Portable Instrumentation Sample and Hold Amplifiers Long Duration Timers/Multivibrators (Microseconds MinutesHours) Photocurrent Instrumentation Intrusion Alarm System Active Filters Comparators Instrumentation Amplifiers Pinout CA, CAA (PDIP) TOP VIEW Function Generators Power Supplies ma BIAS CIRCUIT CURRENT SOURCES AND REGULATOR ma V OUTPUT (A) INV. INPUT (A) NONINV. INPUT (A) V V OUTPUT INV. INPUT (B) NONINV. INPUT (B) A.mA A A ma A A, A IN PUT OUT PUT C pf V FN Rev. Page of

2 CA, CAA Absolute Maximum Ratings Supply Voltage (Between V and V) V Differential Input Voltage V Input Voltage (V V) to (V.V) Input Current ma Output Short Circuit Duration (Note ) Indefinite Operating Conditions Temperature Range o C to o C Voltage Range V to V or V to V Thermal Information Thermal Resistance (Typical, Note ) JA ( o C/W) Lead PDIP Package* Maximum Junction Temperature (Plastic Package) o C Maximum Storage Temperature Range o C to o C Maximum Lead Temperature (Soldering s) o C *Pbfree PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES:. Short circuit may be applied to ground or to either supply. Temperatures and/or supply voltages must be limited to keep dissipation within maximum rating.. JA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications For Equipment Design, V SUPPLY = V, T A = o C, Unless Otherwise Specified CA CAA PARAMETER SYMBOL MIN TYP MAX MIN TYP MAX UNITS Input Offset Voltage V IO mv Input Offset Current I IO.. pa Input Current I I pa LargeSignal Voltage Gain A OL kv/v (See Figures, ) (Note ) db Common Mode Rejection CMRR V/V Ratio (See Figure ) 9 9 db Common Mode Input Voltage Range (See Figure) Power Supply Rejection Ratio (See Figure 9) V ICR. to. PSRR ( V IO / V. to. V V/V db Maximum Output Voltage (Note ) V OM V (See Figures, ) V OM.. V Maximum Output Voltage (Note ) V OM.... V Total Supply Current (See Figure ) For Both Amps I ma Total Device Dissipation P D mw NOTES:. At V O = V PP, V, V and R L = k.. At R L = k.. At V = V, V = GND, I SINK = A. Electrical Specifications For Equipment Design, V SUPPLY = V, T A = o C, Unless Otherwise Specified TYPICAL VALUES PARAMETER SYMBOL TEST CONDITIONS CAA CA UNITS Input Resistance R I.. T Input Capacitance C I pf Output Resistance R O Equivalent Wideband Input Noise Voltage e N BW = khz, R S = M V (See Figure ) FN Rev. Page of

3 CA, CAA Electrical Specifications For Equipment Design, V SUPPLY = V, T A = o C, Unless Otherwise Specified (Continued) TYPICAL VALUES PARAMETER SYMBOL TEST CONDITIONS CAA CA UNITS Equivalent Input Noise Voltage e N f = khz, R S = nv/ Hz (See Figure ) f = khz, R S = nv/ Hz ShortCircuit Current to Opposite Supply I OM Source ma I OM Sink ma Gain Bandwidth Product (See Figures, ) f T.. MHz Slew Rate (See Figure ) SR 9 9 V/ s Transient Response (See Figure ) t r R L = k, C L = pf Rise Time.. s OS R L = k, C L = pf Overshoot % Settling Time at V PP (See Figure ) t S A V =, R L = k, C L = pf, To mv.. s Voltage Follower To mv.. s Crosstalk (See Figure ) f = khz db Electrical Specifications For Equipment Design, at V SUPPLY = V, T A = to o C, Unless Otherwise Specified TYPICAL VALUES PARAMETER SYMBOL CAA CA UNITS Input Offset Voltage V IO mv Input Offset Current (Note ) I IO pa Input Current (Note ) I I pa Large Signal Voltage Gain (See Figures, ), (Note ) A OL kv/v 9 9 db Common Mode Rejection Ratio (See Figure ) CMRR V/V 9 9 db Common Mode Input Voltage Range (See Figure ) V ICR to. to. V Power Supply Rejection Ratio (See Figure 9) PSRR V/V ( V IO / V ) db Maximum Output Voltage (Note ) (See Figures, ) V OM.. V V OM.. V Supply Current (See Figure ) Total For Both Amps I.. ma Total Device Dissipation P D mw Temperature Coefficient of Input Offset Voltage V IO / T V/ o C NOTES:. At V O = V PP, V, V and R L = k.. At R L = k.. At T A = o C. Electrical Specifications For Equipment Design, at V = V, V = V, T A = o C, Unless Otherwise Specified TYPICAL VALUES PARAMETER SYMBOL CAA CA UNITS Input Offset Voltage V IO mv Input Offset Current I IO.. pa Input Current I I pa Input Resistance R IN T Large Signal Voltage Gain (See Figures, ) A OL kv/v db FN Rev. Page of

4 CA, CAA Electrical Specifications For Equipment Design, at V = V, V = V, T A = o C, Unless Otherwise Specified (Continued) TYPICAL VALUES PARAMETER SYMBOL CAA CA UNITS CommonMode Rejection Ratio CMRR V/V 9 9 db CommonMode Input Voltage Range (See Figure ) V ICR.. V.. V Power Supply Rejection Ratio PSRR.. V/V 9 9 db Maximum Output Voltage (See Figures, ) V OM V V OM.. V Maximum Output Current Source I OM ma Sink I OM ma Slew Rate (See Figure) SR V/ s Gain Bandwidth Product (See Figure ) f T.. MHz Supply Current (See Figure ) I ma Device Dissipation P D mw Test Circuits and Waveforms mv/div., ns/div. Top Trace: Input, Bottom Trace: Output FIGURE A. SMALL SIGNAL RESPONSE V/Div., s/div. Top Trace: Input, Bottom Trace: Output FIGURE B. LARGE SIGNAL RESPONSE V k CA SIMULATED LOAD pf k V k BW (db) =.MHz SR = 9V/ s. F FIGURE C. TEST CIRCUIT FIGURE. SPLITSUPPLY VOLTAGE FOLLOWER TEST CIRCUIT AND ASSOCIATED WAVEFORMS FN Rev. Page of

5 CA, CAA Test Circuits and Waveforms (Continued) V. F R S M CA.k NOISE VOLTAGE OUTPUT V. F BW (db) = khz TOTAL NOISE VOLTAGE (REFERRED TO INPUT) = V (TYP) k FIGURE. TEST CIRCUIT AMPLIFIER (db GAIN) USED FOR WIDEBAND NOISE MEASUREMENT Schematic Diagram (One Amplifier of Two) BIAS CIRCUIT INPUT STAGE SECOND STAGE OUTPUT STAGE DYNAMIC CURRENT SINK V Q Q D Q Q Q Q Q Q Q 9 D R 9 R K R Q R K Q R K D R K R K Q R K Q OUTPUT D D D D INVERTING INPUT NONINVERTING INPUT R Q 9 Q R C pf Q Q Q Q Q Q D R R R R V NOTES: 9. All resistance values are in ohms. FN Rev. Page of

6 CA, CAA Application Information Circuit Description The schematic diagram details one amplifier section of the CA. It consists of a differential amplifier stage using PMOS transistors (Q 9 and Q ) with gatetosource protection against static discharge damage provided by zener diodes D, D, and D. Constant current bias is applied to the differential amplifier from transistors Q and Q connected as a constant current source. This assures a high commonmode rejection ratio. The output of the differential amplifier is coupled to the base of gain stage transistor Q by means of an NPN current mirror that supplies the required differentialtosingleended conversion. The gain stage transistor Q has a high impedance active load (Q and Q ) to provide maximum openloop gain. The collector of Q directly drives the base of the compound emitterfollower output stage. Pulldown for the output stage is provided by two independent circuits: () constantcurrentconnected transistors Q and Q and () dynamic currentsink transistor Q and its associated circuitry. The level of pulldown current is constant at about ma for Q and varies from to ma for Q depending on the magnitude of the voltage between the output terminal and V. The dynamic current sink becomes active whenever the output terminal is more negative than V by about V. When this condition exists, transistors Q and Q are turned on causing Q to sink current from the output terminal to V. This current always flows when the output is in the linear region, either from the load resistor or from the emitter of Q if no load resistor is present. The purpose of this dynamic sink is to permit the output to go within.v (V CE (sat)) of V with a k load to ground. When the load is returned to V, it may be necessary to supplement the ma of current from Q in order to turn on the dynamic current sink (Q ). This may be accomplished by placing a resistor (Approx. k ) between the output and V. Output Circuit Considerations Figure shows output currentsinking capabilities of the CA at various supply voltages. Output voltage swing to the negative supply rail permits this device to operate both power transistors and thyristors directly without the need for levelshifting circuitry usually associated with the series of operational amplifiers. Figure shows some typical configurations. Note that a series resistor, RL, is used in both cases to limit the drive available to the driven device. Moreover, it is recommended that a series diode and shunt diode be used at the thyristor input to prevent large negative transient surges that can appear at the gate of thyristors, from damaging the integrated circuit. Input Circuit Considerations As indicated by the typical VICR, this device will accept inputs as low as.v below V. However, a series currentlimiting resistor is recommended to limit the maximum input terminal current to less than ma to prevent damage to the input protection circuitry. Moreover, some currentlimiting resistance should be provided between the inverting input and the output when the CA is used as a unitygain voltage follower. This resistance prevents the possibility of extremely large inputsignal transients from forcing a signal through the inputprotection network and directly driving the internal constantcurrent source which could result in positive feedback via the output terminal. A.9k resistor is sufficient. The typical input current is on the order of pa when the inputs are centered at nominal device dissipation. As the output supplies load current, device dissipation will increase, raising the chip temperature and resulting in increased input current. Figure shows typical inputterminal current versus ambient temperature for the CA. V AC CA CA V R S R L LOAD HV V NO LOAD LOAD MT R L MT FIGURE. METHODS OF UTILIZING THE V CE (SAT) SINKING CURRENT CAPABILITY OF THE CA SERIES FN Rev. Page of

7 CA, CAA INPUT CURRENT (pa) K K V S = V TEMPERATURE ( o C) FIGURE. INPUT CURRENT vs TEMPERATURE It is well known that MOSFET devices can exhibit slight changes in characteristics (for example, small changes in input offset voltage) due to the application of large differential input voltages that are sustained over long periods at elevated temperatures. Both applied voltage and temperature accelerate these changes. The process is reversible and offset voltage shifts of the opposite polarity reverse the offset. In typical linear applications, where the differential voltage is small and symmetrical, these incremental changes are of about the same magnitude as those encountered in an operational amplifier employing a bipolar transistor input stage. Typical Applications On/Off Touch Switch The on/off touch switch shown in Figure uses the CAE to sense small currents flowing between two contact points on a touch plate consisting of a PC board metallization grid. When the on plate is touched, current flows between the two halves of the grid causing a positive shift in the output voltage (Terminal ) of the CAE. These positive transitions are fed into the CA9, which is used as a latching circuit and zerocrossing TRIAC driver. When a positive pulse occurs at Terminal of the CAE, the TRIAC is turned on and held on by the CA9 and its associated positive feedback circuitry (k resistor and k /k voltage divider). When the positive pulse occurs at Terminal (CAE), the TRIAC is turned off and held off in a similar manner. Note that power for the CAE is supplied by the CA9 internal power supply. Dual Level Detector (Window Comparator) Figure illustrates a simple dual liquid level detector using the CAE as the sensing amplifier. This circuit operates on the principle that most liquids contain enough ions in solution to sustain a small amount of current flow between two electrodes submersed in the liquid. The current, induced by an.v potential applied between two halves of a PC board grid, is converted to a voltage level by the CAE in a circuit similar to that of the on/off touch switch shown in Figure. The changes in voltage for both the upper and lower level sensors are processed by the CA to activate an LED whenever the liquid level is above the upper sensor or below the lower sensor. ConstantVoltage/ConstantCurrent Power Supply The constantvoltage/constantcurrent power supply shown in Figure uses the CAE as a voltageerror and currentsensing amplifier. The CAE is ideal for this application because its input commonmode voltage range includes ground, allowing the supply to adjust from mv to V without requiring a negative supply voltage. Also, the ground reference capability of the CAE allows it to sense the voltage across the currentsensing resistor in the negative output lead of the power supply. The CA transistor array functions as a reference for both constantvoltage and constantcurrent limiting. The N power Darlington is used as the pass element and may be required to dissipate as much as W. Figure shows the transient response of the supply during a ma to A load transition. Precision Differential Amplifier Figure 9 shows the CAE in the classical precision differential amplifier circuit. The CAE is ideally suited for biomedical applications because of its extremely high input impedance. To insure patient safety, an extremely high electrode series resistance is required to limit any current that might result in patient discomfort in the event of a fault condition. In this case, M resistors have been used to limit the current to less than A without affecting the performance of the circuit. Figure shows a typical electrocardiogram waveform obtained with this circuit. The advantage of using the CAE in this circuit is that it can sense the small currents associated with skin conduction while allowing sufficiently high circuit impedance to provide protection against electrical shock. FN Rev. Page of

8 CA, CAA ON. F M.M V M V / CA V K N9 K 9 K CA9 K (W) R S (NOTE ) K MT G MT V/V AC Hz/Hz W V LIGHT TB (NOTE ) OFF. F M M / CA N9 V SOURCE F (V) COMMON M NOTE:. At V operation, TRIAC should be TD, R S = K, W. FIGURE. ON/OFF TOUCH SWITCH M V HIGH LEVEL.K K V K K (.V) / CA / CA K K K K V CA LED LOW LEVEL M LED ON WHEN LIQUID OUTSIDE OF LIMITS FIGURE. DUAL LEVEL DETECTER FN Rev. Page of

9 CA, CAA V I O V O N DARLINGTON K K / CAE K V I = V.K F V CAE TRANSISTOR ARRAY 9.K F V K K K K K K. F V / CAE N9 K F.K CHASSIS GROUND K W V O RANGE = mv TO V LOAD REGULATION: VOLTAGE <.% CURRENT <.% OUTPUT HUM AND NOISE V RMS (MHz BANDWIDTH) SINE REGULATION.%/V O I O RANGE = ma.a FIGURE. CONSTANTVOLTAGE/CONSTANTCURRENT POWER SUPPLY Top Trace: Output Voltage; mv/div., s/div. Bottom Trace: Collector Of Load Switching Transistor Load = ma to A; V/Div., s/div. FIGURE. TRANSIENT RESPONSE FN Rev. Page 9 of

10 CA, CAA V M / CA pf K % pf V GAIN CONTROL K K % %.K OUTPUT.9K K %.K % CA K TWO COND. SHIELDED CABLE M / CA pf V FREQUENCY RESPONSE (db) DC TO MHz SLEW RATE =.V/ s COMMON MODE REJ: db GAIN RANGE: db TO db V FIGURE 9. PRECISION DIFFERENTIAL AMPLIFIER Vertical:.mV/Div. Amplifier Gain = X Scope Sensitivity =.V/Div. Horizontal: >.s/div. (Uncal) FIGURE. TYPICAL ELECTROCARDIOGRAM WAVEFORM FN Rev. Page of

11 CA, CAA. F K V C9 PHOTO DIODE V.K. K K / CAE / CAE K K K V CA V OUTPUT C9 PHOTO DIODE V K k. F FIGURE. DIFFERENTIAL LIGHT DETECTOR Differential Light Detector In the circuit shown in Figure, the CAE converts the current from two photo diodes to voltage, and applies V of reverse bias to the diodes. The voltages from the CAE outputs are subtracted in the second stage (CA) so that only the difference is amplified. In this manner, the circuit can be used over a wide range of ambient light conditions without circuit component adjustment. Also, when used with a light source, the circuit will not be sensitive to changes in light level as the source ages. FN Rev. Page of

12 CA, CAA Typical Performance Curves OPEN LOOP VOLTAGE GAIN (db) R L = k T A = o C o C o C GAIN BANDWIDTH PRODUCT (MHz) R L = k C L = pf o C T A = o C o C SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) FIGURE. OPEN LOOP VOLTAGE GAIN vs SUPPLY VOLTAGE FIGURE. GAIN BANDWIDTH PRODUCT vs SUPPLY VOLT AGE SLEW RATE (V/ s) R L = k C L = pf T A = o C o C o C TOTAL SUPPLY CURRENT (ma) FOR BOTH AMPS 9 R L = T A = o C o C o C SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) FIGURE. SLEW RATE vs SUPPLY VOLTAGE FIGURE. QUIESCENT SUPPLY CURRENT vs SUPPLY VOLT AGE OUTPUT VOLTAGE (V PP ) K SUPPLY VOLTAGE: V S = V T A = o C K FREQUENCY (Hz) M M COMMON MODE REJECTION RATIO (db) SUPPLY VOLTAGE: V S = V T A = o C FREQUENCY (Hz) FIGURE. MAXIMUM OUTPUT VOLTAGE SWING vs FREQUENCY FIGURE. COMMON MODE REJECTION RATIO vs FREQUENCY FN Rev. Page of

13 CA, CAA Typical Performance Curves (Continued) EQUIVALENT INPUT NOISE VOLTAGE (nv/ Hz) SUPPLY VOLTAGE: V S = V T A = o C R S = FREQUENCY (Hz) POWER SUPPLY REJECTION RATIO (db) SUPPLY VOLTAGE: V S = V T A = o C POWER SUPPLY REJECTION RATIO = V IO / V S PSRR PSRR FREQUENCY (Hz) FIGURE. EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY FIGURE 9. POWER SUPPLY REJECTION RATIO vs FREQUENCY T A = o C. T A = o C OUTPUT SINK CURRENT (ma) PER AMP V S = V ONE AMPLIFIER OPERATING SUPPLY CURRENT (ma) PER AMP (DOUBLE FOR BOTH).. V S = V R L = OUTPUT VOLTAGE (V). OUTPUT VOLTAGE (V) FIGURE. OUTPUT SINK CURRENT vs OUTPUT VOLTAGE FIGURE. SUPPLY CURRENT vs OUTPUT VOLTAGE CROSSTALK (db) 9 T A = o C AMP A AMP B AMP B AMP A V S = V V O = V RMS. OUTPUT STAGE TRANSISTOR (Q, Q ) SATURATION VOLTAGE (mv) V = V T A = o C... V = V V V. FREQUENCY (Hz) LOAD (SINKING) CURRENT (ma) FIGURE. CROSSTALK vs FREQUENCY FIGURE. VOLTAGE ACROSS OUTPUT TRANSISTORS Q AND Q vs LOAD CURRENT FN Rev. Page of

14 CA, CAA Typical Performance Curves (Continued) INPUT AND OUTPUT VOLTAGE REFERENCED TO TERMINAL V(V)... R L = T A = o C OUTPUT VOLTAGE (V O ) COMMON MODE VOLTAGE (V ICR ) T A = o C T A = o C T A = o C T A = o C T A = o C INPUT AND OUTPUT VOLTAGE REFERENCED TO TERMINAL V (V) R L = OUTPUT VOLTAGE (V O ) COMMON MODE VOLTAGE (V ICR ) T A = o C TO o C T A = o C T A = o C T A = o C SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) FIGURE A. FIGURE B. FIGURE. OUTPUT VOLTAGE SWING CAPABILITY AND COMMON MODE INPUT VOLTAGE RANGE vs SUPPLY VOLTAGE INPUT VOLTAGE (V) SUPPLY VOLTAGE: V S = V T A = o C, R L = k, C L = pf mv mv mv mv FOLLOWER INVERTING k V CA V pf SIMULATED LOAD k. mv mv mv mv. TIME ( s) k. F FIGURE A. SETTLING TIME vs INPUT VOLTAGE FIGURE B. TEST CIRCUIT (FOLLOWER) k V k CA pf SIMULATED LOAD k.99k V.k D N9 SETTLING POINT D N9 FIGURE C. TEST CIRCUIT (INVERTING) FIGURE. INPUT VOLTAGE vs SETTLING TIME FN Rev. Page of

15 CA, CAA Typical Performance Curves (Continued) INPUT CURRENT (pa) K K V S = V OPEN LOOP VOLTAGE GAIN (db) V S = V T A = o C GAIN PHASE R L = k, C L = pf R L = k, C L = pf 9 OPEN LOOP PHASE (DEGREES) TEMPERATURE ( o C) FIGURE. INPUT CURRENT vs TEMPERATURE FREQUENCY (Hz) FIGURE. OPEN LOOP VOLTAGE GAIN AND PHASE vs FREQUENCY Copyright Intersil Americas LLC. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see Intersil products are manufactured, assembled and tested utilizing ISO9 quality systems as noted in the quality certifications found at Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see FN Rev. Page of