4 MHz, 7 nv/ Hz, Low Offset and Drift, High Precision Amplifier ADA EP

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1 Enhanced Product FEATURES Low offset voltage and low offset voltage drift Maximum offset voltage: 9 µv at TA = 2 C Maximum offset voltage drift:.2 µv/ C Moisture sensitivity level (MSL) rated Low input bias current: na maximum at TA = 2 C Low voltage noise density: 6.9 nv/ Hz typical at f = Hz CMRR, PSRR, and AV > 2 db minimum Low supply current: 4 µa per amplifier typical Wide gain bandwidth product: 3.9 MHz at VSY = ± V Dual-supply operation: ±2. V to ± V Unity gain stable No phase reversal ENHANCED PRODUCT FEATURES Supports defense and aerospace applications (AQEC standard) Extended industrial temperature range: C to +2 C Controlled manufacturing baseline assembly/test site fabrication site Product change notification Qualification data available upon request APPLICATIONS Process control front-end amplifiers Wireless base station control circuits Optical network control circuits Instrumentation Sensors and controls: thermocouples, RTDs, strain gages, and shunt current measurements Precision filters GENERAL DESCRIPTION The dual ADA477-2-EP amplifier features extremely low offset voltage and drift, and low input bias current, noise, and power consumption. Outputs are stable with capacitive loads of more than pf with no external compensation. Applications for this amplifier include sensor signal conditioning (such as thermocouples, RTDs, and strain gages), process control front-end amplifiers, and precision diode power measurement in optical and wireless transmission systems. The ADA477-2-EP is useful in line powered and portable instrumentation, precision filters, and voltage or current measurement and level setting. Unlike amplifiers by some competitors, theada477-2-ep has an MSL rating that is compliant with the most stringent of assembly processes, and is specified over the extended industrial temperature range from C to +2 C for the most demanding operating environments. Rev. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. 4 MHz, 7 nv/ Hz, Low Offset and Drift, High Precision Amplifier ADA477-2-EP PIN CONNECTION DIAGRAM OUT A IN A 2 +IN A 3 V 4 ADA477-2-EP TOP VIEW (Not to Scale) Figure. One Technology Way, P.O. Box 96, Norwood, MA , U.S.A. Tel: Analog Devices, Inc. All rights reserved. Technical Support V+ OUT B IN B +IN B The ADA477-2-EP is available in an 8-lead MSOP. Additional application and technical information can be found in the ADA477-2 data sheet. NUMBER OF AMPLIFIERS MSOP V OS (µv) Figure 2. Offset Voltage Distribution 3-3

2 ADA477-2-EP TABLE OF CONTENTS Features... Enhanced Product Features... Applications... Pin Connection Diagram... General Description... Revision History... 2 Specifications... 3 Electrical Characteristics, ± V... 3 Enhanced Product Electrical Characteristics, ± V...4 Absolute Maximum Ratings... Thermal Resistance... ESD Caution... Pin Configuration and Function Descriptions...6 Typical Performance Characteristics...7 Outline Dimensions... 6 Ordering Guide... 6 REVISION HISTORY 2/26 Revision : Initial Version Rev. Page 2 of 6

3 Enhanced Product ADA477-2-EP SPECIFICATIONS ELECTRICAL CHARACTERISTICS, ± V VSY = ±. V, VCM = V, T A = 2 C, unless otherwise noted. Table. Parameter Symbol Test Conditions/Comments Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage VOS 9 µv C < TA < +2 C 22 µv Offset Voltage Drift ΔVOS/ΔT C < TA < +2 C..2 µv/ C Input Bias Current IB.4 + na C < TA < +2 C. +. na Input Offset Current IOS na C < TA < +2 C. +. na Input Voltage Range V Common-Mode Rejection Ratio CMRR VCM = 3.8 V to +3 V 22 4 db VCM = 3.8 V to +3 V, C < TA < +8 C 2 db VCM = 3.8 V to +2.8 V, 8 C < TA < 2 C 2 db Large Signal Voltage Gain AV RL = 2 kω, VO = 3. V to +3. V 2 3 db C < TA < +2 C 2 db Input Capacitance CINCM Common mode pf Input Resistance RIN Common mode 7 GΩ OUTPUT CHARACTERISTICS Output Voltage High VOH IL = ma 3.8 V C < TA < +2 C 3.7 V Output Voltage Low VOL IL = ma 3.8 V C < TA < +2 C 3.7 V Output Current IOUT VDROPOUT <.6 V ± ma Short-Circuit Current ISC TA = 2 C 22 ma Closed-Loop Output Impedance ZOUT f = khz, AV = +. Ω POWER SUPPLY Power Supply Rejection Ratio PSRR VS = ±2. V to ±8 V db C < TA < +2 C 2 db Supply Current per Amplifier ISY VO = V 4 4 µa C < TA < +2 C 6 µa DYNAMIC PERFORMANCE Slew Rate SR RL = 2 kω.2 V/µs Settling Time to.% ts VIN = V step, RL = 2 kω, AV = 3 µs Gain Bandwidth Product GBP VIN = mv p-p, RL = 2 kω, AV = MHz Unity-Gain Crossover UGC VIN = mv p-p, RL = 2 kω, AV = MHz 3 db Closed-Loop Bandwidth 3 db AV = +, VIN = mv p-p, RL = 2 kω.9 MHz Phase Margin ΦM VIN = mv p-p, RL = 2 kω, AV = + Degrees Total Harmonic Distortion Plus Noise THD + N VIN = V rms, AV = +, RL = 2 kω,.4 % f = khz NOISE PERFORMANCE Voltage Noise en p-p. Hz to Hz.2 µv p-p Voltage Noise Density en f = Hz 3 nv/ Hz f = Hz 7 nv/ Hz f = Hz 6.9 nv/ Hz Current Noise Density in f = khz.2 pa/ Hz MULTIPLE AMPLIFIERS CHANNEL SEPARATION CS f = khz, RL = kω 2 db Rev. Page 3 of 6

4 ADA477-2-EP Enhanced Product ELECTRICAL CHARACTERISTICS, ± V VSY = ± V, VCM = V, T A = 2 C, unless otherwise noted. Table 2. Parameter Symbol Test Conditions/Comments Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage VOS 9 µv C < TA < +2 C 22 µv Offset Voltage Drift ΔVOS/ΔT C < TA < +2 C..2 µv/ C Input Bias Current IB.4 + na C < TA < +2 C. +. na Input Offset Current IOS na C < TA < +2 C. +. na Input Voltage Range V Common-Mode Rejection Ratio CMRR VCM = 3.8 V to +3 V 32 db C < TA < +2 C 3 db Large Signal Voltage Gain AV RL = 2 kω, VO = 3. V to +3. V 2 3 db C < TA < +2 C 2 db Input Capacitance CINDM Differential mode 3 pf CINCM Common mode pf Input Resistance RIN Common mode 7 GΩ OUTPUT CHARACTERISTICS Output Voltage High VOH IL = ma 3.8 V C < TA < +2 C 3.7 V Output Voltage Low VOL IL = ma 3.8 V C < TA < +2 C 3.7 V Output Current IOUT VDROPOUT <.2 V ± ma Short-Circuit Current ISC TA = 2 C 22 ma Closed-Loop Output Impedance ZOUT f = khz, AV = +. Ω POWER SUPPLY Power Supply Rejection Ratio PSRR VS = ±2. V to ±8 V db C < TA < +2 C 2 db Supply Current per Amplifier ISY VO = V 4 µa C < TA < +2 C 6 µa DYNAMIC PERFORMANCE Slew Rate SR RL = 2 kω.2 V/µs Settling Time to.% ts VIN = V p-p, RL = 2 kω, AV = 6 µs Settling Time to.% ts VIN = V p-p, RL = 2 kω, AV = µs Gain Bandwidth Product GBP VIN = mv p-p, RL = 2 kω, AV = MHz Unity-Gain Crossover UGC VIN = mv p-p, RL = 2 kω, AV = MHz 3 db Closed-Loop Bandwidth 3 db AV = +, VIN = mv p-p, RL = 2 kω. MHz Phase Margin ΦM VIN = mv p-p, RL = 2 kω, AV = + 8 Degrees Total Harmonic Distortion Plus Noise THD + N VIN = V rms, AV = +, RL = 2 kω,.4 % f = khz NOISE PERFORMANCE Voltage Noise en p-p. Hz to Hz.2 µv p-p Voltage Noise Density en f = Hz 3 nv/ Hz f = Hz 7 nv/ Hz f = Hz 6.9 nv/ Hz Current Noise Density in f = khz.2 pa/ Hz MULTIPLE AMPLIFIERS CHANNEL SEPARATION CS f = khz, RL = kω 2 db Rev. Page 4 of 6

5 Enhanced Product ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Rating Supply Voltage 36 V Input Voltage ±VSY Input Current ± ma Differential Input Voltage ±VSY Output Short-Circuit Duration to GND Indefinite Storage Temperature Range 6 C to + C Operating Temperature Range C to +2 C Junction Temperature Range 6 C to + C Maximum Reflow, Soldering ( sec) 26 C ESD Human Body Model (HBM) 2 6 kv Field Induced Charge Device Model (FICDM) 3.2 kv The input pins have clamp diodes to the power supply pins and to each other. Limit the input current to ma or less whenever input signals exceed the power supply rail by.3 V. 2 ESDA/JEDEC JS--2 applicable standard. 3 JESD22-C (ESD FICDM standard of JEDEC) applicable standard. ADA477-2-EP THERMAL RESISTANCE Thermal performance is directly linked to printed circuit board (PCB) design and operating environment. Careful attention to PCB thermal design is required. θja is the natural convection junction to ambient thermal resistance measured in a one cubic foot sealed enclosure. θjc is the junction to case thermal resistance. Table 4. Thermal Resistance Package Type θja θjc Unit RM C/W Thermal impedance simulated values are based on JEDEC JESD-2. ESD CAUTION Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. Page of 6

6 ADA477-2-EP Enhanced Product PIN CONFIGURATION AND FUNCTION DESCRIPTIONS OUT A IN A 2 +IN A 3 V 4 ADA477-2-EP TOP VIEW (Not to Scale) 8 V+ Figure 3. Pin Configuration 7 6 OUT B IN B +IN B 3-4 Table. Pin Function Descriptions Pin No. Mnemonic Description OUT A Output Channel A. 2 IN A Inverting Input Channel A. 3 +IN A Noninverting Input Channel A. 4 V Negative Supply Voltage. +IN B Noninverting Input Channel B. 6 IN B Inverting Input Channel B. 7 OUT B Output Channel B. 8 V+ Positive Supply Voltage. Rev. Page 6 of 6

7 Enhanced Product ADA477-2-EP TYPICAL PERFORMANCE CHARACTERISTICS 6 4 MSOP 6 4 MSOP NUMBER OF AMPLIFIERS NUMBER OF AMPLIFIERS V OS (µv) V OS (µv) 3-3 Figure 4. Offset Voltage (VOS) Distribution, VSY = ± V Figure 7. Offset Voltage (VOS) Distribution, VSY = ± V V OS (µv) V OS (µv) Figure. Offset Voltage (VOS) vs. Temperature, VSY = ± V Figure 8. Offset Voltage (VOS) vs. Temperature, VSY = ± V NUMBER OF AMPLIFIERS ΔV OS /ΔT (µv/ C), ±V C T A +2 C 3-3 V OS (µv) V SY (V) 3-34 Figure 6. Offset Voltage Drift (ΔVOS/ΔT) Distribution Figure 9. Offset Voltage (VOS) vs. Power Supply Voltage (VSY) Rev. Page 7 of 6

8 ADA477-2-EP Enhanced Product 8 6 V V CM +V 6 V OS (µv) AVERAGE AVERAGE = +3σ AVERAGE = 3σ V CM (V) Figure. Offset Voltage (VOS) vs. Common-Mode Voltage (VCM), VSY = ± V 3-2 I SY (µa) C 4 C C +2 C +8 C + C +2 C POWER SUPPLY VOLTAGE (V) Figure 3. Supply Current per Amplifier (ISY) vs. Power Supply Voltage (VSY) OUTPUT VOLTAGE SWING (V) V OH V OL OUTPUT VOLTAGE SWING (V) V OH V OL Figure. Output Voltage Swing vs. Temperature, VSY = ± V Figure 4. Output Voltage Swing vs. Temperature, VSY = ± V NUMBER OF AMPLIFIERS 2 2 NUMBER OF AMPLIFIERS MORE INPUT BIAS CURRENT (na) Figure 2. Input Bias Current Distribution, VSY = ± V MORE INPUT BIAS CURRENT (na) Figure. Input Bias Current Distribution, VSY = ± V 3-6 Rev. Page 8 of 6

9 Enhanced Product ADA477-2-EP I B (na).3.4 I B +I B I B (na).3.4 I B +I B Figure 6. Input Bias Current (IB) vs. Temperature, VSY = ± V Figure 9. Input Bias Current (IB) vs. Temperature, VSY = ± V OUTPUT DROPOUT VOLTAGE (V OL V ) C 4 C C +2 C +8 C + C +2 C OUTPUT DROPOUT VOLTAGE (V OL V ) C 4 C C +2 C +8 C + C +2 C.... SINK CURRENT (ma) Figure 7. Output Dropout Voltage vs. Sink Current, VSY = ± V SINK CURRENT (ma) Figure 2. Output Dropout Voltage vs. Sink Current, VSY = ± V 3-22 OUTPUT DROPOUT VOLTAGE ( V OH + V+) C 4 C C +2 C +8 C + C +2 C OUTPUT DROPOUT VOLTAGE ( V OH + V+) C 4 C C +2 C +8 C + C +2 C.... SOURCE CURRENT (ma) Figure 8. Output Dropout Voltage vs. Source Current, VSY = ± V SOURCECURRENT (ma) Figure 2. Output Dropout Voltage vs. Source Current, VSY = ± V Rev. Page 9 of 6

10 ADA477-2-EP Enhanced Product GAIN = pf GAIN = pf GAIN = 2pF PHASE = pf PHASE = pf PHASE = 2pF GAIN = pf GAIN = pf GAIN = 2pF PHASE = pf PHASE = pf PHASE = 2pF GAIN (db) A V = PHASE MARGIN (Degrees) GAIN (db) A V = PHASE MARGIN (Degrees) k k M M M Figure 22. Open-Loop Gain and Phase Margin vs. Frequency, VSY = ± V k k M M M Figure 2. Open-Loop Gain and Phase Margin vs. Frequency, VSY = ± V V SY = ±2.V TO ±8V PSRR (db) CMRR (db) Figure 23. PSRR vs. Temperature, VSY = ±2. V to ±8 V Figure 26. CMRR vs. Temperature, VSY = ± V PSRR (db) 6 4 PSRR CMRR (db) PSRR k k k M M 3-34 k k k M M 3-29 Figure 24. PSRR vs. Frequency, VSY = ± V Figure 27. CMRR vs. Frequency, VSY = ± V and VSY = ± V Rev. Page of 6

11 Enhanced Product ADA477-2-EP PSRR (db) 6 4 PSRR+ PSRR CMRR (db) k k k M M Figure 28. PSRR vs. Frequency, VSY = ± V Figure 3. CMRR vs. Temperature, VSY = ± V k k A V = + A V = + A V = + A V = + Z OUT (Ω) A V = + Z OUT (Ω) A V = k k k M M k k k M M 3-39 Figure 29. Output Impedance (ZOUT) vs. Frequency, VSY = ± V Figure 32. Output Impedance (ZOUT) vs. Frequency, VSY = ± V 4 G = 4 G = CLOSED-LOOP GAIN (db) G = G = CLOSED-LOOP GAIN (db) G = G = 4 4 k k k M M M 3-28 k k k M M M 3-3 Figure 3. Closed-Loop Gain vs. Frequency, VSY = ± V Figure 33. Closed-Loop Gain vs. Frequency, VSY = ± V Rev. Page of 6

12 ADA477-2-EP Enhanced Product OUTPUT VOLTAGE (.2V/DIV) V V IN = V p-p A V = + C L = 3pF OUTPUT VOLTAGE (V/DIV) V V IN = 4V p-p A V = + C L = 3pF TIME (µs/div) 3-4 TIME (µs/div) 3-43 Figure 34. Large Signal Transient Response, VSY = ± V Figure 37. Large Signal Transient Response, VSY = ± V V IN = mv p-p A V = + C L = pf.... V IN = mv p-p A V = + C L = pf TIME (ms) TIME (ms) Figure 3. Small Signal Transient Response, VSY = ± V Figure 38. Small Signal Transient Response, VSY = ± V INPUT VOLTAGE (V).. INPUT OUTPUT TIME (µs/div) A V = V IN = 2mV R L = kω Figure 36. Positive Overload Recovery, VSY = ± V INPUT VOLTAGE (V) V IN = 2mV p-p A V = R L = kω TIME (µs) Figure 39. Positive Overload Recovery, VSY = ± V Rev. Page 2 of 6

13 Enhanced Product ADA477-2-EP INPUT VOLTAGE (V).. INPUT INPUT VOLTAGE (V).. INPUT OUTPUT OUTPUT TIME (µs/div) A V = V IN = 2mV R L = kω TIME (µs/div) A V = V IN = 2mV R L = kω 3- Figure 4. Negative Overload Recovery, VSY = ± V Figure 43. Negative Overload Recovery, VSY = ± V OVERSHOOT (%) 2 2 OS+ OS OVERSHOOT (%) 2 2 OS+ OS p p p n n LOAD CAPACITANCE (F) Figure 4. Small Signal Overshoot vs. Load Capacitance, VSY = ± V 3-2 p p p n n LOAD CAPACITANCE (F) Figure 44. Small Signal Overshoot vs. Load Capacitance, VSY = ± V INPUT VOLTAGE (V) V IN = V p-p INPUT VOLTAGE (V) 2 2 V IN = V p-p TIME (µs/div) Figure 42. Positive.% Settling Time, VSY = ± V TIME (µs/div) Figure 4. Positive.% Settling Time, VSY = ± V Rev. Page 3 of 6

14 ADA477-2-EP Enhanced Product...2 INPUT VOLTAGE (V) V IN = V p-p INPUT VOLTAGE (V) 2 V IN = V p-p TIME (µs/div) Figure 46. Negative.% Settling Time, VSY = ± V TIME (µs/div) Figure 49. Negative.% Settling Time, VSY = ± V. 3-2 VOLTAGE NOISE DENSITY (nv/ Hz) k A V = + VOLTAGE NOISE CORNER (nv/ Hz) k k k M M Figure 47. Voltage Noise Density vs. Frequency, VSY = ± V and VSY = ± V Figure. Voltage Noise Corner vs. Frequency, VSY = ± V and VSY = ± V 3-3. THD + N (%). BANDWIDTH = 8kHz BANDWIDTH = khz THD + N (%). BANDWIDTH = 8kHz BANDWIDTH = khz.... k k k 3-. k k k 3-8 Figure 48. THD + N vs. Frequency, VSY = ± V Figure. THD + N vs. Frequency, VSY = ± V Rev. Page 4 of 6

15 Enhanced Product ADA477-2-EP V CM = V V CM = V INPUT VOLTAGE (nv/div) INPUT VOLTAGE (nv/div) TIME (s/div) Figure 2.. Hz to Hz Noise, VSY = ± V 3-8 TIME (s/div) Figure.. Hz to Hz Noise, VSY = ± V V V CM +V T A = 2 C 2 V CC kω V CC kω I B (pa) V CM (V) MEAN +3σ MEAN MEAN 3σ Figure 3. Input Bias Current (IB) vs. Common-Mode Voltage (VCM) 3-29 CHANNEL SEPARATION (db) V IN + V EE CH A 2kΩ 2kΩ 2 4 V IN = V p-p A V = + R L = kω 6 k k k + V EE CH B, CH C, CH D Figure 6. Channel Separation, VSY = ± V M CURRENT NOISE DENSITY (pa/ Hz) CURRENT NOISE DENSITY (pa/ Hz). k k k Figure 4. Current Noise Density vs. Frequency, VSY = ± V k k k Figure 7. Current Noise Density vs. Frequency, VSY = ± V Rev. Page of 6

16 ADA477-2-EP Enhanced Product OUTLINE DIMENSIONS PIN IDENTIFIER.6 BSC COPLANARITY MAX 6 MAX.23.9 COMPLIANT TO JEDEC STANDARDS MO-87-AA Figure 8. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters b ORDERING GUIDE Model Temperature Range Package Description Package Option Branding ADA477-2TRMZ-EP C to +2 C 8-Lead Mini Small Outline Package [MSOP] RM-8 Y6Q ADA477-2TRMZ-EPR7 C to +2 C 8-Lead Mini Small Outline Package [MSOP] RM-8 Y6Q Z = RoHS Compliant Part. 26 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D3--2/6() Rev. Page 6 of 6