X ray and blue print: tools for mosfet analog circuit design addressing short- channel effects

Transcription

1 R.L. Oliveira Pinto, F. Maloberti: "X ray and blue print: tools or moset analog circuit design addressing short-channel eects"; Proc. o the 004 nternational Symposium on Circuits and Systems, SCAS 004, ol. 5, 3-6 May 004, pp xx EEE. Personal use o this material is permitted. However, permission to reprint/republish this material or advertising or promotional purposes or or creating new collective works or resale or redistribution to servers or lists, or to reuse any copyrighted component o this work in other works must be obtained rom the EEE.

2 X RAY AN BLUE PRNT: TOOLS FOR MOSFET ANALOG CRCUT ESGN ARESSNG SHORT-CHANNEL EFFECTS R. L. Oliveira Pinto, F. Maloberti Texas A & M University, USA The University o Texas at allas, USA rodrigo@ee.tamu.edu ABSTRACT An automatic engine built in the Java language designs transistors in ew and easy steps. The results come rom a combination o parameter extraction and simple analytical models that address the short-channel eects by reerring them to the Early voltage. The outcome is precise output conductance, thermal noise coeicient and thermal noise rom a riendly graphical user interace. esign and simulations o common-source ampliiers show the eiciency o the automation.. NTROUCTON Automation o analog circuits has been a hot topic or the past ew years [, ], yet the analog designers still rely basically on circuit simulators and layout editors to accomplish their goals. There are solutions or complete sizing o MOSFET circuits, however, requiring manual modeling or urther automation [3]. Circuit level design tools hide their methods rom the analog designers who preer to use their own design procedures []. Here we propose automation at transistor level by providing access to precise values o the main parameters o an ampliier to be used at the circuit level design. Two design tools implemented in Java aid the designer to size MOSFET s or analog circuits. The irst tool, which is called X Ray, extracts ampliier parameters mainly based on the inversion level [4, 5, 6, 7]. The second tool, which is called Blue Print, combines the data points rom X Ray and analytical expressions [8] to size the transistors. This paper describes the tools and the basis o the automation [8] as well as presents designs and simulation results to validate the method.. X RAY X Ray is a program that extracts the Early voltage A, thermal noise coeicient γ, and thermal noise i d based on a given range o inversion level i, drain-to-source-voltage S and channel length L, or a speciic technology, temperature T and channel R. L. Oliveira Pinto is sponsored by CAPES, research agency o the Brazilian Ministries o Science and Technology and Education. type (N or P). The correct values o Early voltage are undamental to design C gain. Also, good prediction o the thermal noise is important to properly reduce its value in any ampliier design. The main parameter extracted is the Early voltage or each point o each drain current because it relects all the short channel eects modeled in the mobility and channel length [8], as equations () to (3) demonstrate. Equation () is the drain current or hand design purposes. t is unction o the gate-tosource voltage GS and drain-to-source voltage S working with a constant Early voltage. Ssat is S in the saturation point. µ is the mobility, C ox is the oxide capacitance per unit area, and T is the threshold voltage. The geometry is given by the channel width and length L. Equation () is a simpliied model o or simulation purposes where µ and L are replaced by µ EFF and L EFF, respectively eective mobility and length, both containing short-channel eects. From () and () it is straightorward to ind (3) and see that it is possible to reer the short-channel eects o µ EFF and L EFF to A. µ C OX L ( ) GS C T S Ssat A A EFF OX µ ( ) GS T LEFF () µ e µ L L e S Ssat A A The designer can work directly with points o A during the hand design instead o complicated models o µeff and LEFF, however, the problem now is how to determine the space o extraction o A that is applicable to as many designs as possible. The Early voltage depends on i, S, L and T [9]. The inversion level and drain-to-source voltage have practical physical limits that naturally establish a space o extraction: i between and 000, which means rom weak to strong inversion, and S between 0 and the maximum voltage supply. e can normalize the channel length by the minimum length L MN and deine a maximum normalized length or a particular design, or instance L/LMN equals to 9. The temperature is kept ixed. Once the points o A are extracted they can be stored and used or several designs because i is (3) ()

3 independent o geometry [4], and A is not a unction o the channel width [9]. For design purposes, all the transistors that have the same i can share the same set o curves. The geometry is adjusted according to the drain current needed by using equations (4) and (5) [4], where S is the normalization current, n is the slope actor, and φ t is the thermal voltage. i S S µ nc ox (4) L Figure presents the X Ray user interace showing its input and output areas. The input area accepts steps o normalized channel length, as well as steps o inversion level. The minimum length or normalization has its respective ield. S receives a maximum range and resolution. The button Load Model opens a ile chooser dialog box to assign a Spice transistor model to the system. An input ield receives the temperature, and a radio button selects the channel type. Because i is independent o geometry, the system has a single transistor width as input. (5) Figure. X Ray Graphical User nterace An internal simulation module generates a Spice ile and runs a simulator whose result is a set o drain currents or each channel length and inversion level or a given range o drain-tosource voltage. The set o A s extracted will relect the short channel eects o the moset model and simulator used. The current implementation o X Ray runs Spectre, however, it could be any other Spice-like simulator in any platorm that has the Java virtual machine installed. The output area presents the results in sets o curves where each set is or one i. Figure shows A0 that is the Early voltage or i where A is in the y axis and S is in the x axis. Each curve is or one step o L/L MN. The thermal noise coeicient and thermal noise presented by X Ray ollow expressions (6) and (7) [8], where q is the electronic charge and is the bandwidth. The short-channel eects or γ and i d are taken into account by assigning A or each i and S in (6) and (7). Likewise γ and i d, the intrinsic cut-o requency T that accounts short-channel eects also comes rom a mixture o an analytical model, equation (8) [8], and data points o A. γ sat 3 + i + i i id γ 8q S ( + i ) ( + i ) µ T πl S Ssat S Ssat A A A A For the hand design, the user can pick A, γ and T rom the graphics or a given i, S and L [8]. Graphics or id are also available, however, requiring adjustments according to the width needed. Another option is to size the transistor by means o Blue Print, as shown in the next section. 3. BLUE PRNT Blue Print is an experimental calculator attached to X Ray that presents all the trade-os involving a single transistor design by imitating the hand calculation process. Table shows the expressions implemented by Blue Print, where some are analytical equations [4] while others are data points provided by X Ray. n both cases the variables involved are the ones required to design MOSFET ampliiers: the gate transconductance g m, and the output resistance r O, besides the ones already mentioned or noise, geometry, current, intrinsic cut-o requency, and Early voltage. The analytical models used here work continuously rom weak to strong inversion, hence, easy to be implemented or calculation purposes once there is no need o any interpolation unction. The Blue Print graphical user interace shows only the design variables and hides the constants µ, n, C ox, φ t. Figure shows the interace, where each row represents a variable and each column one o the relations rom Table. The numbers given by Blue Print will be tailored or the simulator, technology and transistor model used by X Ray, even though the design equations [4] are dierent rom the model used by the simulator. This approach is based on the assumption that the long channel transistor models should have similar behavior, both the ones that use any interpolation unction to ill the gap between weak and strong inversion and those that work continuously, being the Early voltage the only parameter needed to be extracted in order to address shortchannel eects or each particular model. To design a transistor the user enters the desired value in the respective ield and pushes one o the buttons in that row. only one variable is let in that column, this variable is immediately determined. one single variable is let in any other column as well, this one is also automatically calculated. This process continues until either more than one variable is let or all parameters are determined. One major advantage in the Blue Print is the act that the numbers can be entered in any sequence, thereore providing to the designer reedom to choose what are the main parameters or that particular design, i.e., (7) (6) (8)

4 there is no preset design procedure. For instance, in the relation between Ssat and i, the designer can either enter irst Ssat and then i or vice versa, the irst one entered determines the other one. The designs are stored in the drat area under the calculator. Once the design is inished the user can reset the calculator and start another design. The system supports several instances o both X Ray and Blue Print opened simultaneously, hence, allowing on the same screen the design o many transistors o N and P channels. This is a desirable eature while designing several transistors. Table. Equations implemented in the Blue Print ndex Expressions Relations n g m + + i gm,, i i µ nc ox L, i,, L 3 (data points) T (i, S, L) i, L, T, S 4 Ssat ( + i ) + 4 i, Ssat 5 (data points) A(i, S, L) i, L, S, A 6 A r O, A, r O 7 (data points) γ (i, S, L) i, L, S, γ 8 (data points) i d (i, S, L, ) i,, L, S, i d n short, Blue Print automatically perorms the hand calculation design that would require manipulation o several equations and manual reading o graphics. 4. ESGNS AN SMULATON RESULTS This section compares results rom X Ray / Blue Print with simulations using BSM 3v3 o a common-source ampliier as the one seen in Figure 3. The technology used was TSMC5, L MN0.3µm, run TQ (MM_NON-EP). e extracted the parameters or both N and P channels using i equals, 30, 00, 300 and 000, L/L MN equals,.,.4,.6,..8,, 3, 4, 5, 6, 7, 8 and 9, S rom 0 to 3 with 0.3 step, width equals µm, the minimum technology length and temperature o 300K. BAS SS M M + O - Figure 3. Common-Source (CS) Ampliier Table shows a design o a common source ampliier to compare the values given by Blue Print and the ones ound in the simulations regarding the C gain A vo o the ampliier. The Blue Print column presents the steps used or the design, actually the ones input in the calculator, and the respective results. The irst transistor designed was the NMOS, with i, and L/L MN arbitrarily chosen. The S, required in this method [8], is hal o the voltage supply, to SS, o.5. Among several other parameters, we primarily ocus on g m, and A once they are directly related to the gain, as equations (9) and (0) [8] show, and because it is needed to design the PMOS. and A are the main parameters or the P transistor, whose design also requires S [8]. gm AO g + g O O (9) A O φ n t + i + + A A (0) Figure. Blue Print Graphical User nterace To access the data points the tool perorms a simple linear interpolation between the points in the available range o values. a certain value is out o range an error message is given. The precision, o course, will depend on the resolution o the points. This is why it is called Blue Print. One can notice that depending on the sequence we can ind more than one result or a certain parameter. t is also possible a dierent arrangement or the equations. For multiple results Blue Print takes the irst one ound. A better equation arrangement is a subject or another kind o study. The diiculties and constraints o a transistor level design, though, are clearly seen. The knowledge gained with this tool can help to create engines or circuit level design in the uture. The design and simulations values agree airly well. The Early voltages given by the simulations are very close to the ones provided by Blue Print, proving that the inormation o A o a µm width transistor can be used or any width. The theoretical and simulated C gains are, respectively, 5 and 37. Overall, the numbers quickly provided by Blue Print matched the ones ound in the simulations. Access to the short-channel eects o the thermal noise that are usually evaluated only during the simulations is desirable during the hand calculation design [8]. Table 3 compares the design and simulation o the CS ampliier or several voltage supplies. e chose this criterion due to the inluence o S on A, and the correlation o A with the thermal noise, as seen in equations (6) and (7) [8]. The parameters needed to calculate the noise are those given by Equation (), which takes into

5 account the short-channel eects based on data points o i d, i d, and A, this last one to model those eects in g m [8]. Equation () also keeps the Ssat, which is normally ignored while calculating the inluence o A, because it presented better results or the noise. The design or the NMOS was based on i equals 300, o.55µm, minimum length, and the steps o S presented in Table 3. The g m or the NMOS is.5ma/, whose i d and A are the ones seen in Table 3. The PMOS design also used i o 300, equals 7.76µA, this one rom the NMOS design, minimum length, and the same steps o S. The inal width or the PMOS was 35µm and the values or i d are also ound in Table 3. Table. CS Ampliier esign and Simulations or A vo Blue Print Simulations N P N P Steps: : i 30 : 50µm 3: L0.4µm 4: S0.75 Results: g m.0ma/ µa A-3.64 Steps: 5: i 30 6: µa 7: L0.4µm 8: S0.75 Results: 36µm A-0.7 i µm L0.45µm S0.5 g m.8ma/ 7.µA A-3.95 S () Table 3. Noise: Blue Print X Simulations. i d A i µA L0.45µm S µm A-3.44 Blue Print Eq. () Simul. i d A A () N,in n N,in e E e E e E e E e E e E Figure 4. Noise or several values o S. N, in ( id + id ) g m S Ssat A A () Calculations and simulations, again, are very close. Figure 4 shows the graphics o the noise or each S presented in Table n S 3. The thermal noise using the long channel model would be.865n/. The design model or the thermal noise with the short-channel eects is more precise than the long channel one. 5. CONCLUSONS This paper has presented an alternative approach to address short-channel eects or analog design by mixing analytical expression with data points. Short-channel eects were reerred to the Early voltage. An engine or extraction o the Early voltage based in a well deined design space and calculation o thermal noise coeicient and thermal noise, as well as a tool or transistor level design were successully implemented and tested. Theoretical and simulated results were compared and showed very good agreement, thereore, conirming the eiciency o the design method. The results presented here, or transistor level design, can be used as basis to build circuit level design tools. 6. REFERENCES [] B. Martin, Automation Comes to Analog, EEE Spectrum, pp , June 00. [] G. G. E. Gielen, R. A. Rutenbar, Computer-Aided esign o Analog and Mixed-Signal ntegrated Circuits, Proceedings o the EEE, vol. 88, no., ecember 000. [3] Hershenson, M.delM.; Boyd, S.P.; Lee, T.H, Optimal design o a CMOS op-amp via geometric programming, Computer-Aided esign o ntegrated Circuits and Systems, EEE Trans. on, olume: 0 ssue:, Jan 00. [4] A..A. Cunha.; Schneider, M.C.; Galup-Montoro, A MOS transistor model or analog circuit design, EEE Journal o Solid-state Circuits, vol. 33, No. 0, October 998. [5] C. C. enz, F. Krummenacher and E. A. ittoz, An analytical MOS transitor model valid in all regions o operation and dedicated to low-voltage and low-current applications, Analog ntegrated Circuits and Signal Processing, vol. 8, pp 83-4, July 995. [6] A..A. Cunha.; Schneider, M.C.; Galup-Montoro, An explicit physical model or the long-channel MOS transistor including small-signal parameters, Solid-State Electronics, vol. 38, No., November 995. [7] F. Silveira,. Flandre, and P. G. A. Jespers, A g m/ Based Methodology or the esign o CMOS Analog Circuits and ts Application to the Synthesis o a Siliconon-insulator Micropower OTA, EEE Journal o Solid- State Circuits, vol. 3, no 9 September 996. [8] R. L. Oliveira Pinto, F. Maloberti, Novel design Methodology or Short-Channel Moset Analog Circuits, SOC 003, Calgary-Alberta, Canada, July 003. [9] Schneider, M.C.; Galup-Montero, C.; Filho, O.C.G.; Cunha, A..A. A single-piece charge-based model or the output conductance o MOS transistors Electronics, Circuits and Systems, 998 EEE nternational Conerence on, olume:, 998. [0] Shaeer,. K, Lee, T. H, A.5.5 G CMOS Low Noise Ampliier, EEE Journal o Solid State Circuits, ol. 3, No. 5, pp , May 997.