COMPENSATION OF CURRENT TRANSFORMERS BY MEANS OF FIELD PROGRAMMABLE GATE ARRAY

Transcription

1 METROLOGY AD MEASUREMET SYSTEMS Index , ISS COMPESATIO OF CURRET TRASFORMERS BY MEAS OF FIELD PROGRAMMABLE GATE ARRAY Daniele Gallo, Carmine Landi, Mario Luiso Seconda Università degli studi di apoli, Dipartimento di Ingegneria dell Inormazione, Via Roma 9, 803 Aversa (CE), Italy ( mario.luiso@ unina.it, , daniele.gallo@unina.it, carmine.landi@unina.it,) Abstract With the diusion o non-linear and unbalanced loads, which oten cause unacceptable quality level o energy, energy quality monitoring represents an increasing need. Analyzing conducted disturbances requires measuring instrumentation, and thus voltage and current transducers, with large bandwidth. Voltage and current transormers (CT) are the most oten installed transducers in electrical power system and typically they are constructed to operate at industrial requency 50/60 Hz, but it is clear that their substitution would require an unsustainable cost. Thereore in this paper a digital technique or the compensation o CT, based on ield programmable gate array, is presented: it implements a digital ilter with a requency response equal to the inverse one o the CT. The compensated CT continues to be an analog device since the FPGA board is opportunely equipped with analog-to-digital and digital- to-analog converters. Keywords: current transormer, compensation, digital ilter, optimization, power quality. 009 Polish Academy o Sciences. All rights reserved. Introduction The growing number o non-linear and unbalanced loads in the electrical systems increases the scientiic interest in harmonic and inter-harmonic analysis. evertheless, the standards related to the type tests or accuracy o measuring instrument transormers [], [] which now are the only ones to account when calibrating voltage or current transducers, establish the way to test the accuracy only at the rated requency and amplitude, and they do not say anything about how to ind the requency response and the linearity o such instruments. This, on the other hand, is in contrast with other standards related to power quality phenomena [3], [4], in which requirements or harmonic measurement are established: a power quality instrument must have the capability to measure spectral components o the grid voltage at least up to the 40th harmonic requency. O course, since the harmonic components have the amplitude and requency dierent rom the undamental one, the accuracy o power quality instruments, and thus o instrument transormers, has to be determined also in these situations. Voltage and current transormers (VT and CT) are the most oten installed transducers in electrical power systems and typically they are constructed to operate at industrial requency, 50/60 Hz. It is clear that their substitution would require an unsustainable cost, even i justiied by the growing cost lined to bad power quality irstly coming, in turn, rom the lac o energy quality monitoring. Thereore, the use o low cost devices, with which increasing measuring transormers accuracies, would be o great interest. In scientiic literature several papers ace the issue o compensating CT and VT [5]-[7]. They all present techniques or compensating measuring transormers only at industrial requency. So, in this paper a technique or compensating current transormers in a wide requency range, 0 Hz to 0 Hz, is presented. It is based on the identiication o a digital ilter implemented on an FPGA

2 board, provided in analog-to-digital (ADC) and digital-to-analog (DAC) converters. In section a compensation method is shown; since it utilizes data rom calibration o the CT, section 3 ocuses on the description o an automated test system or the characterization o the CT. Then, section 4 presents experimental results related to optimization and compensation.. Compensation method Far rom power transormers, current transormers can be considered as linear devices basing on some considerations. In act, nonlinearity is almost completely due to one phenomenon, which is the magnetic core saturation [8]: it is directly proportional to the primary r.m.s. current and it is minimized by large turns ratio, small burden, small remanence lux, large core area and small secondary resistance. In general, current transormers are constructed in order to meet the last three requirements; regarding the burden, it has to be chosen according to the maximum power transerable rom primary to secondary in order to maintain accuracy class. Finally, or what concerns primary r.m.s current., according to [] the accuracy class has to be maintained in the range o 5 to 0 % o the primary current: o course its r.m.s. value depends on the amplitudes o undamental and other requency components. Anyway, since the contribution o a requency component to the core magnetic lux is inversely proportional to its requency [8] and, in most cases, their amplitudes are much smaller than the undamental one, they can be surely neglected. Thereore, under the assumption that the primary current does not exceed 0 % o its rated value, a CT can be considered a linear device, as it is considered in most scientiic papers proposing compensation techniques [5]-[7]. All the cited techniques, even i they reach considerable perormance improvement actors in both ratio and phase errors, they do not consider the possibility o improving CT perormance in a wider requency range. As a matter o act, or a linear system the requency response can be deined and thus another linear system with a requency response equal to its inverse can be ound: it is called its inverse linear system. Such a statement is the basis o the proposed compensation technique: once the CT has been metrologically characterized and its requency response ound, cascading a device with a requency response equal to CT s inverse one, the perormance will be improved in a wide requency range. 3. Compensation o requency response A CT is a current transducer; in scientiic literature, dierent proposals or compensating the requency response o transducers [9]-[] and o data acquisition systems []-[4] can be ound. Some o them perorm the compensation in the requency domain, obtaining good results but with high computational eort that is not compatible with the proposed application. Some others perorm the compensation in the time domain by a digital ilter. Let us consider a transducer with a low linearity error. Under this assumption, it can be considered as a linear system and its requency response is given by () Y ( ) R ( ) X ( ) jϕ ( ) e, () where X is and Y are the spectra o the signals beore and ater transduction, respectively, and is the considered requency. R() and ϕ() are the systematic modiications introduced by the transducer in amplitude and in phase, respectively, on the spectral component at requency

3 o the input signal. These systematic eects can be compensated by introducing a ilter whose requency response, H d (), is exactly given by H jϕ ( ) X ( ) ( ) ( ) R e Y ( ) d, () or any requency in the range o interest. The H d unction can be obtained perorming a proper transducer characterization. The analog implementation o transer unction () is obviously not easily practicable and it can lead to acceptable results only i applied to a very limited requency range. Better results can be obtained with digital iltering. Two main implementations or digital ilters exist: FIR and IIR. FIR ilters are relatively simple to compute, inherently stable but their main drawbac with respect to IIR ilters is that they may need a large number o coeicients to approximate the desired response. This maes them ineective or the aim o this paper. An IIR ilter is generally modeled by a transer unction in the z domain that can be written as H b + b z + a z b z a z 0 m () z n n m, (3) With this approach, ilter design requires the choice o best values or parameters a,, a n and b 0, b,, b m so that its transer unction approximates the desired requency characteristic. In addition, m and n, the order o the numerator and the denominator, respectively, are design parameters that should be chosen too. The problem is that unlie the FIR ilters, there is no standard design approach or obtaining optimal approximations o an arbitrary requency response with IIR ilters. The choice o the best coeicients or optimal approximation can be ormulated, rom the mathematical point o view, as an inverse problem [5] and solved by adopting optimization techniques [6]. An objective unction, describing the dierence between desired and obtained requency responses has to be deined and minimized by an optimization algorithm. The choice o the chosen objective unction at the same time aects the optimality o the solution and the computational complexity o the research. Minimization, perormed with deterministic algorithms, is very sensitive to the initial point[5], [6][6],and the obtained ilters, in some cases, have an unacceptable complexity to perorm on-line compensation. In other cases, the compensation does not reduce the uncertainty below 0. %. More eective methods, such as hybrid optimization techniques [7]-[9] are never applied to such a tas. Thereore, in the ollowing, such a procedure is described and applied or designing a digital ilter that perorms compensation o the requency response o a CT. 4. Identiication procedure The optimization problem studied here has a nonlinear objective unction with n+m+ independent variables. Thereore, the research space should be R n+m+, where R is the whole set o real numbers. evertheless, this interval can be reduced by adopting, as commonly done in a wide class o optimization problems, some constraints on solution characteristics. The constraints divide the search space into easible and ineasible regions with remarable reduction o the computational burden. Constraints can be o two types: equality and inequality constraints; bounds on variable values.

4 A solution that does not satisy all the constraints and all the bounds is called ineasible solution, and it is ignored. In the considered problem, a constraint comes rom the requirement o ilter stability: the poles o the digital ilter must have a modulus less than one, so a nonlinear inequality constraint is imposed. Moreover, to obtain solutions that can be easily implemented by adopting ixed-point arithmetic, bounds on variable values have been set to - and, so obtaining normalized coeicients. These conditions restrict the research space to the interval (-,) n+m+, with a remarable reduction in computational burden without loss o generality. An objective unction or the considered problem has to tae into account the improvements that are obtained with the introduction o the ilter, in terms o reduction o ratio errors and phase displacements. To evaluate these reductions in the whole input requency range, an extension o deinitions reported in international standards [] with reerence to the undamental requency have been adopted [],[0]. In act, the obtained reductions can be evaluated at dierent requency in the range o interest and then, these values can be combined to express the global reduction. The ratio error and phase displacement can be calculated beore ilter introduction with (4) and (5), respectively, or each o the requencies,. Then, the same indexes can be calculated ater ilter introduction with (6) and (7), where H() is the requency response o the implemented ilter. The objective unction proposed in order to combine all these values is reported in (8). It is composed o two terms that are, respectively, the mean quadratic values o relative improvements o ratio error and phase displacement. With an ideal ilter compensation, H() is equal to H d () in (), and so R C and ϕ C are zero and thus F reaches its minimum value that is zero too. In practice, the smaller the objective unction value the better is the compensation done by the ilter. The objective unction should be minimized by searching or best ilter coeicients that produce a transer unction, minimizing, in turns, the ratio errors and phase displacements. ( ) ( ) R 00 R, (4) ( ) ϕ ( ) ϕ ( ) ( ) H R ( ) C 00 R ϕ C ( ) arg H( ) ϕ( ), (5), (6), (7) F R ( ) C ϕ + C ( ) R ϕ ( ) ( ). (8) umerical research o the minimum in the objective unction is perormed with a hybrid technique based on the combination o a stochastic [8] and deterministic [9] approach. The two approaches are adopted in a combined way to tae advantage o their complementary characteristics. In act, the deterministic approach is ast to converge to a solution, but the quality o results strongly depends on the choice o the starting point. on-deterministic approaches do not depend on the initial choice but usually are slow to ind the optimal

5 solution. Starting rom these considerations, an initial exploration o the space o solutions is made by a generic algorithm having a population size greater than the number o coeicients chosen as the target. Then, the obtained values have been used as initial points to run a constrained deterministic approach based on the Sequential Quadratic Programming (SQP) [9] to ind the optimal solution. The SQP algorithm was preerred to simpler algorithms (such as the zero-order method) or the possibility to tae into account the inormation about the derivative o the objective unction and, in addition, to include, in direct way, the abovementioned constraints [9]. The described procedure has three parameters that can be chosen arbitrarily: the sampling requency and the number o coeicients o the ilter numerator and denominator. The sampling requency should be chosen according to the target application. For the case in hand, as it will be seen in the next subsection, since the digital ilter has to be implemented on the FPGA board with 00 Hz ADC and DAC, the sampling requency is chosen equal to 00 Hz. The lengths o the numerator and denominator should be ixed very careully because they involve, at the same time, the number o independent variables o the objective unction and the complexity o the obtained ilter. Typically, better results are obtained increasing the ilter order, but this is against the need o eeping the ilter computational burden low. For this reason, the procedure is repeated a certain number o times, varying in each run the numerator and denominator lengths to ind their best values. The lengths o the denominator, n, and o the numerator, m+, are chosen in the range o 5 and the population size o the generic algorithm 50 greater than the n+m+ value, i.e. the number o independent variables. The inner loop is repeated 3 times. The identiication procedure is made in this way: irst o all, the transer unction deined in () is constructed in a numerical way, linearly interpolating experimental data rom calibration. The optimization algorithm runs in three nested loops, varying the numerator and denominator lengths; in the inner loop the procedure is repeated a certain number o times. This is required, basing on the act that the utilized hybrid optimization technique comprehends a stochastic algorithm which returns dierent results in every run. The number o requency points is chosen equal to our times the total number o coeicients. Among the solutions reerring to the same numerator and denominator lengths, which come rom the inner loop, the one which minimizes the cost unction is chosen. 5. Implementation on FPGA board The identiied digital ilter represents the inverse linear system o the characterized CT. In order to real-time compensate the CT, a digital processor, opportunely equipped with analogto-digital and digital-to-analog converters, has to be used. For the case in hand, an FPGA board has been used. It contains an ADC and a DAC with 6 bit resolution and 00 Hz maximum sampling requency or the irst one, MHz or the second. The bloc scheme o the compensated CT is shown in Fig.. Fig.. Bloc scheme o the compensated current transormer.

6 In Fig. 4, I is the primary current, I the secondary current, V the voltage across the shunt at the secondary winding, V the sampled version o V, V * the iltered version o V, V * the analog version o V * and it is the output o the compensated CT. Such an instrument transormer continues to be an analog device, thus oering the possibility o being employed in whatever measuring system. 6. Current transormer metrological characterization For the metrological characterization o current transormers an automated measuring station has been realized: it is based on a power source, numerically controlled, and a PXI platorm. Its bloc scheme is shown in Fig. and its eatures are described in [] The outputs o the reerence shunt and o the CT are simultaneously sampled and acquired through a data acquisition board and they are compared. The sotware or the automated measuring station has been implemented in LabWindows CVI, a C programming environment, measuring instruments oriented, distributed by ational Instruments. PXI-BUS PXI Controller Function Generation Module Data Acquisition Module IEEE-488 POWER AMPLIFIER + ADJUSTABLE RESISTOR REF SHUT CT SHUT Fig.. Bloc scheme o the realized calibration station. The measuring station is programmed in such a way that it automatically perorms the desired number o tests in order to determine the mean transormation ratio, the requency response and the linearity o the CT under test, as described in []. For the case in hand, a CT with ratio 50/5 A/A, accuracy class 0.5 and rated power o 5 VA has been utilized; using three primary supplementary turns its rated ratio becomes 50/5 A/A. A preliminary test in order to determine the ratio at rated requency, 50 Hz, and rated current, 50 A, has been conducted: the ratio is 0.0 A/A. The CT has been characterized in the requency range o Hz at rated current o 50 A, using a resistive shunt o 00 mω at the secondary winding. According to [], [] the ratio error and phase displacement o the CT are ound and they are shown in Fig. 3: it is evident that the ratio error is equal to zero at 50 Hz. ] Er o r [% R atio 60 Ratio Error 0.5 Phase Displacement d ] ra [m t m en e c la D isp e P has Frequency [Hz] Fig. 3. Ratio error and phase displacement o current transormer.

7 7. Experimental results Data available rom calibration o the CT are used in an optimization procedure, in order to ind the digital ilter that minimizes the ratio error and phase displacement o the compensated CT. This digital ilter is then implemented in the FPGA compensating device and the compensated CT is characterized with previously described automated measurement station. Optimization and compensation results are discussed in the next subsections. 7.. Optimization results The procedure described in section A has been used in order to identiy a digital compensating ilter or the utilized CT, whose metrological characterization is described in section 3. As previously said, the sampling requency o the digital ilter is chosen equal to 00 Hz, since it is the sampling rate o A/D and D/A converters on the FPGA board. Denominator and numerator lengths, n and m, are chosen in the range o 5 and population size o genetic algorithm 50 greater than the n+m value. The inner loop is repeated 3 times. To compare the improvements introduced by the dierent solutions, two indices have been used, as in ormulas (7) and (8), where I R and I ϕ are, respectively, improvements in ratio error and phase displacement. In Figs 4 and 5, I R and I ϕ or CT as unctions o numerator and denominator lengths are shown. The best digital compensating ilter, which minimizes the objective unction, has zeros and poles; numerator and denominator coeicients are shown in Table. Improvements in ratio error and phase displacement, coming rom simulations or the adopted solution, are respectively equal to 4.4 and.8. I R R R C ( R( )) ( RC ( )) (9) I ϕ ϕ ϕ C ( ϕ( )) ( ϕc ( )) (0) Ratio Error Improvement I 30 R umerator Length Denominator Length Fig. 4. Improvement o ratio error as unction o numerator and denominator lengths.

8 Phase Displacement Improvement I φ umerator Length Denominator Length Fig. 5. Improvement o phase displacement as unction o numerator and denominator lengths. 7.. Compensation results The identiied digital ilter, whose coeicients are shown in Table, has been implemented in the FPGA board and the compensated CT has been characterized through the previously described automated measuring station. The same tests reported in section 3 have been perormed. Table. Coeicients o compensating digital ilter. b a Ratio error and phase displacement o the compensated CT are shown in Fig. 6. It can be seen that the phase displacement o the compensated CT is worse than that o the uncompensated one: this is due to the act that the compensating device introduces a time delay related to A/D conversion, iltering and D/A conversion, and it adds a phase displacement, a linear unction o requency, to the output o the compensated CT. The total time delay has been measured and it is equal to 0.55 µs. Obviously, since it is constant, it can be eliminated in post-processing. In Table the mean quadratic values or ratio errors and phase displacements o uncompensated and compensated CTs and compensation improvements are reported. In it, S reers to simulation values, M to measurement values, IS is the improvement in simulation, IM the improvement in measurement, IMpp the improvement in measurement with data post-processing. Improvement in ratio error is approximately the same, both in simulation and measurement. As it is said beore, the phase displacement is worse due to the time delay o the compensating device; i the output o compensated CT is post-processed, the improvement both in simulation and measurement is approximately the same.

9 ] % Er o r [ R atio 0 Ratio Error 0.5 Phase Displacement d ] ra - -40[m t m en e c la D isp e P has Frequency [Hz] Fig. 6. Ratio error and phase displacement o compensated CT. Table. Compensation improvements in ratio error and phase displacement. Ratio error Phase displacement S [%] M [%] IS [p.u.] IM [p.u.] S [mrad] M [mrad] IS [p.u.] IM [p.u.] IM PP [p.u.] CT Comp. CT Conclusions In this paper a real-time digital technique or the compensation o current transormers in the requency range o 0 Hz 0 Hz, based on a ield programmable gate array, has been presented. It is based on the identiication o a digital ilter with a requency response equal to the inverse one o the CT. Once the CT has been metrologically characterized, thus inding its requency response, ilter coeicients are ound through the optimization procedure; the compensated CT continues to be an analog device since it is obtained by cascading the CT with an FPGA board, opportunely equipped with analog to digital and digital to analog converters, which implements the digital ilter. Experimental results have shown that the compensated CT improves the perormance o the original CT; the ratio error steps up by a actor o 4.. Regarding the phase displacement, it grows worse due to the presence o a time delay introduced by the compensating device: since this time delay is constant, it can be eliminated by post-processing o the output o the compensated CT, reaching in this way an improvement actor o.7 also in phase displacement. The presented technique, other than improving CT perormances in a large requency bandwidth, is eective also rom another point o view: the improvement is obtained adding to the CT a low cost device, increasing a little the total CT cost. A CT with the same perormance o the compensated CT has a cost higher than the original one by about the improvement actor obtained with the compensation. Future wor will regard the enhancement o mathematical ormulation o the identiication procedure, in order to account or the phase displacement due to the time delay o the compensating device, and the use o such a technique or active compensation o CTs. Reerences [] IEEE Standard Requirements or Instrument Transormers, IEEE Std. C , 994.

10 [] Instrument Transormers-Part : Current Transormers, IEC Std , 000. [3] E 5060, Voltage characteristics o electricity supplied by public distribution systems, CEELEC, 999. [4] IEC E : Testing and measurement techniques Power quality measurement methods, /003. [5] P. Daponte: Electronically compensated current transormer modeling. Measurement, no.5 (4), 995, pp. 3-. [6] A. Baccigalupi, A. Liccardo: Compensation o Current Transormers. Instrumentation and Measurement Technology Conerence Proceedings, 007 IEEE, -3 May 007. [7] D. Slomovitz: Electronic system or increasing the accuracy o in-service instrument-current transormers. Instrumentation and Measurement, IEEE Transactions on, vol. 5, no., 003, pp [8] D. A. Douglass: Current Transormer Accuracy with Asymmetric and High Frequency Fault Currents. IEEE Transactions on Power Apparatus and Systems, vol. PAS-00, no. 3, 98, pp [9] C. De Capua, C. Landi: Measurement Station Perormance Optimization or Testing on High Eiciency Variable Speed Drives. IEEE Transactions On Instrumentation And Measurement, vol. 48, no. 6, 999, pp [0] G. Dantona, A. Ferrero, R. Ottoboni: Bandwidth enhancement o an insulated voltage to voltage transducer via digital compensation or industrial applications. Instrumentation and Measurement Technology Conerence, 998. IMTC/98. Conerence Proceedings. IEEE, vol., 8- May 998, pp [] A. Delle Femine, D. Gallo, C. Landi, M. Luiso: A technique or real-time correction o measurement instrument transducers requency responses. International Instrumentation and Measurement Technology Conerence Proceedings, 008 IEEE, May 5, 008. [] R. Pintelon, Y. Rolain, M.V. Bossche, J. Schouens: Towards an ideal data acquisition channel. Instrumentation and Measurement. IEEE Transactions on, vol. 39, no., Feb 990, pp [3] I. Kollar, R. Pintelon, Y. Rolain, J. Schouens: Another step towards an ideal data acquisition channel. Instrumentation and Measurement, IEEE Transactions on, vol.40, no. 3, June 99, pp [4] I. Kollar, Y. Rolain: Complex correction o data acquisition channels using FIR equalizer ilters. Instrumentation and Measurement, IEEE Transactions on, vol. 4, no. 5, Oct. 993, pp [5] J. Kaipio, E. Somersalo: Statistical and Computational Inverse Problems. Applied Mathematic Sciences, 005. [6] K. Deb: Multi-Objective Optimization using Evolutionary Algorithms, Wiley, 00. [7] J.H. Holland: Genetic algorithms, Scientiic American, 99. [8] D.E. Goldberg: Genetic Algorithms in Search, Optimization, and Machine Learning, Addison Wesley, 989 [9] T.F. Coleman, Y. Li: An Interior, Trust Region Approach or onlinear Minimization Subject to Bounds. SIAM Journal on Optimization, vol.6, 996, pp [0] A. Delle Femine, C. Landi, M. Luiso: A Fully Automated Measuring Station or the Calibration o Voltage Transducers. Proceedings o 5th IMEKO TC4 Symposium on ovelties in Electrical Measurements and Instrumentation, 9- September 007, Iasi, Romania.