RF Power LDMOS Transistor N--Channel Enhancement--Mode Lateral MOSFET

Transcription

1 Freescale Semiconductor Technical Data Document Number: AFT2S240--2S Rev. 0, 4/204 RF ower LDMOS Transistor N--Channel nhancement--mode Lateral MOSFT This 55 W RF power LDMOS transistor is designed for cellular base station applications covering the frequency range of 20 to 270 MHz. Typical Single--Carrier W--CDMA Characterization erformance: V DD =28Vdc,I DQ = 400 ma, out = 55 W Avg., Input Signal AR = % robability on CCDF. Frequency G ps (db) D (%) Output AR (db) ACR (dbc) IRL (db) 20 MHz MHz, 55 W AVG., 28 V AIRFAST RF OWR LDMOS TRANSISTOR 240 MHz MHz Features Greater Negative Gate--Source Voltage Range for Improved Class C Operation Designed for Digital redistortion rror Correction Systems Optimized for Doherty Applications In Tape and Reel. R3 Suffix = 250 Units, 56 mm Tape Width, 3--inch Reel. NI -880XS -2L2L 4 VBW () RF in /V GS 3 RF out /V DS 2 VBW () (Top View) Figure. in Connections. Device cannot operate with the V DD current supplied through pin 2 and pin 4., 204. All rights reserved.

2 Table. Maximum Ratings Rating Symbol Value Unit Drain--Source Voltage V DSS 0.5, +65 Vdc Gate--Source Voltage V GS 6.0, +0 Vdc Operating Voltage V DD 32, +0 Vdc Storage Temperature Range T stg 65 to +50 C Case Operating Temperature Range T C 40 to +50 C Operating Junction Temperature Range (,2) T J 40 to +225 C Table 2. Thermal Characteristics Characteristic Symbol Value (2,3) Unit Thermal Resistance, Junction to Case Case Temperature 75 C, 55 W CW, 28 Vdc, I DQ = 400 ma, 240 MHz R JC 0.35 C/W Table 3. SD rotection Characteristics Test Methodology Human Body Model (per JSD22--A4) Machine Model (per IA/JSD22--A5) Charge Device Model (per JSD22--C0) Class C A IV Table 4. lectrical Characteristics (T A =25 C unless otherwise noted) Characteristic Symbol Min Typ Max Unit Off Characteristics Zero Gate Voltage Drain Leakage Current (V DS =65Vdc,V GS =0Vdc) Zero Gate Voltage Drain Leakage Current (V DS =32Vdc,V GS =0Vdc) Gate--Source Leakage Current (V GS =5Vdc,V DS =0Vdc) On Characteristics Gate Threshold Voltage (V DS =0Vdc,I D = 280 Adc) Gate Quiescent Voltage (V DD =28Vdc,I D = 400 madc, Measured in Functional Test) Drain--Source On--Voltage (V GS =0Vdc,I D =2.8Adc) I DSS 0 Adc I DSS Adc I GSS Adc V GS(th) Vdc V GS(Q) Vdc V DS(on) Vdc Functional Tests (4) (In Freescale roduction Test Fixture, 50 ohm system) V DD =28Vdc,I DQ = 400 ma, out = 55 W Avg., f = 270 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal AR = % robability on CCDF. ACR measured in 3.84 MHz Channel 5 MHzOffset. ower Gain G ps db Drain fficiency D % Output eak--to--average 0.0% robability on CCDF AR db Adjacent Channel ower Ratio ACR dbc Input Return Loss IRL db. Continuous use at maximum temperature will affect MTTF. 2. MTTF calculator available at Select Software & Tools/Development Tools/Calculators to access MTTF calculators by product. 3. Refer to AN955, Thermal Measurement Methodology of RF ower Amplifiers. Go to Select Documentation/Application Notes -- AN art internally matched both on input and output. (continued) 2

3 Table 4. lectrical Characteristics (T A =25 C unless otherwise noted) (continued) Characteristic Symbol Min Typ Max Unit Load Mismatch (In Freescale Characterization Test Fixture, 50 ohm system) I DQ = 400 ma, f = 240 MHz, 00 sec ulse Width, 0% Duty Cycle VSWR 0: at 32 Vdc, 300 W ulse Output ower No Device Degradation (3 db Input Overdrive from 230 W ulse Rated ower) Typical erformance (In Freescale Characterization Test Fixture, 50 ohm system) V DD =28Vdc,I DQ = 400 ma, MHz Bandwidth db Compression oint, CW db 230 W AM/M (Maximum value measured at the 3dB compression point across the MHz bandwidth) VBW Resonance oint (IMD Third Order Intermodulation Inflection oint) 20 VBW res 60 MHz Gain Flatness in 60 MHz out =55WAvg. G F 0.7 db Gain Variation over Temperature ( 30 C to+85 C) Output ower Variation over Temperature ( 30 C to+85 C) G db/ C db 0.07 db/ C 3

4 C R V DD C V GG C5 C2 AFT2S240_2S Rev. C2 R2 C8 C0 C3 C4 CUT OUT ARA C7 C9 C C6 C3 C5 V DD D56227 Figure 2. roduction Test Circuit Component Layout Table 5. roduction Test Circuit Component Designations and Values art Description art Number Manufacturer C, C5, C6, C2, C3 0 F Chip Capacitors C5750X7S2A06M230KB TDK C2, C4 0 pf Chip Capacitors ATC600F00JT250XT ATC C3 0.8 pf Chip Capacitor ATC600F0R8BT250XT ATC C7 0.2 pf Chip Capacitor ATC600F0R2BT250XT ATC C8, C9, C0, C 8.2 pf Chip Capacitors ATC600F8R2BT250XT ATC C4, C5 220 F, 00 V Chip Capacitors MCGR00V227M6X26-RH Multicomp R 5.6 K, /4 W Chip Resistor CRCW2065K60FKA Vishay R2 0, /4 W Chip Resistor RK73H2ATTD0R0F KOA Speer CB Rogers RO4350B, 0.030, r =3.66 D56227 MTL 4

5 V DD -- C0 R C V GG R2 C8 C7 C6 AFT2S240XS Rev. 0 C2 C2* C8 C7 C6 C4 C3* C5 CUT OUT ARA C C3 C5 C4 R3 C9 V GG V DD D5260 *C3 and C2 are mounted vertically. Figure 3. Characterization Test Circuit Component Layout Table 6. Characterization Test Circuit Component Designations and Values art Description art Number Manufacturer C, C7 0 F Chip Capacitors GRM3CR6H06KA2L MuRata C2, C6, C4, C7 9. pf Chip Capacitors ATC00B9RCT500XT ATC C3, C2 7.5 pf Chip Capacitors ATC00B7R5CT500XT ATC C4, C5.2 pf Chip Capacitors ATC00BR2BT500XT ATC C8, C9, C5, C6 0 F Chip Capacitors C5750X7S2A06M230KB TDK C0 470 F Chip Capacitor MCGR63V477M3X26-RH Multicomp C 0. pf Chip Capacitor ATC00B0RBT500XT ATC C3 0.5 pf Chip Capacitor ATC00B0R5BT500XT ATC C8 0.4 pf Chip Capacitor ATC00B0R4BT500XT ATC R 5.6 K, /4 W Chip Resistor CRCW2065K60FKA Vishay R2, R3 6.04, /4 W Chip Resistors CRCW2066R04FKA Vishay CB Rogers RO4350B, 0.030, r =3.66 D5260 MTL 5

6 TYICAL CHARACTRISTICS G ps, OWR GAIN (db) D 9 G ps V DD =28Vdc, out =55W(Avg.) I DQ = 400 ma, Single--Carrier W--CDMA ARC IRL 3.84 MHz Channel Bandwidth Input Signal AR = % robability on CCDF ACR f, FRQUNCY (MHz) Figure 4. Single -Carrier Output eak -to -Average Ratio Compression (ARC) Broadband out = 55 Watts Avg D, DRAIN FFICINCY (%) ACR (dbc) IRL, INUT RTURN LOSS (db) ARC (db) IMD, INTRMODULATION DISTORTION (dbc) V DD =28Vdc, out = 20 W (), I DQ = 400 ma Two--Tone Measurements, (f + f2)/2 = Center Frequency of 240 MHz IM7--L IM3--U IM3--L IM5--U IM5--L IM7--U TWO--TON SACING (MHz) Figure 5. Intermodulation Distortion roducts versus Two -Tone Spacing G ps, OWR GAIN (db) OUTUT COMRSSION AT 0.0% ROBABILITY ON CCDF (db) db = 3 W V DD =28Vdc,I DQ = 400 ma, f = 240 MHz Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth, Input Signal AR = % robability on CCDF db = 44 W db = 58 W ARC D ACR G ps D DRAIN FFICINCY (%) ACR (dbc) out, OUTUT OWR (WATTS) Figure 6. Output eak -to -Average Ratio Compression (ARC) versus Output ower 6

7 TYICAL CHARACTRISTICS G ps, OWR GAIN (db) V DD =28Vdc,I DQ = 400 ma Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth, Input Signal AR = % robability on CCDF 240 MHz 20 MHz 270 MHz G ps 240 MHz 270 MHz 20 MHz 270 MHz 240 MHz 20 MHz D ACR D, DRAIN FFICINCY (%) ACR (dbc) out, OUTUT OWR (WATTS) AVG. Figure 7. Single -Carrier W -CDMA ower Gain, Drain fficiency and ACR versus Output ower Gain GAIN (db) IRL V DD =28Vdc 2 in =0dBm --8 I DQ = 400 ma f, FRQUNCY (MHz) Figure 8. Broadband Frequency Response IRL (db) 7

8 Table 7. Load ull erformance Maximum ower Tuning V DD =28Vdc,I DQ = 408 ma, ulsed CW, 0 sec(on), 0% Duty Cycle f (MHz) Z source Z in Max Output ower db Z () load Gain (db) (dbm) (W) j j j j j4.9.4 j j j j D (%) AM/M f (MHz) Z source Z in Max Output ower 3dB Z (2) load Gain (db) (dbm) (W) j j j j j j j j j () Load impedance for optimum db power. (2) Load impedance for optimum 3dB power. Z source = Measured impedance presented to the input of the device at the package reference plane. Z in = Impedance as measured from gate contact to ground. Z load = Measured impedance presented to the output of the device at the package reference plane. D (%) AM/M Table 8. Load ull erformance Maximum Drain fficiency Tuning V DD =28Vdc,I DQ = 408 ma, ulsed CW, 0 sec(on), 0% Duty Cycle f (MHz) Z source Z in Max Drain fficiency db Z () load Gain (db) (dbm) (W) j j j j j j j j j D (%) AM/M f (MHz) Z source Z in Max Drain fficiency 3dB Z (2) load Gain (db) (dbm) (W) j j j j j j j j j () Load impedance for optimum db efficiency. (2) Load impedance for optimum 3dB efficiency. Z source = Measured impedance presented to the input of the device at the package reference plane. Z in = Impedance as measured from gate contact to ground. Z load = Measured impedance presented to the output of the device at the package reference plane. D (%) AM/M Input Load ull Tuner and Test Circuit Device Under Test Output Load ull Tuner and Test Circuit Z source Z in Z load 8

9 db - TYICAL LOAD ULL CONTOURS 240 MHz IMAGINARY RAL Figure 9. db Load ull Output ower Contours (dbm) IMAGINARY RAL Figure 0. db Load ull fficiency Contours (%) IMAGINARY IMAGINARY RAL 20.5 Figure. db Load ull Gain Contours (db) RAL --4 Figure 2. db Load ull AM/M Contours NOT: = Maximum Output ower Gain = Maximum Drain fficiency Drain fficiency Linearity Output ower 9

10 3dB - TYICAL LOAD ULL CONTOURS 240 MHz IMAGINARY RAL Figure 3. 3dB Load ull Output ower Contours (dbm) IMAGINARY RAL Figure 4. 3dB Load ull fficiency Contours (%) 56 IMAGINARY IMAGINARY RAL RAL Figure 5. 3dB Load ull Gain Contours (db) Figure 6. 3dB Load ull AM/M Contours NOT: = Maximum Output ower Gain = Maximum Drain fficiency Drain fficiency Linearity Output ower 0

11 ACKAG DIMNSIONS

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13 RODUCT DOCUMNTATION, SOFTWAR AND TOOLS Refer to the following resources to aid your design process. Application Notes AN955: Thermal Measurement Methodology of RF ower Amplifiers ngineering Bulletins B22: Using Data Sheet Impedances for RF LDMOS Devices Software lectromigration MTTF Calculator RF High ower Model.s2p File Development Tools rinted Circuit Boards For Software and Tools, do a art Number search at and select the art Number link. Go to the Software & Tools tab on the part s roduct Summary page to download the respective tool. The following table summarizes revisions to this document. RVISION HISTORY Revision Date Description 0 Apr. 204 Initial Release of Data Sheet 3

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