RF Power LDMOS Transistor N--Channel Enhancement--Mode Lateral MOSFET

Transcription

1 Freescale Semiconductor Technical Data Document Number: Rev. 0, 7/2016 RF Power LDMOS Transistor N--Channel Enhancement--Mode Lateral MOSFET This 220 W CW high efficiency RF power transistor is designed for consumer and commercial cooking applications operating in the 240 MHz ISM band. Typical Performance: V DD =26Vdc,I DQ =0mA Frequency (MHz) Signal Type G ps (db) P out (W) 2400 CW MHz, 220 W CW, 26 V RF POWER LDMOS TRANSISTOR FORCONSUMERAND COMMERCIAL COOKING Load Mismatch/Ruggedness Frequency (MHz) Signal Type VSWR P in (W) Test Voltage Result 240 CW > 10:1 at all Phase Angles 20 (3 db Overdrive) 28 No Device Degradation OM L PLASTIC Features Characterized with series equivalent large--signal impedance parameters and common source S--parameters Internally pre--matched for ease of use Qualified for operation up to 28 Vdc Integrated ESD protection 10 C case operating temperature 22 C die temperature capability Target Applications Consumer cooking Commercial cooking Gate 2 (Top View) Drain Note: Exposed backside of the package is the source terminal for the transistor. Figure 1. Pin Connections 1, All rights reserved. 1

2 Table 1. Maximum Ratings Rating Symbol Value Unit Drain--Source Voltage V DSS 0., +6 Vdc Gate--Source Voltage V GS 6.0, +10 Vdc Operating Voltage V DD 28, +0 Vdc Storage Temperature Range T stg 6 to +10 C Case Operating Temperature Range T C 40 to +10 C Operating Junction Temperature Range (1,2) T J 40 to +22 C Total Device T C =2 C Derate above 2 C Table 2. Thermal Characteristics P D W W/ C Characteristic Symbol Value (2,3) Unit Thermal Resistance, Junction to Case Case Temperature 88 C, 220 W CW, 26 Vdc, I DQ = 100 ma, 240 MHz Table 3. ESD Protection Characteristics Human Body Model (per JESD22--A114) Machine Model (per EIA/JESD22--A11) Test Methodology Charge Device Model (per JESD22--C101) Table 4. Moisture Sensitivity Level (MSL) R JC 0.24 C/W Class 2, passes 200 V B, passes 20 V IV, passes 2000 V Test Methodology Rating Package Peak Temperature Unit Per JESD22--A113, IPC/JEDEC J--STD C Table. Electrical Characteristics (T A =2 C unless otherwise noted) Characteristic Symbol Min Typ Max Unit Off Characteristics Zero Gate Voltage Drain Leakage Current (V DS =6Vdc,V GS =0Vdc) Zero Gate Voltage Drain Leakage Current (V DS =26Vdc,V GS =0Vdc) Gate--Source Leakage Current (V GS =Vdc,V DS =0Vdc) On Characteristics Gate Threshold Voltage (V DS =10Vdc,I D = 303 Adc) Gate Quiescent Voltage (V DS =26Vdc,I D = 100 madc) Drain--Source On--Voltage (V GS =10Vdc,I D =3.7Adc) Dynamic Characteristics Reverse Transfer Capacitance (V DS =26Vdc 30 1 MHz, V GS =0Vdc) I DSS 10 Adc I DSS 1 Adc I GSS 1 Adc V GS(th) Vdc V GS(Q) 2.48 Vdc V DS(on) 0.1 Vdc C rss.8 pf 1. Continuous use at maximum temperature will affect MTTF. 2. MTTF calculator available at 3. Refer to AN19, Thermal Measurement Methodology of RF Power Amplifiers. Go to and search for AN19. 2

3 Table 6. Typical Performance In Freescale Reference Circuit, 0 ohm system, V DD =26Vdc,I DQ =0mA,P out = 220 W, f = 240 MHz Characteristic Symbol Min Typ Max Unit Power Gain G ps 14.1 db Power Added Efficiency 63. % P 1 db Compression Point P1dB 206 W P 3 db Compression Point P3dB 24 W Gain Variation over Temperature (+2 C to +12 C) Output Power Variation over Temperature (+2 C to +12 C) G 0.03 db/ C P1dB db/ C Table 7. Load Mismatch/Ruggedness In Freescale Reference Circuit, 0 ohm system, I DQ =0mA Frequency (MHz) Signal Type VSWR 240 CW > 10:1 at all Phase Angles Table 8. Ordering Information P in (W) Test Voltage, V DD Result No Device Degradation (3 db Overdrive) Device Tape and Reel Information Package R3 R3 Suffix = 20 Units, 32 mm Tape Width, 13--inch Reel OM L 3

4 TYPICAL CHARACTERISTICS 100 C, CAPACITANCE (pf) 10 C rss Measured with 30 1 MHz V GS =0Vdc V DS, DRAIN--SOURCE VOLTAGE (VOLTS) Figure 2. Capacitance versus Drain -Source Voltage 10 8 I D = Amps V DD =32Vdc 10 7 MTTF (HOURS) Amps Amps T J, JUNCTION TEMPERATURE ( C) 20 Note: MTTF value represents the total cumulative operating time under indicated test conditions. MTTF calculator available at Figure 3. MTTF versus Junction Temperature - CW 4

5 Table 9. Load Pull Performance Maximum Power Tuning V DD =26Vdc,I DQ =3mA, Pulsed CW, 10 sec(on), 10% Duty Cycle f (MHz) Z source ( ) Z in ( ) Max Output Power P1dB Z (1) load ( ) Gain (db) (dbm) (W) j j j j j j j j j D f (MHz) Z source ( ) Z in ( ) Max Output Power P3dB Z (2) load ( ) Gain (db) (dbm) (W) j j j j j j j j j (1) Load impedance for optimum P1dB power. (2) Load impedance for optimum P3dB power. Z source = Measured impedance presented to the input of the device at the package reference plane. Z in = Impedance as measured from gate contact to ground. Z load = Measured impedance presented to the output of the device at the package reference plane. D Table 10. Load Pull Performance Maximum Efficiency Tuning V DD =26Vdc,I DQ =3mA, Pulsed CW, 10 sec(on), 10% Duty Cycle f (MHz) Z source ( ) Z in ( ) Max Efficiency P1dB Z (1) load ( ) Gain (db) (dbm) (W) j j j j j j j j j D f (MHz) Z source ( ) Z in ( ) Max Efficiency P3dB Z (2) load ( ) Gain (db) (dbm) (W) j j j j j j j j j (1) Load impedance for optimum P1dB efficiency. (2) Load impedance for optimum P3dB efficiency. Z source = Measured impedance presented to the input of the device at the package reference plane. Z in = Impedance as measured from gate contact to ground. Z load = Measured impedance presented to the output of the device at the package reference plane. D Input Load Pull Tuner and Test Circuit Device Under Test Output Load Pull Tuner and Test Circuit Z source Z in Z load

6 P3dB TYPICAL LOAD PULL CONTOURS 240 MHz IMAGINARY ( ) P 1. 2 E REAL ( ) Figure 4. P3dB Load Pull Output Power Contours (dbm) IMAGINARY ( ) E P REAL ( ) Figure. P3dB Load Pull Contours 2 IMAGINARY ( ) P E REAL ( ) Figure 6. P3dB Load Pull Gain Contours (db) NOTE: P = Maximum Output Power Gain Power Added Efficiency Linearity Output Power E = Maximum Power Added Efficiency 6

7 240 MHz REFERENCE CIRCUIT 2 3 (.1 cm 7.6 cm) Table MHz Performance (In Freescale Reference Circuit, 0 ohm system) V DD =26Vdc,I DQ =0mA,T A =2 C Frequency (MHz) P in (W) G ps (db) P out (W) Table 12. Load Mismatch/Ruggedness (In Freescale Reference Circuit) Frequency (MHz) Signal Type VSWR P in (W) Test Voltage, V DD Result 240 CW > 10:1 at all Phase Angles 20 (3 db Overdrive) 28 No Device Degradation 7

8 240 MHz REFERENCE CIRCUIT 2 3 (.1 cm 7.6 cm) C C6 C7 C2 R1 C8 C9 C1 Q1 C4* C3* D76444 MHE1003 Rev. 4 *C3 and C4 are mounted vertically. Figure 7. Reference Circuit Component Layout 240 MHz Table 13. Reference Circuit Component Designations and Values 240 MHz Part Description Part Number Manufacturer C1, C2, C3, C4, C, C6 27 pf Chip Capacitors ATC600F270JT20XT ATC C7, C8, C9 10 F Chip Capacitors GRM32ER61H106KA12L Murata Q1 RF Power LDMOS Transistor NXP R1 10, 1/4 W Chip Resistor CRCW120610R0JNEA Vishay PCB Rogers RO430B, 0.030, r =3.66 D76444 MTL 8

9 TYPICAL CHARACTERISTICS 240 MHz REFERENCE CIRCUIT G ps, POWER GAIN (db) V DD =26Vdc P in =10W I DQ =0mA f, FREQUENCY (MHz) Figure 8. Power Gain, Power Added Efficiency and Output Power versus Frequency at a Constant Input Power G ps 200 P out , POWER ADDED EFFICIENCY P out,output POWER (WATTS) P out, OUTPUT POWER (WATTS) V DD =26Vdc P in =10W Detail A V DD =26Vdc P in =W f = 240 MHz f = 240 MHz V GS, GATE--SOURCE VOLTAGE (VOLTS) V GS, GATE--SOURCE VOLTAGE (VOLTS) Detail A Figure 9. Output Power versus Gate -Source Voltage P out, OUTPUT POWER (WATTS) V DD =26Vdc P in =10W V DD =26Vdc P in =W 1.6 G ps, POWER GAIN (db) V DD =26Vdc,I DQ =0mA 200 MHz 2400 MHz 240 MHz MHz MHz MHz MHz 2400 MHz P in MHz P out, OUTPUT POWER (WATTS) Figure 10. Power Gain, Power Added Efficiency and Input Power versus Output Power and Frequency G ps , POWER ADDED EFFICIENCY P in, INPUT POWER (WATTS) 9

10 TYPICAL CHARACTERISTICS 240 MHz REFERENCE CIRCUIT G ps, POWER GAIN (db) V DD =26Vdc,I DQ =0mA f = 240 MHz G ps P in T C =2_C 8_C 8_C 12_C 12_C 100 P out, OUTPUT POWER (WATTS) 12_C 2_C 2_C 8_C 0 00 Figure 11. Power Gain, Power Added Efficiency and Input Power versus Output Power and Temperature , POWER ADDED EFFICIENCY P in, INPUT POWER (WATTS) 10

11 2X SOLDER PADS (20.32) (1) (10.39) (1) (9.88) 0.40 (13.72) Inches (mm) 0.81 (1) (20.70) 1. Slot dimensions are minimum dimensions and exclude milling tolerances Figure 12. PCB Pad Layout for OM L ATWLYYWWB Figure 13. Product Marking 11

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15 PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS Refer to the following resources to aid your design process. Application Notes AN1907: Solder Reflow Attach Method for High Power RF Devices in Plastic Packages AN19: Thermal Measurement Methodology of RF Power Amplifiers Engineering Bulletins EB212: Using Data Sheet Impedances for RF LDMOS Devices Software Electromigration MTTF Calculator RF High Power Model Development Tools Printed Circuit Boards To Download Resources Specific to a Given Part Number: 1. Go to 2. Search by part number 3. Click part number link 4. Choose the desired resource from the drop down menu REVISION HISTORY The following table summarizes revisions to this document. Revision Date Description 0 July 2016 Initial Release of Data Sheet 1

16 How to Reach Us: Home Page: freescale.com Web Support: freescale.com/support Information in this document is provided solely to enable system and software implementers to use Freescale products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits based on the information in this document. Freescale reserves the right to make changes without further notice to any products herein. Freescale makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Typical parameters that may be provided in Freescale data sheets and/or specifications can and do vary in different applications, and actual performance may vary over time. All operating parameters, including typicals, must be validated for each customer application by customer s technical experts. Freescale does not convey any license under its patent rights nor the rights of others. Freescale sells products pursuant to standard terms and conditions of sale, which can be found at the following address: freescale.com/salestermsandconditions. Freescale and the Freescale logo are trademarks of, Reg. U.S. Pat. & Tm. Off. All other product or service names are the property of their respective owners. E 2016 Document Number: 16 Rev. 0, 7/2016