RF Power Field Effect Transistors N--Channel Enhancement--Mode Lateral MOSFETs

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1 Freescale Semiconductor Technical Data RF Power Field Effect Transistors N--Channel Enhancement--Mode Lateral MOSFETs Designed for pulse and CW wideband applications with frequencies up to 500 MHz. Devices are unmatched and are suitable for use in communications, radar and industrial applications. Typical Pulse Performance at 450 MHz: V DD =50Vdc,I DQ = 150 ma, P out = 00 W Peak (0 W Avg.), Pulse Width = 0 μsec, Power Gain db Drain Efficiency 64% Capable of Handling :1 50 Vdc, 450 MHz, 00 W Peak Power Features Characterized with Series Equivalent Large--Signal Impedance Parameters CW Operation Capability with Adequate Cooling Qualified Up to a Maximum of 50 V DD Operation Integrated ESD Protection Designed for Push--Pull Operation Greater Negative Gate--Source Voltage Range for Improved Class C Operation In Tape and Reel. R5 Suffix = 50 Units, 56 mm Tape Width, 13--inch Reel. Document Number: MMRF06H Rev. 1, 11/15 MMRF06HR5 MMRF06HSR5-500 MHz, 00 W, 50 V LATERAL N -CHANNEL BROADBAND RF POWER MOSFETs NI -1230H -4S MMRF06HR5 NI -1230S -4S MMRF06HSR5 PARTS ARE PUSH -PULL RF ina /V GSA 3 1 RF outa /V DSA RF inb /V GSB 4 2 RF outb /V DSB (Top View) Table 1. Maximum Ratings Figure 1. Pin Connections Rating Symbol Value Unit Drain--Source Voltage V DSS --0.5, +1 Vdc Gate--Source Voltage V GS -- 6, + Vdc Storage Temperature Range T stg to +150 C Case Operating Temperature T C 150 C Operating Junction Temperature (1) T J 225 C Total Device T C =25 C, CW only (2) P D 1333 W 1. Continuous use at maximum temperature will affect MTTF. 2. Refer to Fig. 12, Transient Thermal Impedance, for information to calculate value for pulsed operation., 13, 15. All rights reserved. 1

2 Table 2. Thermal Characteristics Characteristic Symbol Value (1) Unit Thermal Impedance, Junction to Case Pulse: Case Temperature 80 C, 00 W Peak, 0 μsec Pulse Width, % Duty Cycle, 450 MHz (2) Thermal Resistance, Junction to Case CW: Case Temperature 84 C, 00 W CW, MHz Table 3. ESD Protection Characteristics Human Body Model (per JESD22--A114) Machine Model (per EIA/JESD22--A115) Test Methodology Charge Device Model (per JESD22--C1) Z θjc 0.03 C/W R θjc 0.15 C/W Class 2, passes 00 V A, passes 125 V IV, passes 00 V Table 4. Electrical Characteristics (T A =25 C unless otherwise noted) Characteristic Symbol Min Typ Max Unit Off Characteristics (3) Gate--Source Leakage Current (V GS =5Vdc,V DS =0Vdc) I GSS μadc Drain--Source Breakdown Voltage (I D = 300 ma, V GS =0Vdc) Zero Gate Voltage Drain Leakage Current (V DS =50Vdc,V GS =0Vdc) Zero Gate Voltage Drain Leakage Current (V DS = 0 Vdc, V GS =0Vdc) On Characteristics Gate Threshold Voltage (3) (V DS =Vdc,I D = 1600 μadc) Gate Quiescent Voltage (4) (V DD =50Vdc,I D = 150 madc, Measured in Functional Test) Drain--Source On--Voltage (3) (V GS =Vdc,I D =4Adc) Dynamic Characteristics (3) Reverse Transfer Capacitance (V DS =50Vdc± 30 1 MHz, V GS =0Vdc) Output Capacitance (V DS =50Vdc± 30 1 MHz, V GS =0Vdc) Input Capacitance (V DS =50Vdc,V GS =0Vdc± 30 1 MHz) V (BR)DSS 1 Vdc I DSS 0 μadc I DSS 5 ma V GS(th) Vdc V GS(Q) Vdc V DS(on) 0.28 Vdc C rss 3.3 pf C oss 147 pf C iss 506 pf Functional Tests (4) (In Freescale Test Fixture, 50 ohm system) V DD =50Vdc,I DQ = 150 ma, P out = 00 W Peak (0 W Avg.),, 0 μsec Pulse Width, % Duty Cycle Power Gain G ps db Drain Efficiency η D % Input Return Loss IRL db 1. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to Select Documentation/Application Notes -- AN Refer to Fig. 12, Transient Thermal Impedance, for other pulsed conditions. 3. Each side of device measured separately. 4. Measurement made with device in push--pull configuration. 2

3 V BIAS + C1 B1 C2 C3 C4 L3 + + C25 C26 C27 C28 C29 C30 V SUPPLY COAX1 L1 Z14 COAX3 Z8 Z12 Z16 Z18 Z Z22 C22 RF INPUT Z1 Z2 Z3 C5 C7 Z4 C8 Z5 Z6 Z7 C9 Z C Z11 DUT C15 C16 C17 C18 C19 C23 C24 RF OUTPUT Z24 COAX2 V BIAS C6 B2 + C11 C12 C13 C14 Z9 L2 Z13 Z17 Z15 L4 Z19 Z21 Z23 C21 COAX4 C + + V SUPPLY C31 C32 C33 C34 C35 C36 Z x Microstrip Z2*, Z3* x 0.0 Microstrip Z4*, Z5* 0.2 x Microstrip Z6, Z x Microstrip Z8*, Z9* x Microstrip Z, Z x Microstrip Z12, Z x Microstrip Z14*, Z15* x Microstrip Z16, Z x Microstrip Z18, Z x Microstrip Z, Z21, Z22, Z x Microstrip Z x Microstrip PCB Arlon CuClad 250GX , 0.030, ε r =2.55 * Line length includes microstrip bends Figure 2. MMRF06HR5(HSR5) Pulse Test Circuit Schematic 450 MHz Table 5. MMRF06HR5(HSR5) Pulse Test Circuit Component Designations and Values 450 MHz Part Description Part Number Manufacturer B1, B2 47 Ω, 0 MHz Short Ferrite Beads Fair--Rite C1, C11 47 μf, 50 V Electrolytic Capacitors 476KXM063M Illinois C2, C12, C28, C μf Chip Capacitors CDR33BX4AKYS Kemet C3, C13, C27, C33 2 nf, 50 V Chip Capacitors C1812C224K5RAC Kemet C4, C μf, 50 V Chip Capacitors C1825C225J5RAC Kemet C5, C6, C8, C15 27 pf Chip Capacitors ATC0B270JT500XT ATC C7, C pf Variable Capacitors 27291SL Johanson Components C9 33 pf Chip Capacitor ATC0B330JT500XT ATC C16 12 pf Chip Capacitor ATC0B1JT500XT ATC C17 pf Chip Capacitor ATC0B0JT500XT ATC C pf Chip Capacitor ATC0B9R1CT500XT ATC C pf Chip Capacitor ATC0B8R2CT500XT ATC C, C21, C22, C23, 240 pf Chip Capacitors ATC0B241JT0XT ATC C25, C32 C pf Chip Capacitor ATC0B5R6CT500XT ATC C26, C μf, 0 V Chip Capacitors 2225X7R225KT3AB ATC C29, C30, C35, C μf, 63 V Electrolytic Capacitors EMVY630GTR331MMH0S Nippon Chemi--Con Coax1, 2, 3, 4 25 Ω Semi Rigid Coax, 2.2 Shield Length UT--141C--25 Micro--Coax L1, L2 2.5 nh, 1 Turn Inductors A01TKLC Coilcraft L3, L4 43 nh, Turn Inductors BTJLC Coilcraft 3

4 C29 C1 B1 C2 C3 C4 C27 C28 C30 C25 C26 COAX1 L1 L3 COAX3 C5 C7 C8 C C9 C23 C18 C19 C16 C22 C6 CUT OUT AREA C15 C17 C C21 C24 COAX2 L2 L4 COAX4 C32 C31 C11 B2 C12 C14 C33 C35 C36 C13 C34 Figure 3. MMRF06HR5(HSR5) Pulse Test Circuit Component Layout 450 MHz 4

5 TYPICAL CHARACTERISTICS 00 C iss 0 C, CAPACITANCE (pf) 0 C rss C oss Measured with ±30 1 MHz V GS =0Vdc I D, DRAIN CURRENT (AMPS) T J = 150 C T J = 0 C T J = 175 C V DS, DRAIN--SOURCE VOLTAGE (VOLTS) Note: Each side of device measured separately. Figure 4. Capacitance versus Drain -Source Voltage T C =25 C V DS, DRAIN--SOURCE VOLTAGE (VOLTS) Note: Each side of device measured separately. Figure 5. DC Safe Operating Area G ps, POWER GAIN (db) V DD =50Vdc I DQ = 150 ma Pulse Width = 0 μsec 0 G ps η D η D, DRAIN EFFICIENCY (%) P out, OUTPUT POWER (dbm) P3dB = dbm ( W) P1dB = dbm (78.94 W) Ideal Actual V DD =50Vdc I DQ = 150 ma Pulse Width = 0 μsec P out, OUTPUT POWER (WATTS) PEAK P in, INPUT POWER (dbm) PEAK Figure 6. Power Gain and Drain Efficiency versus Output Power Figure 7. Output Power versus Input Power G ps, POWER GAIN (db) I DQ = 6000 ma 3600 ma 1500 ma 750 ma 375 ma 150 ma 0 V DD =50Vdc Pulse Width = 0 μsec P out, OUTPUT POWER (WATTS) PEAK Figure 8. Power Gain versus Output Power G ps, POWER GAIN (db) V DD =30V 35 V 40 V 45 V 50 V I DQ = 150 ma, Pulse Width = 0 μsec P out, OUTPUT POWER (WATTS) PEAK Figure 9. Power Gain versus Output Power 5

6 TYPICAL CHARACTERISTICS P out, OUTPUT POWER (dbm) _C T C =--30_C 85_C V DD =50Vdc I DQ = 150 ma Pulse Width = 0 μsec G ps, POWER GAIN (db) V DD =50Vdc I DQ = 150 ma Pulse Width = 0 μsec G ps T C =--30_C η D 85_C 25_C η D, DRAIN EFFICIENCY (%) P in, INPUT POWER (dbm) PEAK P out, OUTPUT POWER (WATTS) PEAK Figure. Output Power versus Input Power Figure 11. Power Gain and Drain Efficiency versus Output Power ZθJC, THERMAL IMPEDANCE ( C/W) D= P D D=0.5 t t D=0.3 T C = Case Temperature 0.04 Z JC = Thermal Impedance (from graph) P D = Peak Power Dissipation 0.02 D=0.1 D=DutyFactor=t 1 /t 2 t 1 = Pulse Width; t 2 = Pulse Period 0 T J (peak) = P D *Z θjc +T C RECTANGULAR PULSE WIDTH (S) Figure 12. Transient Thermal Impedance MTTF (HOURS) 9 8 V DD =50Vdc P out = 00 W CW η D = 67% T J, JUNCTION TEMPERATURE ( C) MTTF calculator available at Select Software & Tools/Development Tools/Calculators to access MTTF calculators by product. NOTE: For pulse applications or CW conditions, use the MTTF calculator referenced above. Figure 13. MTTF versus Junction Temperature - CW 250 6

7 Z o =2Ω Z source Z load V DD =50Vdc,I DQ = 150 ma, P out = 00 W Peak f MHz Z source Ω Z load Ω j j1.22 Z source = Test circuit impedance as measured from gate to gate, balanced configuration. Z load = Test circuit impedance as measured from drain to drain, balanced configuration. Input Matching Network + Device Under Test -- Output Matching Network -- + Z source Z load Figure 14. Series Equivalent Source and Load Impedance 450 MHz 7

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12 PRODUCT DOCUMENTATION Refer to the following documents to aid your design process. Application Notes AN1955: Thermal Measurement Methodology of RF Power Amplifiers Engineering Bulletins EB212: Using Data Sheet Impedances for RF LDMOS Devices The following table summarizes revisions to this document. REVISION HISTORY Revision Date Description 0 Dec. 13 Initial Release of Data Sheet 1 Nov. 15 Maximum Ratings table: changed Drain--Source Voltage value from +1 to +1 to reflect the true performance of the device, p. 1 Off Characteristics: changed Drain--Source Breakdown Voltage minimum value from 1 to 1 to reflect the true performance of the device, p. 2 12

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