RF Power LDMOS Transistor N--Channel Enhancement--Mode Lateral MOSFET

Transcription

1 NX Semiconductors Technical Data Document Number: A3T19H455W23S Rev., 12/217 RF ower LDMOS Transistor N--Channel nhancement--mode Lateral MOSFT This 81 W asymmetrical Doherty RF power LDMOS transistor is designed for cellular base station applications requiring very wide instantaneous bandwidth capability covering the frequency range of 193 to 199 MHz. 19 MHz Typical Doherty Single--Carrier W--CDMA erformance: V DD =3Vdc, I DQA = 54 ma, V GSB =.Vdc, out = 81 W Avg., Input Signal AR = 9.9 robability on CCDF. Frequency G ps (db) Output AR (db) ACR (dbc) A3T19H455W23SR MHz, 81 W AVG., 3 V AIRFAST RF OWR LDMOS TRANSISTOR 193 MHz MHz MHz Features Advanced high performance in--package Doherty esigned for wide instantaneous bandwidth applications Greater negative gate--source voltage range for improved Class C operation Able to withstand extremely high output VSWR and broadband operating conditions esigned for digital predistortion error correction systems RF ina /V GSA AC -123S -4L2S Carrier 1 5 (1) VBW A (2) RF outa /V DSA RF inb /V GSB 2 4 RF outb /V DSB eaking (Top View) 3 VBW B (2) Figure 1. in Connections 1. in connections 4 and 5 are DC coupled and RF independent. 2. Device can operate with V DD current supplied through pin 3 and pin. 217 NX B.V. NX Semiconductors A3T19H455W23SR 1

2 Table 1. Maximum Ratings Rating Symbol Value Unit Drain--Source Voltage V DSS --.5, +5 Vdc Gate--Source Voltage V GS --., +1 Vdc Operating Voltage V DD 32, + Vdc Storage Temperature Range T stg --5 to +15 C Case Operating Temperature Range T C --4 to +15 C Operating Junction Temperature Range (1,2) T J --4 to +225 C CW T C =25 C when DC current is fed through pin 3 and pin Derate above 25 C Table 2. Thermal Characteristics CW W W/ C Characteristic Symbol Value (2,3) Unit Thermal Resistance, Junction to Case Case Temperature 81 C, 81 W Avg., W--CDMA, 3 Vdc, I DQA = ma, V GSB =. Vdc, 19 MHz Table 3. SD rotection Characteristics Test Methodology R JC.14 C/W Human Body Model (per JSD22--A114) 2 Charge Device Model (per JSD22--C11) Table 4. lectrical Characteristics (T A =25 C unless otherwise noted) Characteristic Symbol Min Typ Max Unit Class C3 Off Characteristics (4) Zero Gate Voltage Drain Leakage Current (V DS =5Vdc,V GS =Vdc) Zero Gate Voltage Drain Leakage Current (V DS =32Vdc,V GS =Vdc) Gate--Source Leakage Current (V GS =5Vdc,V DS =Vdc) On Characteristics - Side A, Carrier Gate Threshold Voltage (V DS =1Vdc,I D = 1 Adc) Gate Quiescent Voltage (V DD =3Vdc,I DA = 54 madc, Measured in Functional Test) Drain--Source On--Voltage (V GS =1Vdc,I D =1.Adc) I DSS 1 Adc I DSS 5 Adc I GSS 1 Adc V GS(th) Vdc V GSA(Q) Vdc V DS(on) Vdc On Characteristics - Side B, eaking Gate Threshold Voltage (V DS =1Vdc,I D = 3 Adc) Drain--Source On--Voltage (V GS =1Vdc,I D =3.Adc) V GS(th) Vdc V DS(on) Vdc 1. Continuous use at maximum temperature will affect MTTF. 2. MTTF calculator available at 3. Refer to AN1955, Thermal Measurement Methodology of RF ower Amplifiers. Go to and search for AN Side A and Side B are tied together for this measurement. (continued) A3T19H455W23SR 2 NX Semiconductors

3 Table 4. lectrical Characteristics (T A =25 C unless otherwise noted) (continued) Characteristic Symbol Min Typ Max Unit Functional Tests (1,2,3) (In NX Doherty Test Fixture, 5 ohm system) V DD =3Vdc,I DQA = 54 ma, V GSB =.Vdc, out =81WAvg., f = 199 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal AR = 9.9 robability on CCDF. ACR measured in 3.84 MHz Channel 5 MHzOffset. ower Gain G ps db Drain fficiency % 3 db Compression oint, CW 3dB dbm Adjacent Channel ower Ratio ACR dbc Load Mismatch (3) (In NX Doherty Test Fixture, 5 ohm system) I DQA = 54 ma, V GSB =. Vdc, f = 19 MHz, 12 sec(on), 1% Duty Cycle VSWR 1:1 at 32 Vdc, 49 W ulsed CW Output ower No Device Degradation (3 db Input Overdrive from 34 W ulsed CW Rated ower) Typical erformance (3) (In NX Doherty Test Fixture, 5 ohm system) V DD =3Vdc,I DQA = 54 ma, V GSB =.Vdc, MHz Bandwidth 3 db Compression oint (4) 3dB 541 W AM/M (Maximum value measured at the 3dB compression point across the MHz bandwidth) VBW Resonance oint (IMD Third Order Intermodulation Inflection oint) 9 VBW res 2 MHz Gain Flatness in MHz out =81WAvg. G F.3 db Gain Variation over Temperature ( C to+85 C) Output ower Variation over Temperature ( C to+85 C) G.9 db/ C 1dB.4 db/ C Table 5. Ordering Information Device Tape and Reel Information ackage A3T19H455W23SR R Suffix = 15 Units, 5 mm Tape Width, 13--inch Reel AC--123S--4L2S 1. V DDA and V DDB must be tied together and powered by a single DC power supply. 2. art internally matched both on input and output. 3. Measurements made with device in an asymmetrical Doherty configuration. 4. 3dB = avg + 7. db where avg is the average output power measured using an unclipped W--CDMA single--carrier input signal where output AR is compressed to 7. probability on CCDF. NX Semiconductors A3T19H455W23SR 3

4 D98988 V GGA C3 C4 C1 V DDA C7 C11 A3T19H455W23S Rev. C9 R1 C13 C15 C21 C23 R3 C18 Z1 C22 R4 C17 C1 C8 R2 C CUT OUT ARA C14 C19 C2 C24 C1 C12 C5 C C2 V GGB V DDB Note: V DDA and V DDB must be tied together and powered by a single DC power supply. Figure 2. A3T19H455W23SR Test Circuit Component Layout Table. A3T19H455W23SR Test Circuit Component Designations and Values art Description art Number Manufacturer C1, C2 47 F, 3 V lectrolytic Capacitor MCGR3V477M13X2-RH Multicomp C3, C4, C5, C 1 F Chip Capacitor C575X7S2A1M23KB TDK C7, C8 22 nf Chip Capacitor C12C224Z5VACTU Kemet C9, C1, C11, C12, C2 1 pf Chip Capacitor ATC1B1JT5XT ATC C13, C14 1 F Chip Capacitor C3225X7S1H1K TDK C15, C1, C17 1 pf Chip Capacitor ATCF1JT25XT ATC C pf Chip Capacitor ATCF8R2BT25XT ATC C pf Chip Capacitor ATC1B5R1CT5XT ATC C pf Chip Capacitor ATC1B1R3BW5XT ATC C22, C24.3 pf Chip Capacitor ATC1BR3BT5XT ATC C23.2 pf Chip Capacitor ATC1BR2BT5XT ATC R1, R2 3.3, 1/4 W Chip Resistor WCR12-3R3F Welwyn R3 5, 8 W Termination Chip Resistor C8A5Z4A Anaren R4, 1/4 W Chip Resistor CWCR85ZA Vishay Z MHz Band, 9, 2 db Directional Coupler X3C2F1-2S Anaren CB Rogers RO435B,.2, r =3. D98988 MTL A3T19H455W23SR 4 NX Semiconductors

5 G ps, OWR GAIN (db) TYICAL CHARACTRISTICS MHz V DD =3Vdc, out =81W(Avg.),I DQA = 54 ma, V GSB =.Vdc Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth G ps ARC ACR 15.2 Input Signal AR = % robability on CCDF f, FRQUNCY (MHz) Figure 3. Single -Carrier Output eak -to -Average Ratio Compression (ARC) Broadband out = 81 Watts Avg , DRAIN FFICINCY ACR (dbc) ARC (db) IMD, INTRMODULATION DISTORTION (dbc) V DD =3Vdc, out = 39 W (), I DQA = 54 ma V GSB =. Vdc, Two--Tone Measurements (f1 + f2)/2 = Center Frequency of 19 MHz IM5--L IM5--U IM7--L IM7--U TWO--TON SACING (MHz) IM3--U IM3--L Figure 4. Intermodulation Distortion roducts versus Two -Tone Spacing 3 G ps, OWR GAIN (db) OUTUT COMRSSION AT.1% ROBABILITY ON CCDF (db) 1 V DD =3Vdc,I DQA = 54 ma, V GSB =. Vdc, f = 19 MHz Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth Input Signal AR = 9.9 robability on CCDF G ps db = 53.3 W 5 db = 8.2 W 45 ACR db = W 4 ARC out, OUTUT OWR (WATTS) Figure 5. Output eak -to -Average Ratio Compression (ARC) versus Output ower 5 55 RAIN FFICINCY ACR (dbc) NX Semiconductors A3T19H455W23SR 5

6 TYICAL CHARACTRISTICS MHz G ps, OWR GAIN (db) V DD =3Vdc,I DQA = 54 ma, V GSB =.Vdc Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth G ps 19 MHz 199 MHz 199 MHz 193 MHz 19 MHz 193 MHz ACR 19 MHz 199 MHz 193 MHz , DRAIN FFICINCY 1 ACR (dbc) 8 1 Input Signal AR = 9.9 robability on CCDF out, OUTUT OWR (WATTS) AVG. Figure. Single -Carrier W -CDMA ower Gain, Drain fficiency and ACR versus Output ower V DD =3Vdc in =dbm I DQA = 54 ma V GSB =.Vdc Gain GAIN (db) f, FRQUNCY (MHz) Figure 7. Broadband Frequency Response A3T19H455W23SR NX Semiconductors

7 Table 7. Carrier Side Load ull erformance Maximum ower Tuning V DD =3Vdc,I DQA = 779 ma, ulsed CW, 1 sec(on), 1% Duty Cycle f (MHz) Z source Z in Max Output ower 1dB Z (1) load Gain (db) (dbm) (W) j j j j j j j j j AM/M f (MHz) Z source Z in Max Output ower 3dB Z (2) load Gain (db) (dbm) (W) j j7. 1. j j j j j j j (1) Load impedance for optimum 1dB power. (2) Load impedance for optimum 3dB power. Z source = Measured impedance presented to the input of the device at the package reference plane. Z in = Impedance as measured from gate contact to ground. Z load = Measured impedance presented to the output of the device at the package reference plane. Table 8. Carrier Side Load ull erformance Maximum fficiency Tuning V DD =3Vdc,I DQA = 779 ma, ulsed CW, 1 sec(on), 1% Duty Cycle f (MHz) Z source Z in Max Drain fficiency 1dB Z (1) load Gain (db) (dbm) (W) j j j j j j j j j AM/M AM/M f (MHz) Z source Z in Max Drain fficiency 3dB Z (2) load Gain (db) (dbm) (W) j j j j j j j j j (1) Load impedance for optimum 1dB efficiency. (2) Load impedance for optimum 3dB efficiency. Z source = Measured impedance presented to the input of the device at the package reference plane. Z in = Impedance as measured from gate contact to ground. Z load = Measured impedance presented to the output of the device at the package reference plane. AM/M Input Load ull Tuner and Test Circuit Device Under Test Output Load ull Tuner and Test Circuit Z source Z in Z load NX Semiconductors A3T19H455W23SR 7

8 Table 9. eaking Side Load ull erformance Maximum ower Tuning V DD =3Vdc,V GSB =. Vdc, ulsed CW, 1 sec(on), 1% Duty Cycle f (MHz) Z source Z in Max Output ower 1dB Z (1) load Gain (db) (dbm) (W) j j j j j. 2. j j j j AM/M f (MHz) Z source Z in Max Output ower 3dB Z (2) load Gain (db) (dbm) (W) j j j j j j j j j (1) Load impedance for optimum 1dB power. (2) Load impedance for optimum 3dB power. Z source = Measured impedance presented to the input of the device at the package reference plane. Z in = Impedance as measured from gate contact to ground. Z load = Measured impedance presented to the output of the device at the package reference plane. Table 1. eaking Side Load ull erformance Maximum fficiency Tuning V DD =3Vdc,V GSB =. Vdc, ulsed CW, 1 sec(on), 1% Duty Cycle f (MHz) Z source Z in Max Drain fficiency 1dB Z (1) load Gain (db) (dbm) (W) j j j j j j j j j AM/M AM/M f (MHz) Z source Z in Max Drain fficiency 3dB Z (2) load Gain (db) (dbm) (W) j j j j j j j j j (1) Load impedance for optimum 1dB efficiency. (2) Load impedance for optimum 3dB efficiency. Z source = Measured impedance presented to the input of the device at the package reference plane. Z in = Impedance as measured from gate contact to ground. Z load = Measured impedance presented to the output of the device at the package reference plane. AM/M Input Load ull Tuner and Test Circuit Device Under Test Output Load ull Tuner and Test Circuit Z source Z in Z load A3T19H455W23SR 8 NX Semiconductors

9 1dB TYICAL CARRIR SID LOAD ULL CONTOURS 19 MHz IMAGINARY RAL IMAGINARY RAL Figure 8. 1dB Load ull Output ower Contours (dbm) Figure 9. 1dB Load ull fficiency Contours IMAGINARY IMAGINARY RAL 4 2 RAL Figure 1. 1dB Load ull Gain Contours (db) Figure 11. 1dB Load ull AM/M Contours NOT: = Maximum Output ower Gain Drain fficiency Linearity Output ower = Maximum Drain fficiency NX Semiconductors A3T19H455W23SR 9

10 3dB TYICAL CARRIR SID LOAD ULL CONTOURS 19 MHz IMAGINARY IMAGINARY RAL RAL Figure 12. 3dB Load ull Output ower Contours (dbm) Figure 13. 3dB Load ull fficiency Contours IMAGINARY IMAGINARY RAL RAL Figure 14. 3dB Load ull Gain Contours (db) Figure 15. 3dB Load ull AM/M Contours NOT: = Maximum Output ower Gain Drain fficiency Linearity Output ower = Maximum Drain fficiency A3T19H455W23SR 1 NX Semiconductors

11 1dB TYICAL AKING SID LOAD ULL CONTOURS 19 MHz IMAGINARY IMAGINARY RAL RAL Figure 1. 1dB Load ull Output ower Contours (dbm) Figure 17. 1dB Load ull fficiency Contours IMAGINARY IMAGINARY RAL RAL Figure 18. 1dB Load ull Gain Contours (db) Figure 19. 1dB Load ull AM/M Contours NOT: = Maximum Output ower Gain Drain fficiency Linearity Output ower = Maximum Drain fficiency A3T19H455W23SR NX Semiconductors 11

12 3dB TYICAL AKING SID LOAD ULL CONTOURS 19 MHz IMAGINARY IMAGINARY RAL RAL Figure 2. 3dB Load ull Output ower Contours (dbm) Figure 21. 3dB Load ull fficiency Contours IMAGINARY IMAGINARY RAL RAL Figure 22. 3dB Load ull Gain Contours (db) Figure 23. 3dB Load ull AM/M Contours NOT: = Maximum Output ower Gain Drain fficiency Linearity Output ower = Maximum Drain fficiency A3T19H455W23SR 12 NX Semiconductors

13 ACKAG DIMNSIONS NX Semiconductors A3T19H455W23SR 13

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15 RODUCT DOCUMNTATION, SOFTWAR AND TOOLS Refer to the following resources to aid your design process. Application Notes AN198: Solder Reflow Attach Method for High ower RF Devices in Air Cavity ackages AN1955: Thermal Measurement Methodology of RF ower Amplifiers ngineering Bulletins B212: Using Data Sheet Impedances for RF LDMOS Devices Software lectromigration MTTF Calculator RF High ower Model.s2p File Development Tools rinted Circuit Boards To Download Resources Specific to a Given art Number: 1. Go to 2. Search by part number 3. Click part number link 4. Choose the desired resource from the drop down menu The following table summarizes revisions to this document. RVISION HISTORY Revision Date Description Dec. 217 Initial release of data sheet NX Semiconductors A3T19H455W23SR 15

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