LCS68P03. PARAMETER SYMBOL VALUE UNIT Drain-Source Voltage V DSS -30 V Gate-Source Voltage V GS ±12 V

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1 General Description The is the P-Channel logic enhancement mode power field effect transistors. These devices are particularly suited for low voltage application such as cellular phone and notebook computer power management and other battery powered circuits where high-side switching and low in-line power loss are needed in a very small outline surface mount package. B VDSS =-30V, R DS(ON) 68mΩ@V GS =-10V R DS(ON) 80mΩ@V GS =-4.5V R DS(ON) 100mΩ@V GS =-2.5V I D =-3.6A Features Super high density cell design for extremely low R DS(ON) Exceptional on-resistance and maximum DC current capability Weight: g Moisture Sensitivity Level 3 per J-STD-020 Marking: WSA Qualified to MIL-STD-750E RoHS Compliant D:Drain G:Gate S:Source (SOT-23) Top View Application Power Management Notebook Portable Equipment Load Switch Battery Powered System DSC Absolute Maximum Ratings (T A =25 C Unless Otherwise Noted) PARAMETER SYMBOL VALUE UNIT Drain-Source Voltage V DSS -30 V Gate-Source Voltage V GS ±12 V Continuous Drain Current T A =25 C -3.6 T A =70 C Pulsed Drain Current I DM -14 A Power Dissipation I D -2.9 T A =25 C 1.4 T A =70 C Operating Junction and Storage Temperature Range T J, T stg -55 to150 C Thermal Characteristics PARAMETER SYMBOL TYP UNIT Thermal Resistance Junction-to-Ambient 1 R thja 100 C /W P D 1.0 A W Rev.2, Aug. 2016, KSKR24 1

2 Electrical Characteristics (T A =25 C Unless Otherwise Specified) PARAMETER TEST CONDITION SYMBOL MIN TYP MAX UNIT STATIC Drain-Source Breakdown Voltage V GS =0V,I D =-250uA BV DSS V Gate Threshold Voltage V DS =V GS,I D =-250uA V GS(th) V Gate-Source Leakage V DS =0V, V GS =±12V I GSS ±100 na Zero Gate Voltage Drain Current V DS =-24V,V GS =0V I DSS ua V GS =-10V,I D =-4.2A Drain-Source On-Resistance 2 R DS(ON) V GS =-4.5V,I D =-4A mω V GS =-2.5V,I D =-2A DYNAMIC Total Gate Charge Q g Gate-Source Charge V GS =-4.5V,V DS =-15V, I D =-4A Q gs Gate-Drain Charge Q gd Input Capacitance C iss Output Capacitance V GS =0V,V DS =-15V, F=1MHz C oss Reverse Transfer Capacitance C rss nc pf Turn-On Delay Time t d(on) Turn-On Rise Time V GS = -10V, V DS = -15V, t r Turn-Off Delay Time R G = 6Ω, R L =3.6Ω, t d(off) ns Turn-Off Fall Time t f Source-Drain Diode Diode Forward voltage I SD =-1.25A,V GS =0V V SD V Notes: (1). The device mounted on 1in 2 FR4 board with 2 oz copper (2). Pulse test: Pulse width 300us, duty cycle 2%, guaranteed by design, not subject to production testing. (3). LiteON Semiconductor reserves the right to improve product design, functions and reliability without notice Rev.2, Aug. 2016, KSKR24 2

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5 Package Outline Dimension SOT-23 SOT-23 DIM MIN MAX A B C D G H J K L S V All Dimensions in millimeter Marking information Marking WSA4A Date code Rev.2, Aug. 2016, KSKR24 5

6 Packaging Information DEVICE Q'TY/REEL (PCS) REEL DIA. (mm) BOX SIZE (cm) Q'TY/BOX (PCS) CARTON SIZE (cm) Q'TY/CARTON (PCS) X19X14 30K 40X40X35 240K Embossed Carrier Dimensions Information TAPE SIZE A B C D E F Co Eo Unit 4.00± ±0.05 Ф ± ± ± mm G H T Ao Ko Bo Do mm /-0.10 Ф ± ± ± ± Rev.2, Aug. 2016, KSKR24 6

7 Important Notice and Disclaimer LSC reserves the right to make changes to this document and its products and specifications at any time without notice. Customers should obtain and confirm the latest product information and specifications before final design, purchase or use. LSC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does LSC assume any liability for application assistance or customer product design. LSC does not warrant or accept any liability with products which are purchased or used for any unintended or unauthorized application. No license is granted by implication or otherwise under any intellectual property rights of LSC. LSC products are not authorized for use as critical components in life support devices or systems without express written approval of LSC Rev.2, Aug. 2016, KSKR24 7