P-Channel Enhancement Mode Field Effect Transistor

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1 Description The uses advanced trench technology to provide excellent R DS(ON), low gate charge and operation with gate voltages as low as 2.5V. This device is suitable for use as a load switch or in PWM applications. Standard product is Pb-free (meets ROHS & Sony 259 specifications). Features V DS (V) = -30V I D = -4.0 A (V GS = -10V) R DS(ON) < 50mΩ (V GS = -10V) R DS(ON)< 65mΩ (V GS = -4.5V) R DS(ON)< 120mΩ (V GS = -2.5V) Absolute Maximum Ratings ( T A=25, unless otherwise noted ) Parameter Symbol Maximum Units Drain-Source Voltage V DS -30 V Gate-Source Voltage V GS ±12 V T Continuous Drain Current NOTEA A = I D T A = A Pulsed Drain Current NOTEB I DM -25 T Power Dissipation NOTEA A = P D T A =70 1 W Junction and Storage Temperature Range T J, T STG -55 to 150 Packaging Type SOT-23 Package Marking and Ordering Information Device Marking Device Device Package Reel Size Tape width Quantity 3401 SOT-23 Ø180mm 8mm 3000 units XX + H Halogen - free Pb - free BM : SOT-23 VER 1.1 1

2 Electrical Characteristics (T A =25 unless ) otherwise noted Symbol Parameter Conditions Min Typ Max Units STATIC PARAMETERS BV DSS Drain-Source Breakdown Voltage I D =-250μA, V GS =0V -30 V I DSS Zero Gate Voltage Drain Current V DS =-24V, V GS =0V -1 T J =55 C -5 μa I GSS Gate-Body leakage current V DS =0V, V GS =±12V ±100 na V GS(th) Gate Threshold Voltage V DS =V GS I D =-250μA V I D(ON) On state drain current V GS =-4.5V, V DS =-5V -25 A VG S =-10V, I D =-4.2A mω TJ=125 C 75 R DS(ON) Static Drain-Source On-Resistance V GS =-4.5V, I D =-4A mω V GS =-2.5V, I D =-1A mω g FS Forward Transconductance V DS =-5V, I D =-5A 7 11 S V SD Diode Forward Voltage I S =-1A,V GS =0V V I S Maximum Body-Diode Continuous Current -2.2 A I SM Pulsed Body-Diode CurrentB -30 A DYNAMIC PARAMETERS C iss Input Capacitance 954 pf V GS =0V,V DS =-15V, C oss Output Capacitance 115 pf f=1mhz C rss Reverse Transfer Capacitance 77 pf R g Gate resistance V GS =0V, V DS =0V, f=1mhz 6 Ω SWITCHING PARAMETERS Qg Total Gate Charge 9.4 nc V GS =-4.5V, V DS =-15V, Qgs Gate Source Charge 2 nc I D =-4A Qgd Gate Drain Charge 3 nc td(on) Turn-On DelayTime 6.3 μs tr Turn-On Rise Time V GS =-10V, V DS =-15V, 3.2 μs td(off) Turn-Off DelayTime R L =3.6Ω, R GEN =6Ω 38.2 μs tf Turn-Off Fall Time 12 μs trr Body Diode Reverse Recovery Time I F =-4A, di/dt=100a/μs 20.2 μs Qrr Body Diode Reverse Recovery Charge I F =-4A, di/dt=100a/μs 11.2 nc Note: A: The value of R θja is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25 C. The value in any a given application depends on the user's specific board design. The current rating is based on the t 10s thermal resistance rating. B: Repetitive rating, pulse width limited by junction temperature. C. The R θja is the sum of the thermal impedence from junction to lead R θjl and lead to ambient. D. The static characteristics in Figures 1 to 6,12,14 are obtained using <300 μs pulses, duty cycle 0.5% max. E. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with T A=25 VER 1.1 2

3 Typical Performance Characteristics Figure 1 On-Region Characteristics Figure 2 Transfer Characteristics Figure 3 On-Resistance vs. Drain Current and Gate Voltage Figure 4 On-Resistance vs. Junction Temperature Figure 5 On-Resistance vs. Gate-Source Voltage Figure 6 Body-Diode Characteristics VER 1.1 3

4 Typical Performance Characteristics Figure 7 Gate-Charge Characteristics Figure 8 Capacitance Characteristics Figure 9 Maximum Forward Biased Figure 10 Single Pulse Power Rating Safe Operating Area (Note E) Junction-to- Ambient (Note E) Figure 11 Normalized Maximum Transient Thermal Impedance VER 1.1 4

5 Thermal Characteristics Parameter Symbol Typ Max Units Maximum Junction-to-Ambient A t 10S R θja /W Maximum Junction-to-Ambient A Steady-State /W Maximum Junction-to-Lead C Steady-State R θjl /W Packing Information SOT-23 VER 1.1 5

6 Notes 1. All dimensions are in millimeters. 2. Tolerance ±0.10mm (4 mil) unless otherwise specified 3. Package body sizes exclude mold flash and gate burrs. Mold flash at the non-lead sides should be less than 5 mils. 4. Dimension L is measured in gauge plane. 5. Controlling dimension is millimeter, converted inch dimensions are not necessarily exact. ACE Technology Co., LTD. VER 1.1 6

Gate-Body Leakage Current I GSS V GS =±20V,V DS =0V - - ±100 na (Note 3) On Characteristics Gate Threshold Voltage V GS(th) V DS =V GS,I D =250μA 1.2

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