P-Channel Enhancement Mode Power MOSFET
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- Ashlyn Bishop
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1 DESCRIPTION The uses advanced trench technology to provide excellent R DS(ON), low gate charge and operation with gate voltages as low as 4.5V. This device is suitable for use as a load switch or in PWM applications. G1 D1 S1 G2 D2 S2 GENERAL FEATURES V DS = -30V,I D = -5.1A R DS(ON) < V GS =-4.5V R DS(ON) < V GS =-10V Schematic diagram High Power and current handing capability Lead free product is acquired Surface Mount Package Marking and pin Assignment Application PWM applications Load switch Power management SOP-8 top view Package Marking And Ordering Information Device Marking Device Device Package Reel Size Tape width Quantity SOP-8 Ø330mm 12mm 2500 units Absolute Maximum Ratings (TA=25 unless otherwise noted) Parameter Symbol Limit Unit Drain-Source Voltage VDS -30 V Gate-Source Voltage VGS ±20 V Drain Current-Continuous I D -5.1 A Drain Current-Pulsed (Note 1) I DM -20 A Maximum Power Dissipation P D 2.5 W Operating Junction and Storage Temperature Range T J,T STG -55 To 150 Thermal Characteristic Thermal Resistance,Junction-to-Ambient (Note 2) R θja 50 /W Electrical Characteristics (TA=25 unless otherwise noted) Off Characteristics Parameter Symbol Condition Min Typ Max Unit Drain-Source Breakdown Voltage BV DSS V GS =0V I D =-250μA -30 V Zero Gate Voltage Drain Current I DSS V DS =-24V,V GS =0V -1 μa 1
2 Gate-Body Leakage Current I GSS V GS =±20V,V DS =0V ±100 na On Characteristics (Note 3) Gate Threshold Voltage V GS(th) V DS =V GS,I D =-250μA -1-3 V Drain-Source On-State Resistance R DS(ON) V GS =-10V, I D =-5.1A 53 mω V GS =-4.5V, I D =-4.2A 85 mω Forward Transconductance g FS V DS =-15V,I D =-4.5A 4 7 S Dynamic Characteristics (Note4) Input Capacitance C lss 1040 PF V DS =-15V,V GS =0V, Output Capacitance C oss 420 PF F=1.0MHz Reverse Transfer Capacitance C rss 150 PF Switching Characteristics (Note 4) Turn-on Delay Time t d(on) 15 ns Turn-on Rise Time t r V DD =-15V, ID=-1A, 13 ns Turn-Off Delay Time t d(off) V GS =-10V,R GEN =6Ω 58 ns Turn-Off Fall Time t f 21 ns Total Gate Charge Q g 12 nc Gate-Source Charge Q gs V DS =-15V,I D =-5.1A,V GS =-10V 2.2 nc Gate-Drain Charge Q gd 3 nc Drain-Source Diode Characteristics Diode Forward Voltage (Note 3) V SD V GS =0V,I S =-1.7A -1.2 V Notes: 1. Repetitive Rating: Pulse width limited by maximum junction temperature. 2. Surface Mounted on FR4 Board, t 10 sec. 3. Pulse Test: Pulse Width 300μs, Duty Cycle 2%. 4. Guaranteed by design, not subject to production 2
3 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS t d(on) t on t r t d(off) t off t f V OUT INVERTED V IN 50% 50% PULSE WIDTH Figure 1:Switching Test Circuit Figure 2:Switching Waveforms ID- Drain Current (A) PD Power(W) Figure 3 Power Dissipation Rdson On-Resistance(mΩ) ID- Drain Current (A) Figure 4 Drain Current Figure 5 Output CHARACTERISTICS I D - Drain Current (A) Figure 6 Drain-Source On-Resistance 3
4 Rdson On-Resistance(mΩ) ID- Drain Current (A) Figure 7 Transfer Characteristics Figure 9 Rdson vs Vgs Is- Reverse Drain Current (A) C Capacitance (pf) Normalized On-Resistance Figure 8 Drain-Source On-Resistance Figure 10 Capacitance vs Vds Qg Gate Charge (nc) Figure 11 Gate Charge Vsd Source-Drain Voltage (V) Figure 12 Source- Drain Diode Forward 4
5 r(t),normalized Effective Transient Thermal Impedance ID- Drain Current (A) Figure 13 Safe Operation Area Square Wave Pluse Duration(sec) Figure 14 Normalized Maximum Transient Thermal Impedance 5
PJM8205DNSG Dual N Enhancement Field Effect Transistor
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