AP6900GSM-HF Halogen-Free Product Advanced Power DUAL N-CHANNEL MOSFET WITH Electronics Corp.
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1 AP69GSM-HF Halogen-Free Product Advanced Power DUAL N-CHANNEL MOSFET WITH Electronics Corp. SCHOTTKY DIODE S/D2 Simple Drive Requirement CH- BV DSS 3V S/D2 DC-DC Converter Suitable R DS(ON) 3mΩ G S/D2 Fast Switching Performance I D 5.7A S2/A RoHS Compliant CH-2 BV DSS 3V SO-8 D DG2 R DS(ON) 22mΩ Description I D 9.8A Advanced Power MOSFETs from APEC provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. D The SO-8 package is widely preferred for all commercial-industrial surface mount applications and suited for low voltage applications such as DC/DC converters. G N-Channel MOSFET S/D2 G2 Schottky Diode Absolute Maximum Ratings Symbol Parameter Rating Units Channel-2 V DS Drain-Source Voltage 3 3 V V GS Gate-Source Voltage ±2 ±2 V I A =25 Continuous Drain Current A I A =7 Continuous Drain Current A I DM Pulsed Drain Current 2 3 A P A =25 Total Power Dissipation W Linear Derating Factor..2 W/ T STG Storage Temperature Range -55 to 5 T J Operating Junction Temperature Range -55 to 5 Thermal Data N-Channel 2 MOSFET Channel- Symbol Parameter Value Units Typ. Max. Rthj-a (CH-) Thermal Resistance Junction-ambient /W Rthj-a (CH-2) Thermal Resistance Junction-ambient /W S2/A Data and specifications subject to change without notice 28553
2 AP69GSM-HF CH- Electrical j =25 o C(unless otherwise specified) BV DSS Drain-Source Breakdown Voltage V GS =V, I D =25uA V ΔBV DSS /ΔT j Breakdown Voltage Temperature Coefficient Reference to 25, I D =ma -. - V/ R DS(ON) Static Drain-Source On-Resistance 2 V GS =V, I D =5A mω V GS =, I D =3A mω V GS(th) Gate Threshold Voltage V DS =V GS, I D =25uA - 3 V g fs Forward Transconductance V DS =V, I D =5A S I DSS Drain-Source Leakage Current V DS =3V, V GS =V - - ua Drain-Source Leakage Current (T j =7 o C) V DS =24V, V GS =V ua I GSS Gate-Source Leakage V GS =±2V - - ± na Q g Total Gate Charge 2 I D =6A nc Q gs Gate-Source Charge V DS =24V nc Q gd Gate-Drain ("Miller") Charge V GS = nc t d(on) Turn-on Delay Time 2 V DS =5V ns t r Rise Time I D =A ns t d(off) Turn-off Delay Time R G =3.3Ω,V GS =V ns t f Fall Time R D =5Ω ns C iss Input Capacitance V GS =V pf C oss Output Capacitance V DS =25V pf C rss Reverse Transfer Capacitance f=.mhz pf R g Gate Resistance f=.mhz Ω Source-Drain Diode V SD Forward On Voltage 2 I S =.2A, V GS =V V t rr Reverse Recovery Time 2 I S =6A, V GS =V ns Q rr Reverse Recovery Charge di/dt=a/µs - - nc 2
3 AP69GSM-HF CH-2 Electrical j =25 o C(unless otherwise specified) BV DSS Drain-Source Breakdown Voltage V GS =V, I D =25uA V ΔBV DSS /ΔT j Breakdown Voltage Temperature Coefficient Reference to 25,I D =ma -. - V/ R DS(ON) Static Drain-Source On-Resistance 2 V GS =V, I D =9A mω V GS =, I D =7A mω V GS(th) Gate Threshold Voltage V DS =V GS, I D =25uA - 3 V g fs Forward Transconductance V DS =V, I D =9A - - S I DSS Drain-Source Leakage Current V DS =3V, V GS =V - - ua Drain-Source Leakage Current (T j =7 o C) V DS =24V, V GS =V - - ma I GSS Gate-Source Leakage V GS =±2V - - ± na Q g Total Gate Charge 2 I D =7A nc Q gs Gate-Source Charge V DS =24V nc Q gd Gate-Drain ("Miller") Charge V GS =V nc t d(on) Turn-on Delay Time 2 V DS =2V - - ns t r Rise Time I D =A ns t d(off) Turn-off Delay Time R G =5.7Ω,V GS =V ns t f Fall Time R D =2Ω ns C iss Input Capacitance V GS =V pf C oss Output Capacitance V DS =25V pf C rss Reverse Transfer Capacitance f=.mhz pf R g Gate Resistance f=.mhz Ω Source-Drain Diode V SD Forward On Voltage 2 I S =2.6A, V GS =V V t rr Reverse Recovery Time 2 Is=7A, V GS =V, ns Q rr Reverse Recovery Charge di/dt=a/µs nc Notes:.Pulse width limited by Max. junction temperature. 2.Pulse test 3.Surface mounted on in 2 copper pad of FR4 board, t < sec. THIS PRODUCT IS SENSITIVE TO ELECTROSTATIC DISCHARGE, PLEASE HANDLE WITH CAUTION. USE OF THIS PRODUCT AS A CRITICAL COMPONENT IN LIFE SUPPORT OR OTHER SIMILAR SYSTEMS IS NOT AUTHORIZED. APEC DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. APEC RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. 3
4 AP69GSM-HF Schottky j =25 o C(unless otherwise specified) V F Forward Voltage Drop I F =.A V I rm Maximum Reverse Leakage Current V r =3V ma Maximum Reverse Leakage Current V r =3V,T j = -.5 ma C T Junction Capacitance V r =V pf 4
5 AP69GSM-HF Channel- 4 4 V 7.V T A =5 o C V 7.V I D, Drain Current (A) V I D, Drain Current (A) V V G =3.V V G =3.V Fig. Typical Output Characteristics Fig 2. Typical Output Characteristics I D =3A.4 I D =5A V G =V R DS(ON) (mω) 3 26 Normalized R DS(ON) V GS, Gate-to-Source Voltage (V) T j, Junction Temperature ( o C) Fig 3. On-Resistance v.s. Gate Voltage Fig 4. Normalized On-Resistance v.s. Junction Temperature I S (A) T j =5 o C T j =25 o C Normalized V GS(th) (V) V SD, Source-to-Drain Voltage (V) T j,junction Temperature ( o C) Fig 5. Forward Characteristic of Fig 6. Gate Threshold Voltage v.s. Reverse Diode Junction Temperature 5
6 Channel- 2 AP69GSM-HF f=.mhz V GS, Gate to Source Voltage (V) I D =6A V DS =24V C (pf) C iss C oss C rss Q G, Total Gate Charge (nc) Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics I D (A). Single Pulse ms ms ms s s DC Normalized Thermal Response (R thja ).. Duty factor= Single Pulse P DM t T Duty factor = t/t Peak T j = P DM x R thja + T a R thja =35 /W t, Pulse Width (s) Fig 9. Maximum Safe Operating Area Fig. Effective Transient Thermal Impedance V DS 9% V G Q G % V GS Q GS Q GD t d(on) t r t d(off)t f Charge Q Fig. Switching Time Waveform Fig 2. Gate Charge Waveform 6
7 AP69GSM-HF Channel I D, Drain Current (A) 5 V 7.V 5.V I D, Drain Current (A) 5 T A =5 o C V 7.V 5.V 5 V G = 3.V 5 V G = 3.V 2 3 Fig. Typical Output Characteristics 2 3 Fig 2. Typical Output Characteristics R DS(ON) (mω) I D =7A Normalized R DS(ON) I D =9A V G =V V GS,Gate-to-Source Voltage (V) Fig 3. On-Resistance v.s. Gate Voltage T j, Junction Temperature ( o C) Fig 4. Normalized On-Resistance v.s. Junction Temperature.2. I S (A). T j =5 o C T j =25 o C Normalized V th (V) V SD, Source-to-Drain Voltage (V) T j, Junction Temperature ( o C) Fig 5. Forward Characteristic of Fig 6. Gate Threshold Voltage v.s. Reverse Diode Junction Temperature 7
8 Channel-2 V GS, Gate to Source Voltage (V) I D =7A V DS =24V C (pf) AP69GSM-HF f=.mhz C iss C oss C rss Q G, Total Gate Charge (nc) Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics Duty factore=.5 I D (A). Single Pulse ms ms ms s DC Normalized Thermal Response (R thja ) Single Pulse P DM t T Duty factor = t/t Peak T j = P DM x R thja + T a R thja=35 /W t, Pulse Width (s) Fig 9. Maximum Safe Operating Area Fig. Effective Transient Thermal Impedance V DS 9% V G Q G Q GS Q GD % V GS t d(on) t r t d(off) t f Charge Q Fig. Switching Time Waveform Fig 2. Gate Charge Waveform 8
9 Schottky AP69GSM-HF I R, Reverse Current (ma).. 3V 24V I F, Forward Current (A) T j =5 o C T j =25 o C T j, Junction Temperature ( o C) Fig. Reverse Current vs Junction Temperature V F, Forward Voltage Drop (V) Fig 2. Typical Forward Characteristics f=.mhz C,Capacitance (pf) Fig 3. Typical Junction Capacitance 9
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More informationTO-220 G. T C = 25 C unless otherwise noted. Drain-Source Voltage 80 V. Symbol Parameter MSP120N08G Units R θjc
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Description uses advanced trench technology to provide excellent R DS(ON). This device particularly suits for low voltage application such as power management of desktop computer or notebook computer power
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FEATURES Trench Power MOSFET Technology Low R DS(ON) Low Gate Charge Optimized For Fast-switching Applications TTD12N3AT, TTP12N3AT 3V N-Channel Trench MOSFET APPLICATIONS Synchronous Rectification in
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FEATURES Trench Power MOSFET Technology Low R DS(ON) Low Gate Charge Optimized For Fast-switching Applications 40V N-Channel Trench MOSFET APPLICATIONS Synchronous Rectification in DC/DC and AC/DC Converters
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