MARKING DIAGRAMS MAXIMUM RATINGS

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1 Sensitive Gate Silicon Controlled Rectifiers Reverse Blocking Thyristors Designed for high volume, low cost, industrial and consumer applications such as motor control; process control; temperature, light and speed control; CDI (Capacitive Discharge Ignition); and small engines. Features Small Size Passivated Die for Reliability and Uniformity Low Level Triggering and olding Characteristics Epoxy Meets UL 9 25 in ESD Ratings: uman Body Model, 3B 8000 V Machine Model, C 00 V These are PbFree Devices SCRs 12 MPERES RMS VOLTS Littelfuse.com G K MRKING DIGRMS MXIMUM RTINGS (T J = 25 C unless otherwise noted) Rating Symbol Value Unit Peak Repetitive OffState Voltage (Note 1) (T J = 0 to 1 C, Sine Wave, 50 z to V DRM, V RRM V 60 z) MCR12DSM 600 MCR12DSN 800 OnState RMS Current (180 Conduction ngles; T C = 75 C) verage OnState Current (180 Conduction ngles; T C = 75 C) Peak Non-Repetitive Surge Current (1/2 Cycle, Sine Wave 60 z, T J = 1 C) I T(RMS) 12 I T(V) 7.6 I TSM DPK CSE 369C STYLE IPK CSE 369D STYLE YWW R1 2DSxG YWW R1 2DSxG Circuit Fusing Consideration (t = 8.3 msec) I 2 t 1 2 sec Forward Peak Gate Power (Pulse Width sec, T C = 75 C) Forward verage Gate Power (t = 8.3 msec, T C = 75 C) P GM 5.0 W P G(V) 0.5 W Y WW R12DSx G = Year = Work Week = Device Code x= M or N = PbFree Package Forward Peak Gate Current (Pulse Width sec, T C = 75 C) I GM 2.0 Operating Range T J 0 to 1 C Storage Temperature Range T stg 0 to 150 C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. V DRM and V RRM for all types can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; however, positive gate voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the device are exceeded. PIN SSIGNMENT 1 Cathode 2 node 3 Gate node ORDERING INFORMTION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. September 19, 2016 Rev. 7 1 Publication Order Number:

2 TERML CRCTERISTICS Thermal Resistance, JunctiontoCase Thermal Resistance Junctiontombient Thermal Resistance Junctiontombient (Note 2) Characteristic Symbol Max Unit Maximum Lead Temperature for Soldering Purposes (Note 3) T L 260 C R JC R J R J C/W ELECTRICL CRCTERISTICS (T J = 25 C unless otherwise noted) OFF CRCTERISTICS Characteristics Symbol Min Typ Max Unit Peak Repetitive Forward or Reverse Blocking Current (Note ) (V K = Rated V DRM or V RRM ; R GK = K ) T J = 25 C T J = 1 C ON CRCTERISTICS Peak Reverse Gate Blocking Voltage, (I GR = ) V GRM V Peak Reverse Gate Blocking Current, (V GR = V) I GRM 1.2 Peak Forward OnState Voltage (Note 5), (I TM = 20 ) V TM V Gate Trigger Current (Continuous dc) (Note 6) (V D = 12 V, R L = 0 ) T J = 25 C T J = 0 C Gate Trigger Voltage (Continuous dc) (Note 6) (V D = 12 V, R L = 0 ) T J = 25 C T J = 0 C T J = 1 C olding Current (V D = 12 V, Initiating Current = 200 m, R GK = 1 k ) T J = 25 C T J = 0 C Latching Current (V D = 12 V, I G = 2.0 m, R GK = 1 k ) T J = 25 C T J = 0 C TurnOn Time (Source Voltage = 12 V, R S = K, I T = 16 (pk), R GK = K ) (V D = Rated V DRM, Rise Time = 20 ns, Pulse Width = s) DYNMIC CRCTERISTICS Critical Rate of Rise of OffState Voltage (V D = 0.67 x Rated V DRM, Exponential Waveform, R GK = K, T J = 1 C) I DRM, I RRM I GT 5.0 V GT I 0.5 I L 0.5 tgt dv/dt Critical Rate of Rise of OnState Current di/dt / s (I PK = 50, P W = 0 sec, dig/dt = 1 / sec, I GT = m) These ratings are applicable when surface mounted on the minimum pad sizes recommended. 3. 1/8 from case for seconds.. Ratings apply for negative gate voltage or R GK = k. Devices shall not have a positive gate voltage concurrently with a negative voltage on the anode. Devices should not be tested with a constant current source for forward and reverse blocking capability such that the voltage applied exceeds the rated blocking voltage. 5. Pulse Test: Pulse Width 2.0 msec, Duty Cycle 2%. 6. R GK current not included in measurement. V m m s V/ s September 19, 2016 Rev. 7 2 Publication Order Number:

3 Voltage Current Characteristic of SCR + Current node + Symbol V DRM I DRM V RRM I RRM V TM I Parameter Peak Repetitive Off State Forward Voltage Peak Forward Blocking Current Peak Repetitive Off State Reverse Voltage Peak Reverse Blocking Current Peak On State Voltage olding Current I RRM at V RRM on state Reverse Blocking Region (off state) Reverse valanche Region V TM I + Voltage I DRM at V DRM Forward Blocking Region (off state) node T C, MXIMUM LLOWBLE CSE TEMPERTURE ( C) dc 180 (V), VERGE POWER DISSIPTION (WTTS) 75 = Conduction 2.0 ngle = I T(V), VERGE ON-STTE CURRENT (MPS) I T(V), VERGE ON-STTE CURRENT (MPS) P = Conduction ngle = dc Figure 1. verage Current Derating Figure 2. OnState Power Dissipation September 19, 2016 Rev. 7 3 Publication Order Number:

4 I I MCR12DSM, MCR12DSN, INSTNTNEOUS ON-STTE CURRENT (MPS) T 0 0 T J = 25 C T J = 1 C T J = 25 C r (t), TRNSIENT TERML RESISTNCE (NORMLIZED) Z JC(t) = R JC(t) r(t) K V T, INSTNTNEOUS ON-STTE VOLTGE (VOLTS) t, TIME (ms) Figure 3. OnState Characteristics Figure. Transient Thermal Response 00 I GT, GTE TRIGGER CURRENT ( ) 0-0 R GK = K GTE OPEN V GT, GTE TRIGGER VOLTGE (VOLTS) T J, JUNCTION TEMPERTURE ( C) T J, JUNCTION TEMPERTURE ( C) Figure 5. Typical Gate Trigger Current versus Figure 6. Typical Gate Trigger Voltage versus R GK = K R GK = K I, OLDING CURRENT (m), LTCING CURRENT (m) L T J, JUNCTION TEMPERTURE ( C) T J, JUNCTION TEMPERTURE ( C) Figure 7. Typical olding Current versus Figure 8. Typical Latching Current versus September 19, 2016 Rev. 7 Publication Order Number:

5 I MCR12DSM, MCR12DSN T J = 25 C 00, OLDING CURRENT (m) I GT = 25 I GT = STTIC dv/dt (V/ s) 0 70 C 90 C T J = 1 C K 0 00 R GK, GTE-CTODE RESISTNCE (OMS) R GK, GTE-CTODE RESISTNCE (OMS) Figure 9. olding Current versus GateCathode Resistance Figure. Exponential Static dv/dt versus GateCathode Resistance and Junction Temperature V T J = 1 C 00 V D = 800 V T J = 1 C STTIC dv/dt (V/ s) V V PK = 800 V STTIC dv/dt (V/ s) 0 I GT = 25 I GT = R GK, GTE-CTODE RESISTNCE (OMS) R GK, GTE-CTODE RESISTNCE (OMS) Figure 11. Exponential Static dv/dt versus GateCathode Resistance and Peak Voltage Figure 12. Exponential Static dv/dt versus GateCathode Resistance and Gate Trigger Current Sensitivity ORDERING INFORMTION MCR12DSMTG Device Package Type Package Shipping DPK (PbFree) 369C 2500 / Tape & Reel MCR12DSN1G IPK (PbFree) 369D 75 Units / Rail MCR12DSNTG DPK (PbFree) 369C 2500 / Tape & Reel September 19, 2016 Rev. 7 5 Publication Order Number:

6 PCKGE DIMENSIONS DPK (SINGLE GUGE) CSE 369C ISSUE D L3 L b2 e E b b D B DETIL c (3) M C C c2 L2 GUGE PLNE L L1 DETIL ROTTED 90 CW 1 C NOTES: 1. DIMENSIONING ND TOLERNCING PER SME Y1.5M, CONTROLLING DIMENSION: INCES. 3. TERML PD CONTOUR OPTIONL WITIN DI- MENSIONS b3, L3 and Z.. DIMENSIONS D ND E DO NOT INCLUDE MOLD FLS, PROTRUSIONS, OR BURRS. MOLD FLS, PROTRUSIONS, OR GTE BURRS SLL NOT EXCEED INCES PER SIDE. Z 5. DIMENSIONS D ND E RE DETERMINED T TE OUTERMOST EXTREMES OF TE PLSTIC BODY. 6. DTUMS ND B RE DETERMINED T DTUM PLNE. INCES MILLIMETERS DIM MIN MX MIN MX b b b c SETING c PLNE D E e BSC 2.29 BSC L L1 0.8 REF 2.7 REF L BSC 0.51 BSC L L Z SOLDERING FOOTPRINT* STYLE : PIN 1. CTODE 2. NODE 3. GTE. NODE SCLE 3:1 mm inches September 19, 2016 Rev. 7 6 Publication Order Number:

7 PCKGE DIMENSIONS IPK CSE 369D ISSUE C V B R C E NOTES: 1. DIMENSIONING ND TOLERNCING PER NSI Y1.5M, CONTROLLING DIMENSION: INC. S T SETING PLNE F G K D 3 PL J 3 (0.005) M T Z INCES MILLIMETERS DIM MIN MX MIN MX B C D E F G BSC 2.29 BSC J K R S V Z STYLE : PIN 1. CTODE 2. NODE 3. GTE. NODE Littelfuse products are not designed for, and shall not be used for, any purpose (including, without limitation, automotive, military, aerospace, medical, life-saving, life-sustaining or nuclear facility applications, devices intended for surgical implant into the body, or any other application in which the failure or lack of desired operation of the product may result in personal injury, death, or property damage) other than those expressly set forth in applicable Littelfuse product documentation. Warranties granted by Littelfuse shall be deemed void for products used for any purpose not expressly set forth in applicable Littelfuse documentation. Littelfuse shall not be liable for any claims or damages arising out of products used in applications not expressly intended by Littelfuse as set forth in applicable Littelfuse documentation. The sale and use of Littelfuse products is subject to Littelfuse Terms and Conditions of Sale, unless otherwise agreed by Littelfuse. Littelfuse.com September 19, 2016 Rev. 7 7 Publication Order Number:

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