2N5060 Series Preferred Device. Sensitive Gate Silicon Controlled Rectifiers. Reverse Blocking Thyristors
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- Robert Eugene Atkinson
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1 Preferred Device Sensitive Gate Silicon Controlled Rectifiers Reverse Blocking Thyristors nnular PNPN devices designed for high volume consumer applications such as relay and lamp drivers, small motor controls, gate drivers for larger thyristors, and sensing and detection circuits. Supplied in an inexpensive plastic TO92/TO-226 package which is readily adaptable for use in automatic insertion equipment. Features Sensitive Gate Trigger Current 200 Maximum Low Reverse and Forward Blocking Current Maximum, T C = 1 C Low Holding Current 5 m Maximum Passivated Surface for Reliability and Uniformity Device Marking: Device Type, e.g., 2N60, Date Code PbFree Packages are vailable* SILICON CONTROLLED RECTIFIERS RMS, G K MRKING DIGRM TO92 CSE 29 STYLE 2N xx YWW xx Y WW Specific Device Code = Year = Work Week PIN SSIGNMENT Cathode Gate node ORDERING INFORMTION See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. Preferred devices are recommended choices for future use and best overall value. *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Semiconductor Components Industries, LLC, 2005 January, 2005 Rev. 7 1 Publication Order Number: 2N60/D
2 MXIMUM RTINGS (T J = 25 C unless otherwise noted) Rating Symbol alue Unit Peak Repetitive OffState oltage (Note 1) (T J = 40 to 1 C, Sine Wave, to 60 Hz, Gate Open) 2N60 2N61 2N62 2N64 DRM, RRM On-State Current RMS (180 Conduction ngles; T C = 80 C) I T(RMS) *verage On-State Current (180 Conduction ngles) (T C = 67 C) (T C = 2 C) I T() 1 55 *Peak Non-repetitive Surge Current, T = 25 C (1/2 cycle, Sine Wave, 60 Hz) I TSM Circuit Fusing Considerations (t = 8.3 ms) I 2 t s *verage On-State Current (180 Conduction ngles) (T C = 67 C) (T C = 2 C) I T() 1 55 *Forward Peak Gate Power (Pulse Width sec; T = 25 C) P GM 0.1 W *Forward verage Gate Power (T = 25 C, t = 8.3 ms) P G() 0.01 W *Forward Peak Gate Current (Pulse Width sec; T = 25 C) I GM *Reverse Peak Gate oltage (Pulse Width sec; T = 25 C) RGM *Operating Junction Temperature Range T J 40 to +1 C *Storage Temperature Range T stg 40 to +1 C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. DRM and RRM for all types can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; however, positive gate voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. THERML CHRCTERISTICS Characteristic Symbol Max Unit *Thermal Resistance, JunctiontoCase (Note 2) R JC 75 C/W Thermal Resistance, Junctiontombient R J 200 C/W *Lead Solder Temperature (Lead Length 1/16 from case, s Max) +230* C 2. This measurement is made with the case mounted flat side down on a heatsink and held in position by means of a metal clamp over the curved surface. *Indicates JEDEC Registered Data. 2
3 ELECTRICL CHRCTERISTICS (T C = 25 C unless otherwise noted) Characteristic Symbol Min Typ Max Unit OFF CHRCTERISTICS *Peak Repetitive Forward or Reverse Blocking Current (Note 3) ( K = Rated DRM or RRM ) T C = 25 C T C = 1 C ON CHRCTERISTICS *Peak Forward OnState oltage (Note 4) (I TM = 1.2 T = 25 C) I DRM, I RRM TM 1.7 Gate Trigger Current (Continuous DC) (Note 5) *( K = 7.0 dc, R L = 0 ) T C = 25 C T C = 40 C I GT Gate Trigger oltage (Continuous DC) (Note 5) T C = 25 C *( K = 7.0 dc, R L = 0 ) T C = 40 C GT 1.2 *Gate NonTrigger oltage ( K = Rated DRM, R L = 0 ) T C = 1 C GD 0.1 Holding Current (Note 5) T C = 25 C *( K = 7.0 dc, initiating current = 20 m) T C = 40 C I H m Turn-On Time Delay Time Rise Time (I GT = m, D = Rated DRM, Forward Current =, di/dt = 6.0 / s t d t r s Turn-Off Time (Forward Current = pulse, Pulse Width = s, 0.1% Duty Cycle, di/dt = 6.0 / s, dv/dt = 20 / s, I GT = 1 m) 2N60, 2N61 2N62, 2N64 t q 30 s DYNMIC CHRCTERISTICS Critical Rate of Rise of OffState oltage (Rated DRM, Exponential) 3. R GK = 00 is included in measurement. 4. Forward current applied for 1 ms maximum duration, duty cycle 1%. 5. R GK current is not included in measurement. *Indicates JEDEC Registered Data. dv/dt 30 / s oltage Current Characteristic of SCR + Current node + Symbol DRM I DRM RRM I RRM TM I H Parameter Peak Repetitive Off State Forward oltage Peak Forward Blocking Current Peak Repetitive Off State Reverse oltage Peak Reverse Blocking Current Peak on State oltage Holding Current I RRM at RRM on state Reverse Blocking Region (off state) Reverse valanche Region TM I H + oltage I DRM at DRM Forward Blocking Region (off state) node 3
4 CURRENT DERTING T C, MXIMUM LLOWBLE CSE TEMPERTURE ( C) α = 30 α = CONDUCTION NGLE 60 CSE MESUREMENT POINT CENTER OF FLT PORTION I T(), ERGE ON-STTE CURRENT (MP) dc Figure 1. Maximum Case Temperature a T, MXIMUM LLOWBLE MBIENT TEMPERTURE ( C) α = CONDUCTION NGLE TYPICL PRINTED CIRCUIT BORD MOUNTING α = I T(), ERGE ON-STTE CURRENT (MP) Figure 2. Maximum mbient Temperature dc α CURRENT DERTING i T, INSTNTNEOUS ON-STTE CURRENT (MP) T J = 1 C 25 C I TSM, PEK SURGE CURRENT (MP) P (), MXIMUM ERGE POWER DISSIPTION (WTTS) NUMBER OF CYCLES Figure 4. Maximum NonRepetitive Surge Current a α = CONDUCTION NGLE α = dc v T, INSTNTNEOUS ON-STTE OLTGE (OLTS) Figure 3. Typical Forward oltage I T(), ERGE ON-STTE CURRENT (MP) Figure 5. Power Dissipation 4
5 r(t), TRNSIENT THERML RESISTNCE NORMLIZED t, TIME (SECONDS) Figure 6. Thermal Response TYPICL CHRCTERISTICS G, GTE TRIGGER OLTGE (OLTS) K = 7.0 R L = 0 R GK = k T J, JUNCTION TEMPERTURE ( C) Figure 7. Typical Gate Trigger oltage I GT, GTE TRIGGER CURRENT (NORMLIZED) N N60-61 K = 7.0 R L = T J, JUNCTION TEMPERTURE ( C) Figure 8. Typical Gate Trigger Current I H, HOLDING CURRENT (NORMLIZED) N62-64 K = 7.0 R L = 0 R GK = k 2N60, T J, JUNCTION TEMPERTURE ( C) Figure 9. Typical Holding Current 5
6 ORDERING INFORMTION Device Package Shipping 2N60 TO92 5,000 Units / Box 2N60RLR TO92 2,000 / Tape & Reel 2N60RLRG TO92 (PbFree) 2,000 / Tape & Reel 2N60RLRM TO92 2,000 / mmo Pack 2N61 TO92 5,000 Units / Box 2N61G TO92 (PbFree) 5,000 Units / Box 2N61RLR TO92 2,000 / Tape & Reel 2N61RLRG TO92 (PbFree) 2,000 / Tape & Reel 2N61RLRM TO92 2,000 / mmo Pack 2N62 TO92 5,000 Units / Box 2N62G TO92 (PbFree) 5,000 Units / Box 2N62RLR TO92 2,000 / Tape & Reel 2N62RLRG TO92 (PbFree) 2,000 / Tape & Reel 2N64 TO92 5,000 Units / Box 2N64RLR TO92 2,000 / Tape & Reel 2N64RLRM TO92 2,000 / mmo Pack 2N64RLRMG TO92 (PbFree) 2,000 / mmo Pack 2N60RL1 TO92 2,000 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 6
7 PCKGE DIMENSIONS TO92 TO226 CSE 2911 ISSUE L B NOTES: 1. DIMENSIONING ND TOLERNCING PER NSI Y14.5M, CONTROLLING DIMENSION: INCH. R 3. CONTOUR OF PCKGE BEYOND DIMENSION R IS UNCONTROLLED. P 4. LED DIMENSION IS UNCONTROLLED IN P ND BEYOND DIMENSION K MINIMUM. L SETING INCHES MILLIMETERS PLNE K DIM MIN MX MIN MX B C X X D D G G H H J J K L 6.35 C N N P SECTION XX R N STYLE : PIN 1. CTHODE 2. GTE 3. NODE 7
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BTB16-600BW3G, BTB16-700BW3G, BTB16-600BW3G Pb Description Designed for high performance full-wave ac control applications where high noise immunity and high commutating di/dt are required. Features Blocking
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MCR8B, MCR8M Pb Description PNPN devices designed for line powered consumer applications such as relay and lamp drivers, small motor controls, gate drivers for larger thyristors, and sensing and detection
More informationDistributed by: www.jameco.com -800-8-44 The content and copyrights of the attached material are the property of its owner. Preferred Device SWITCHMODE Schottky Power Rectifier The SWITCHMODE Power Rectifier
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MAC2HCDG, MAC2HCMG, MAC2HCNG Pb Description Designed primarily for full-wave ac control applications, such as motor controls, heating controls or dimmers; or wherever full wave, silicon gate controlled
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MBRM13LT1G, NRVBM13LT1G, MBRM13LT3G, NRVBM13LT3G Surface Mount Schottky Power Rectifier Power Surface Mount Package The Schottky employs the Schottky Barrier principle with a barrier metal and epitaxial
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MBRM12LT1G, NRVBM12LT1G, MBRM12LT3G, NRVBM12LT3G Surface Mount Schottky Power Rectifier Power Surface Mount Package The Schottky employs the Schottky Barrier principle with a barrier metal and epitaxial
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More informationBTA16-600BW3G, BTA16-800BW3G,
BTA6-600BW3G, BTA6-800BW3G, Pb Description Designed for high performance full wave ac control applications where high noise immunity and high commutating di/dt are required. Features Blocking oltage to
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MCR25DG, MCR25MG, MCR25NG Pb Description Designed primarily for half-wave ac control applications, such as motor controls, heating controls, and power supplies; or wherever half wave, silicon gate controlled
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BTA08-800CW3G Pb Description Designed primarily for half-wave ac control applications, such as motor controls, heating controls and power supply crowbar circuits. Features Blocking oltage to 800 On-State
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MAC12D, MAC12M, MAC12N Pb Description Designed for high performance full wave ac control applications where high noise immunity and commutating di/dt are required. Features Blocking Voltage to 800 Volts
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More informationConditions Commercial frequency, sine full wave 360 conduction, Tc=56 C 4 60Hz sinewave 1 full cycle, peak value, non-repetitive
OUTLINE DRWING φ. MX. Dimensions in mm T TERMINL T TERMINL GTE TERMINL CLSS TYPE NME. MX. MIN CIRCUMSCRIBE CIRCLE φ... IT (RMS)... DRM... 6 IFGT!, IT!, IT #... m IFGT #...m JEDEC : TO-9..9 MX PPLICTION
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