MAC4DCM, MAC4DCN. Triacs. Silicon Bidirectional Thyristors TRIACS 4.0 AMPERES RMS VOLTS

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1 Preferred Device Triacs Silicon Bidirectional Thyristors Designed for high volume, low cost, industrial and consumer applications such as motor control; process control; temperature, light and speed control. Features Small Size Surface Mount DPAK Package Passivated Die for Reliability and Uniformity Blocking Voltage to 8 V OnState Current Rating of. A RMS at 18 C High Immunity to dv/dt 5 V/ s at 125 C High Immunity to di/dt 6. A/ms at 125 C Epoxy Meets UL 9 in ESD Ratings: Human Body Model, 3B 8 V Machine Model, C V PbFree Packages are Available MAXIMUM RATINS (T J = 25 C unless otherwise noted) Rating Symbol Value Unit Peak Repetitive OffState Voltage (Note 1) (T J = to 125 C, Sine Wave, 5 to Hz, ate Open) MACDCM MACDCN OnState RMS Current (Full Cycle Sine Wave, Hz, T C = 18 C) Peak Non-Repetitive Surge Current (One Full Cycle Sine Wave, Hz, T J = 125 C) Circuit Fusing Consideration (t = 8.3 msec) Peak ate Power (Pulse Width 1 sec, T C = 18 C) Average ate Power (t = 8.3 msec, T C = 18 C) Peak ate Current (Pulse Width 2 sec, T C = 18 C) Peak ate Voltage (Pulse Width 2 sec, T C = 18 C) V DRM, V RRM 8 V I T(RMS). A I TSM A I 2 t 6.6 A 2 sec P M 2. W P (AV) 1. W I M. A V M 5. V Operating Junction Temperature Range T J to 125 C Storage Temperature Range T stg to 15 C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. V DRM and V RRM for all types can be applied on a continuous basis. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the device are exceeded TRIACS. AMPERES RMS 8 VOLTS MT2 Y WW ACDCx DPAK CASE 369C STYLE 6 DPAK3 CASE 369D STYLE 6 PIN ASSINMENT 1 Main Terminal 1 2 Main Terminal 2 3 ate Main Terminal 2 ORDERIN INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. Preferred devices are recommended choices for future use and best overall value. MARKIN DIARAMS = Year = Work Week = Device Code x= M or N = PbFree Package YWW AC DCx YWW AC DCx Semiconductor Components Industries, LLC, 29 January, 29 Rev. 7 1 Publication Order Number: MACDCM/D

2 THERMAL CHARACTERISTICS Thermal Resistance, Characteristic Symbol Max Unit JunctiontoCase R JC 3.5 C/W JunctiontoAmbient R JA 88 JunctiontoAmbient (Note 2) R JA 8 Maximum Lead Temperature for Soldering Purposes (Note 3) T L 2 C ELECTRICAL CHARACTERISTICS (T J = 25 C unless otherwise noted; Electricals apply in both directions) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Peak Repetitive Blocking Current (V D = Rated V DRM, V RRM ; ate Open) T J = 25 C T J = 125 C ON CHARACTERISTICS Peak OnState Voltage (Note ) (I TM = ± 6. A) V TM V I DRM, I RRM.1 2. ma ate Trigger Current (Continuous dc) (V D = 12 V, R L = 1 ) MT2(+), (+) MT2(+), () MT2(), () I T ma ate Trigger Voltage (Continuous dc) (V D = 12 V, R L = 1 ) MT2(+), (+) MT2(+), () MT2(), () V T V ate NonTrigger Voltage (Continuous dc) (V D = 12 V, R L = 1 ) MT2(+), (+); MT2(+), (); MT2(), () T J = 125 C V D.2. V Holding Current (V D = 12 V, ate Open, Initiating Current = ± 2 ma) I H ma Latching Current (V D = 12 V, I = 35 ma) MT2(+), (+) MT2(+), () MT2(), () DYNAMIC CHARACTERISTICS Rate of Change of Commutating Current (V D = V, I TM =. A, Commutating dv/dt = 18 V/ sec, ate Open, T J = 125 C, f = 25 Hz, CL = 5. F, LL = 2 mh, No Snubber) (See Figure 16) I L ma di/dt(c) A/ms Critical Rate of Rise of OffState Voltage (V D =.67 X Rated V DRM, Exponential Waveform, ate Open, T J = 125 C) 2. These ratings are applicable when surface mounted on the minimum pad sizes recommended. 3. 1/8 from case for 1 seconds.. Pulse Test: Pulse Width 2. msec, Duty Cycle 2%. ORDERIN INFORMATION dv/dt 5 17 V/ s Device Package Type Package Shipping MACDCM1 DPAK3 369D 75 Units / Rail MACDCM1 DPAK3 (PbFree) 369D 75 Units / Rail MACDCMT DPAK 369C 25 / Tape & Reel MACDCMT DPAK (PbFree) 369C 25 / Tape & Reel MACDCN1 DPAK3 369D 75 Units / Rail MACDCN1 DPAK3 (PbFree) 369D 75 Units / Rail MACDCNT DPAK 369C 25 / Tape & Reel MACDCNT DPAK (PbFree) 369C 25 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD811/D. 2

3 Voltage Current Characteristic of Triacs (Bidirectional Device) + Current Symbol V DRM I DRM V RRM I RRM Parameter Peak Repetitive Forward OffState Voltage Peak Forward Blocking Current Peak Repetitive Reverse OffState Voltage Peak Reverse Blocking Current I RRM at V RRM on state I H V TM Quadrant 1 MainTerminal 2 + V TM I H Maximum OnState Voltage Holding Current I H off state + Voltage I DRM at V DRM Quadrant 3 MainTerminal 2 V TM Quadrant Definitions for a Triac MT2 POSITIVE (Positive Half Cycle) + (+) MT2 (+) MT2 Quadrant II () I T ATE (+) I T ATE Quadrant I REF REF I T + I T () MT2 () MT2 Quadrant III () I T ATE (+) I T ATE Quadrant IV REF REF MT2 NEATIVE (Negative Half Cycle) All polarities are referenced to. With inphase signals (using standard AC lines) quadrants I and III are used. 3

4 I T C, MAXIMUM ALLOWABLE CASE TEMPERATURE ( C) = 3 9 α α 12 = CONDUCTION ANLE dc (AV), AVERAE POWER DISSIPATION (WATTS) P I T(RMS), RMS ON-STATE CURRENT (AMPS) I T(RMS), RMS ON-STATE CURRENT (AMPS) dc α 12 α 9 = CONDUCTION ANLE = Figure 1. RMS Current Derating Figure 2. OnState Power Dissipation, INSTANTANEOUS ON-STATE CURRENT (AMPS) T T J = 25 C T J = 125 C T J = 25 C 1..1 Z JC(t) = R JC(t) r(t) k V T, INSTANTANEOUS ON-STATE VOLTAE (VOLTS) t, TIME (ms) r (t), TRANSIENT RESISTANCE (NORMALIZED) Figure 3. OnState Characteristics Figure. Transient Thermal Response 1.2 I T, ATE TRIER CURRENT (ma) Q1 Q2 Q3 V T, ATE TRIER VOLTAE(VOLTS) Q2 Q3 Q Figure 5. Typical ate Trigger Current versus Junction Temperature Figure 6. Typical ate Trigger Voltage versus Junction Temperature

5 I 12 I H, HOLDIN CURRENT (ma) MT2 POSITIVE MT2 NEATIVE, LATCHIN CURRENT (ma) L Q2 Q1 Q Figure 7. Typical Holding Current versus Junction Temperature Figure 8. Typical Latching Current versus Junction Temperature 1 K 8. K T J = 125 C 15 K V PK = V T J = 125 C 6. K. K 8 V V V PK = V 1 K 5. K V 8 V 2. K K K R -, ATE- RESISTANCE (OHMS) R -, ATE- RESISTANCE (OHMS) Figure 9. Exponential Static dv/dt versus ate Resistance, MT2(+) Figure 1. Exponential Static dv/dt versus ate Resistance, MT2() 1 K 1 K 8. K 6. K. K 2. K T J = 1 C 11 C 125 C ATE OPEN 12 K 1 K 8. K 6. K. K 2. K 125 C 11 C T J = 1 C ATE OPEN V PK, PEAK VOLTAE (VOLTS) V PK, PEAK VOLTAE (VOLTS) Figure 11. Exponential Static dv/dt versus Peak Voltage, MT2(+) Figure 12. Exponential Static dv/dt versus Peak Voltage, MT2() 5

6 1 K 1 K 8. K 6. K. K 2. K 8 V V V PK = V ATE OPEN 12 K 1 K 8. K 6. K. K 2. K V 8 V V PK = V ATE OPEN Figure 13. Typical Exponential Static dv/dt versus Junction Temperature, MT2(+) Figure 1. Typical Exponential Static dv/dt versus Junction Temperature, MT2() 1 V PK = V dv/dt(c), CRITICAL RATE OF RISE OF COMMUTATIN VOLTAE (V/ s) 1 V DRM t w T J = 125 C f = 1 2 t w (di/dt) c = 6f I TM 1 1 C 75 C di/dt(c), RATE OF CHANE OF COMMUTATIN CURRENT (A/ms) Figure 15. Critical Rate of Rise of Commutating Voltage L L 1N7 2 V RMS ADJUST FOR I TM, Hz V AC MEASURE I CHARE TRIER CHARE CONTROL NON POLAR C L TRIER CONTROL MT2 1N V Note: Component values are for verification of rated (di/dt) c. See AN18 for additional information. Figure 16. Simplified Test Circuit to Measure the Critical Rate of Rise of Commutating Current (di/dt) c 6

7 PACKAE DIMENSIONS DPAK CASE 369C ISSUE O B C T SEATIN PLANE NOTES: 1. DIMENSIONIN AND TOLERANCIN PER ANSI Y1.5M, CONTROLLIN DIMENSION: INCH. V S F R L A K D 2 PL J H.13 (.5) M T E U Z INCHES MILLIMETERS DIM MIN MAX MIN MAX A B C D E F BSC.58 BSC H J K L.9 BSC 2.29 BSC R S U.2.51 V Z STYLE 6: PIN MT2 3. ATE. MT2 SOLDERIN FOOTPRINT* SCALE 3:1 mm inches *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 7

8 PACKAE DIMENSIONS DPAK3 CASE 369D1 ISSUE B V B R C E NOTES: 1. DIMENSIONIN AND TOLERANCIN PER ANSI Y1.5M, CONTROLLIN DIMENSION: INCH. S T SEATIN PLANE F A K D 3 PL J.13 (.5) M T H Z INCHES MILLIMETERS DIM MIN MAX MIN MAX A B C D E F BSC 2.29 BSC H J K R S V Z STYLE 6: PIN MT2 3. ATE. MT2 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERIN INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 8217 USA Phone: or 8338 Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative MACDCM/D

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