MCR8DSM, MCR8DSN. Sensitive Gate Silicon Controlled Rectifiers. Reverse Blocking Thyristors. SCRs 8 AMPERES RMS VOLTS

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Preferred Device Sensitive Gate Silicon Controlled Rectifiers Reverse Blocking Thyristors Designed for high volume, low cost, industrial and consumer applications such as motor control; process

1 Preferred Device Sensitive Gate Silicon Controlled Rectifiers Reverse Blocking Thyristors Designed for high volume, low cost, industrial and consumer applications such as motor control; process control; temperature, light and speed control. Features Small Size Passivated Die for Reliability and Uniformity Low Level Triggering and Holding Characteristics Available in Two Package Styles Surface Mount Lead Form Case 369C Miniature Plastic Package Straight Leads Case 369 Epoxy Meets UL in ESD Ratings: Human Body Model, 3B 8 V Machine Model, C 4 V PbFree Packages are Available MAXIMUM RATINGS (T J = 25 C unless otherwise noted) Rating Symbol Value Unit Peak Repetitive OffState Voltage (Note 1) (T J = 4 to 1 C, Sine Wave, 5 Hz to 6 Hz) MCR8DSM MCR8DSN OnState RMS Current (18 Conduction Angles; T C = 9 C) Average OnState Current (18 Conduction Angles; T C = 9 C) Peak Non-Repetitive Surge Current (1/2 Cycle, Sine Wave 6 Hz, T J = 1 C) V DRM, V RRM 6 8 V I T(RMS) 8. A I T(AV) 5.1 A I TSM 9 A Circuit Fusing Consideration (t = 8.3 msec) I 2 t 34 A 2 sec Forward Peak Gate Power (Pulse Width sec, T C = 9 C) Forward Average Gate Power (t = 8.3 msec, T C = 9 C) Forward Peak Gate Current (Pulse Width sec, T C = 9 C) P GM 5. W P G(AV).5 W I GM 2. A Operating Range T J 4 to 1 C Storage Temperature Range T stg 4 to 15 C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. V DRM and V RRM for all types can be applied on a continuous basis. Ratings apply for negative gate voltage; positive gate voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the device are exceeded SCRs 8 AMPERES RMS 6 8 VOLTS 4 A CASE 369C STYLE 4 Preferred devices are recommended choices for future use and best overall value. G Y = Year WW = Work Week CR8DSx = Device Code x= M or N G = PbFree Package PIN ASSIGNMENT Cathode Anode Gate 4 Anode K MARKING DIAGRAM YWW CR 8DSxG ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. Semiconductor Components Industries, LLC, 2 October, 2 Rev. 7 1 Publication Order Number: MCR8DSM/D

2 THERMAL CHARACTERISTICS Thermal Resistance Characteristic Symbol Max Unit JunctiontoCase R JC 2.2 C/W JunctiontoAmbient R JA 88 JunctiontoAmbient (Note 2) R JA 8 Maximum Lead Temperature for Soldering Purposes 1/8 from Case for Seconds T L 26 C ELECTRICAL CHARACTERISTICS (T J = 25 C unless otherwise noted) Characteristics Symbol Min Typ Max Unit OFF CHARACTERISTICS Peak Repetitive Forward or Reverse Blocking Current (V AK = Rated V DRM or V RRM ; R GK = k ) (Note 3) T J = 25 C T J = 1 C ON CHARACTERISTICS Peak Reverse Gate Blocking Voltage (I GR = A) V GRM V Peak Reverse Gate Blocking Current (V GR = V) I RGM 1.2 A Peak Forward OnState Voltage (Note 4) (I TM = 16 A) V TM V Gate Trigger Current (Continuous dc) (Note 5) I GT A (V D = 12 V, R L = ) T J = 25 C T J = 4 C Gate Trigger Voltage (Continuous dc) (Note 5) (V D = 12 V, R L = ) T J = 25 C T J = 4 C T J = 1 C Holding Current (V D = 12 V, Initiating Current = 2 ma, R GK = 1 k ) T J = 25 C T J = 4 C Latching Current (V D = 12 V, I G = 2. ma, R GK = 1 k ) T J = 25 C T J = 4 C Total TurnOn Time (Source Voltage = 12 V, R S = k, I T = 16 A(pk), R GK = k ) (V D = Rated V DRM, Rise Time = 2 ns, Pulse Width = s) DYNAMIC CHARACTERISTICS Critical Rate of Rise of OffState Voltage (V D =.67 X Rated V DRM, Exponential Waveform, R GK = k, T J = 1 C) I DRM I RRM V GT.45.2 I H.5 I L.5 tgt dv/dt Surface mounted on minimum recommended pad size. 3. Ratings apply for negative gate voltage or R GK = k. Devices shall not have a positive gate voltage concurrently with a negative voltage on the anode. Devices should not be tested with a constant current source for forward and reverse blocking capability such that the voltage applied exceeds the rated blocking voltage. 4. Pulse Test; Pulse Width 2. msec, Duty Cycle 2%. 5. R GK current not included in measurements. A V ma ma s V/ s ORDERING INFORMATION MCR8DSMT4 MCR8DSMT4G MCR8DSNT4 Device Package Shipping (PbFree) 25 / Tape & Reel MCR8DSNT4G (PbFree) For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD811/D. 2

3 Voltage Current Characteristic of SCR + Current Anode + Symbol V DRM I DRM V RRM I RRM V TM I H Parameter Peak Repetitive OffState Forward Voltage Peak Forward Blocking Current Peak Repetitive OffState Reverse Voltage Peak Reverse Blocking Current Peak OnState Voltage Holding Current I RRM at V RRM on state Reverse Blocking Region (off state) Reverse Avalanche Region V TM I H + Voltage I DRM at V DRM Forward Blocking Region (off state) Anode T C, MAXIMUM ALLOWABLE CASE TEMPERATURE ( C) = Conduction Angle dc (AV), AVERAGE POWER DISSIPATION (WATTS) = I T(AV), AVERAGE ON-STATE CURRENT (AMPS) I T(AV), AVERAGE ON-STATE CURRENT (AMPS) P 12 = Conduction Angle = dc Figure 1. Average Current Derating Figure 2. OnState Power Dissipation 3

4 I I MCR8DSM, MCR8DSN, INSTANTANEOUS ON-STATE CURRENT (AMPS) T T J = 25 C T J = 1 C T J = 25 C r (t), TRANSIENT THERMAL RESISTANCE (NORMALIZED) Z JC(t) = R JC(t) r(t) K V T, INSTANTANEOUS ON-STATE VOLTAGE (VOLTS) t, TIME (ms) Figure 3. OnState Characteristics Figure 4. Transient Thermal Response I GT, GATE TRIGGER CURRENT ( A) -4 R GK = K GATE OPEN V GT, GATE TRIGGER VOLTAGE (VOLTS) Figure 5. Typical Gate Trigger Current versus Figure 6. Typical Gate Trigger Voltage versus R GK = K R GK = K I H, HOLDING CURRENT (ma), LATCHING CURRENT (ma) L Figure 7. Typical Holding Current versus Figure 8. Typical Latching Current versus 4

5 I MCR8DSM, MCR8DSN T J = 25 C, HOLDING CURRENT (ma) H I GT = 25 A I GT = A STATIC dv/dt (V/ s) 7 C 9 C T J = 1 C K Figure 9. Holding Current versus GateCathode Resistance Figure. Exponential Static dv/dt versus GateCathode Resistance and Junction Temperature 4 V T J = 1 C V D = 8 V T J = 1 C STATIC dv/dt (V/ s) 6 V V PK = 8 V STATIC dv/dt (V/ s) I GT = 25 A I GT = A Figure 11. Exponential Static dv/dt versus GateCathode Resistance and Peak Voltage Figure 12. Exponential Static dv/dt versus GateCathode Resistance and Gate Trigger Current Sensitivity 5

6 L3 L4 b2 e E b b A D B DETAIL A c.5 (3) M C A PACKAGE DIMENSIONS (SINGLE GAUGE) CASE 369C1 ISSUE D C c2 H L2 GAUGE PLANE L L1 DETAIL A ROTATED 9 CW A1 H C SOLDERING FOOTPRINT* Z SEATING PLANE NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, CONTROLLING DIMENSION: INCHES. 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI- MENSIONS b3, L3 and Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED.6 INCHES PER SIDE. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. INCHES MILLIMETERS DIM MIN MAX MIN MAX A A b b b c c D E e.9 BSC 2.29 BSC H L L1.8 REF 2.74 REF L2.2 BSC.51 BSC L L4.4 1 Z STYLE 4: PIN 1. CATHODE 2. ANODE 3. GATE 4. ANODE SCALE 3:1 mm inches *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 8217 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative MCR8DSM/D

2N6504 Series. Silicon Controlled Rectifiers. Reverse Blocking Thyristors. SCRs 25 AMPERES RMS 50 thru 800 VOLTS

2N6504 Series. Silicon Controlled Rectifiers. Reverse Blocking Thyristors. SCRs 25 AMPERES RMS 50 thru 800 VOLTS Preferred Device Silicon Controlled Rectifiers Reverse Blocking Thyristors Designed primarily for half-wave ac control applications, such as motor controls, heating controls and power supply crowbar circuits.