A Linear OTA with improved performance in 0.18 micron

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1 A Linear OA with improved performance in 0.8 micron Nikhil Raj, R.K.Sharma Abstract he increasing demand of personal health monitoring products with long battery life had forced designers to use of those circuits which consume low power. Operational ransconductance Amplifier (OA) operating in subthreshold (weak inversion) region introduces a versatile solution for the realization of low power LS building blocks. his paper is focused on design of high performance OA through use of high output impedance low-voltage current mirror circuit and observed responses proved to be much better than that of different complex mirror architectures. he proposed OA incorporates high linearity and better performance in low-frequency applications. he achieved open loop dc gain and unity gain bandwidth (UGB) is db and KHz respectively. he OA is operated at supply voltage of 0.9 volt and consumes power in range of nanowatts. he architecture of OA is performed in a standard SMC 0.8 micrometer technology on BSM 3v3 model and simulation results were analyzed using ELDO Simulator. Keywords Bulk-input, Low supply voltage, Linear range, subthreshold OA, Wilson mirror.. NRODUCON ODAY the trend of scaling down channel length in CMOS technology to facilitate submicrometer high density systems on a single integrated circuit (C) and emergence of portable devices like Ambulatory Brain Computer nterface (ABC) systems, insulin pumps, hearing aids and mobile communications had led to development of circuits that consumes less power. he rapid increasing use of batteryoperated portable equipment in application areas such as telecommunications and medical electronics imposes the use of low-power and small-sized circuits realized with LS (very large scale integrated) technologies. As the technology of biomedical instrumentation amplifier is moving towards portability, lower power consumption is highly desirable for devices which monitors patient whole day. Circuits needed for processing of biological signals are a typical and good example of low-power and small-sized building blocks. he main features of biological signals are their low amplitude and low frequency range. n biomedical instruments to process low frequency signals, low-pass filter circuits with sufficient large time constant are required, typically for a capacitor value of less than 5pF which in turn require very high resistance. For example, in ECG signal detection, low-pass filter required must have cut-off frequency less than 300 Hz for which use of low-power continuous-time OA-based filters are preferred []. However, major limitation of conventional OAs is its limited linear range. As device sizes are scaling down, traditional saturation-based OAs are facing design challenges to overcome poor linearity and limited output impedance. arious techniques for extending linear range have been proposed among which the OA architecture used for this paper is discussed in []. t provides linearity of about.7 volt. he paper concentrates on not only to achieve high linearity but to increase the gain of amplifier with better performance. Since the OA is a current source device, the output impedance of the device must be high. he proposed OA uses high output impedance low-voltage current mirror circuit as a replacement to simple current mirror (CM) which provides sufficient increase in open loop dc gain with better frequency response at extremely low voltage. Section covers short review on bulk-driven MOS transistors, followed by basic operation of OA and its modified architecture is discussed in section. n section, simulations results are discussed and finally conclusion in section.. REEW OF BULK DREN MOS hreshold voltage of future CMOS technologies may not decrease much below than what are available today, creating difficulties for analog designers to design analog circuits with lower supply voltage. o support low threshold voltage devices proper scaling of supply voltage must be done to appropriately bias the device. A promising approach in low voltage analog circuits is bulk-driven MOSFE method where the gate-to-source voltage is set to a value sufficient to form inversion layer while the input signal is applied to bulk terminal. n gate-driven MOS transistor, the gate-to-source voltage controls the drain current of the transistor while for a bulkdriven MOS transistor where threshold voltage is a function of the bulk-to-source voltage, controls the drain current. Using this technique, transistor can remain in active mode even at zero-input bias voltage. However, there are few drawbacks in bulk-driven transistors like one most important drawback is its low dc gain [3]. he current expression for well-input MOS transistor in subthreshold mode is given by kgs ( k ) ws = e e () 0 SSN: SBN:

2 where gs and ws is the gate-to-source and well-to-source voltage, k is subthreshold exponential coefficient, 0 is subthreshold exponential parameter, ( K q) = is thermal voltage. From (), it can be observed that dependence of k on gate and ( k ) on well creates the condition that when gate is active, well remains inactive and when well is active gate is inactive. A. he Amplifier Core. PROPOSED OA he OA is a transconductance type device, which means that the input voltage controls an output current by means of the device transconductance, labeled g.his makes the OA a voltage controlled current source (CCS). n the past few years, engineers have improved the linearity of MOS transconductor circuits. Such improvement has been primarily in the area of above-threshold, high-power, high-frequency, continuous time filters. he OA shown in Fig. which provides a linearity of.7 volt is detailed in []. m compensates the offset voltage but its high impedance increases its gain compared to other CM. Analyzing left half-circuit of OA of Fig., the overall transconductance g is reduced by a feedback factor ( k p kn ) + +, k g = () + k + k p n where k p and k n are the loop gain of S and GM transistor respectively. From () ( s g w ) α e (3) ( s gw ) ( s g ) + w OU d = = = + ( s gw ) ( s g w) B + e + e e e Solving (4) OU B g d e gd = = tanh gd e + (5) where d = w w = + O U d = B tanh (6) L where out is the output current, B is the bias current of P transistor, L is the linear range of OA expressed by Figure. Core OA [] t uses combination of four techniques to enhance its linearity. Firstly, the well terminals of the differential-pair transistors W and W is used as amplifier inputs. Secondly, feedback techniques like source degeneration via S and S transistors whereas gate degeneration via GM and GM provide further improvement. Finally, B and B used as bump transistors. he bump-linearization technique is used to overcome parasitic effects which occur at low input voltage, generally less than volt. he P transistor act as bias current source and the remaining transistors M p, M p, M are configured as simple current mirrors. Besides, there is an offset voltage adjustment which sets OS around 5 m less than DD. o improve OA performance, simple CM used is replaced by high output impedance low-voltage CM. his technique not only = g (7) L where g is the overall reduced transconductance of OA. 3 x x x From tanh series expansion tanh = + 4 ; it can be observed that if L is made sufficiently high then cubic order term in the tanh series expansion can be easily neglected thereby reducing distortions of non-linearity. B. High output impedance low-voltage CM A current mirror is characterized by the current level it produces, the small-signal ac output resistance and voltage drop across it. he simple current mirror uses the principle that if gate-to-source potentials of two identical MOS transistors are equal then their channel currents are equal. n late 967, George Wilson proposed a modified current mirror just by adding one extra transistor which increases output impedance SSN: SBN:

3 to appreciable amount and named the circuit as Wilson current mirror. he Wilson current mirror implemented using three nmos transistors is shown in Fig. (a). he architecture consists of simple current mirror and a current to voltage converter connected in the feedback loop. f there is any increase in output current due to output voltage variation, the simple current mirror transistors senses this variation and feed back the current to input node thereby reducing gate voltage of output transistor followed by reduction in original current increase. But these current mirror suffered systematic gain error along with unequal voltages across input and output transistors. o compensate systematic gain error, Barrie Gilbert; added a fourth transistor in diode connected form in the input branch and later this circuit became famous by name improved Wilson CM [4] as shown in Fig. (b). Wilson current mirror circuit. he mirror achieves high output resistance by using negative feedback and is directly proportional to the magnitude of the loop-gain of the feedback action from the output current to the gate of output transistor M. he transistor M n n samples the OU and compares it with in. n combination with current source load in, transistor M n act as a common source amplifier used to maintain gate voltage of M to avoid mismatching of OU to in. he small-signal output resistance remains almost the same as (). he transistor M forces the drain voltages of M n n to be equal and reduces unwanted offset in the output current. he transistor M exhibits low output resistance of g m. n order to enhance its output resistance, the diode structure is replaced by cascode one as shown in Fig. 3 (b). he mirror provides an increase in output resistance by factor of gm4r o4, given by [7]. m m 4 o o3 o 4 ( ) g + g g r r + g rout = ro 3 + g m + g o g g r r r m 3 m m 4 o o 4 o3 (9) Figure. (a) Wilson current mirror, (b) mproved Wilson current mirror Assuming the output resistance of current source infinite, the effect of diode connected transistor M is neglected, and the output resistance r (neglect nd order effects for simplicity) is given by [5]. out ( ) r = r g + + g r + g g r r m3 m o o3 out o3 m o o3 gm + go where g m, r and o g o are the transconductance, incremental output resistance, and output conductance of transistors. he improved Wilson circuit requires an input voltage of two diode drops and output compliance voltage incorporates a diode drop plus saturation voltage. Such diode drop made Wilson mirror unattractive for low-power design units. o overcome this, a new Wilson topology was introduced [6], which sense the output current at low input voltage of a diode drop plus a saturation voltage whereas output senses only two saturation voltage. As seen from architecture of Fig. 3 (a), the diode connected transistor on input side biased by current source b, causes the input voltage to decrease much lower than gate voltage needed as in case of simple mirrors to sink input current. his makes it a low voltage high-swing improved- (8) Figure 3. (a) High-swing improved Wilson CM, (b) High output impedance low-voltage CM C. Proposed OA using high output impedance low-voltage CM he proposed OA is shown in Fig. 4. he architecture works on low supply voltage thereby introducing appreciable reduction in power consumption. A bias current generator circuit is connected to OA as a replacement to bias transistor P, which generates current in the range of nanoamperes. SSN: SBN:

4 Figure 4. Proposed OA using high output impedance low-voltage CM equating equivalent currents, the D, p is given by ransistors M M n6 p M p along with Rs comprises current generator circuit. As the source-to-gate ( W L) M D, p = (4) voltage of M P P are equal their corresponding µ ncox ( W L) M R ( W L) S Mn4 currents are equal, i.e. D = D (neglect channel length modulation). Furthermore, it can be noted that D3 = D and he output current bias, that is, D, p3 is now the function D4 = D3. he equation for drain current of MOS transistor of D, p. By adjusting the aspect ratio of M p3 relative is given by to M p, desired bias can be obtained. he W L ratio of W ( ) D = µ ncox GS n (0) L M p3 is kept four times lower than M p output current, 3 = =, 4. D p bias D p, which results in Solving for GS GS n Fig. 3 = D + n () µ C n ox ( W L) = + R () GS, GS, n4 D, n4 S From () D, D, n4 = + D, n4 RS (3) µ C W L µ C W L ( ) ( ) n ox M n ox Mn4 Rearranging above expression and solving for D, p by. SMULAON RESULS he design of low voltage, high performance OA circuit on SMC 0.8 micron technology provide low power consumption exhibiting performance levels that satisfy the demands of state-of-art mixed-signal circuits. he simulations were performed under normal condition (room temperature) using ELDO Simulator and BSM 3v3 model of MOS. Current generator circuit generates of 65nA at R = 0KΩ. he bias supply voltage is kept at 0.9 volt. Fig. 5 shows the linear response of proposed OA. n Fig. 6, the ac response of OA under no load condition is shown. For comparison of openloop dc gain of proposed OA, the simulations were performed using different CM circuits and the best result can be seen in case of OA using high impedance low-voltage CM circuit. he achieved dc gain and UGB of proposed OA is db and KHz respectively. ts low UGB supports it for use in biomedical applications. When configured as follower integrator using pf of load shown in Fig. 7, it tracks the input perfectly whereas the OA using different Wilson S SSN: SBN:

5 CM topology faces offset at low input voltage. he dc response of follower integrator is shown in Fig. 8. Figure 7. Follower ntegrator Figure 5. Linear response of proposed OA Figure 8. DC response of follower integrator using different CM circuits Figure 6. Open loop dc gain of OA under different CM circuits. CONCLUSON his paper explored the approach of low-voltage OA design using the bulk-driven technique and enhancement of output impedance using high output impedance low-voltage CM circuit. he design of such low voltage, high performance OA circuit on SMC 0.8 micron technology satisfies the required parameters for its implementation not only in powersaving devices but also in biomedical portable devices like biomedical implantable sensors, disk read channel integrated circuits (Cs), video filters, ADSL front-ends, and RF Cs. REFERENCES [] S. Solis-Bustos, J. Silva-Martínez, F. Maloberti, and E. Sánchez-Sinencio, A 60 db dynamic-range CMOS sixth-order.4 Hz lowpass filter for medical applications, EEE rans. Circuits Syst., Analog Digit. Signal Process. Conf., Dec. 000, 47, pp [] R. Sarpeshkar, R. F. Lyon, and C. A. Mead, A low-power wide linearrange transconductance amplifier, Analog ntegrated Circuits Signal Processing, 997, 3, pp [3] L. Ferreira,. Pimenta, and R. Moreno, An ultra-low voltage ultra-lowpower CMOS miller OA with rail-to-rail input/output swing, EEE CAS, 007, 54, (0), pp [4] B. L. Hart and R. W. J. Barker, D. C. Matching Errors in the Wilson Current Source, Electronics Letters, 976,,( 5), pp [5] R. Spencer, Analysis of the modified MOS Wilson current mirror: a pedagogical exercise in signal flow graphs, mason s gain rule, and driving-point impedance techniques, EEE rans. Educ., 00, 44, pp [6] B. Minch, Low-oltage Wilson Current Mirrors in CMOS, EEE SCAS, New Orleans, LA, USA, 007, pp [7] L-F. anguay, Mohamad Sawan, and Yvon Savaria, A ery-high Output mpedance Current Mirror for ery-low oltage Biomedical Analog Circuits, EEE APCCAS, Macao, China, 008, pp ACKNOWLEDGMEN he authors would like to thank R. Sarpeshkar, R. F. Lyon, and C. A. Mead for the meaningful discussions on bulk-input OA. he authors also extend their thanks to B. A. Minch and L. F. anguay for the measurement assistance of different CM circuits. SSN: SBN: